# define R300_WRITE_ENA_Z 4
# define R300_WRITE_ENA_W 8
# define R300_SWIZZLE1_SHIFT 16
+
+# define R300_VAP_SWIZZLE_XYZW \
+ ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
+ (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
+ (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \
+ (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \
+ (0xf << R300_WRITE_ENA_SHIFT))
+
#define R300_VAP_PROG_STREAM_CNTL_EXT_1 0x21e4
#define R300_VAP_PROG_STREAM_CNTL_EXT_2 0x21e8
#define R300_VAP_PROG_STREAM_CNTL_EXT_3 0x21ec
/* r300_state_derived: Various bits of state which are dependent upon
* currently bound CSO data. */
-static uint32_t translate_vertex_data_type(int type) {
- switch (type) {
- case EMIT_1F:
- case EMIT_1F_PSIZE:
- return R300_DATA_TYPE_FLOAT_1;
- break;
- case EMIT_2F:
- return R300_DATA_TYPE_FLOAT_2;
- break;
- case EMIT_3F:
- return R300_DATA_TYPE_FLOAT_3;
- break;
- case EMIT_4F:
- return R300_DATA_TYPE_FLOAT_4;
- break;
- default:
- debug_printf("r300: Implementation error: "
- "Bad vertex data type!\n");
- break;
- }
-
- return 0;
-}
-
/* Update the vertex_info struct in our r300_context.
*
* The vertex_info struct describes the post-TCL format of vertices. It is
if (memcmp(&r300->vertex_info, &vinfo, sizeof(struct vertex_info))) {
uint32_t temp;
-
-#define BORING_SWIZZLE \
- ((R300_SWIZZLE_SELECT_X << R300_SWIZZLE_SELECT_X_SHIFT) | \
- (R300_SWIZZLE_SELECT_Y << R300_SWIZZLE_SELECT_Y_SHIFT) | \
- (R300_SWIZZLE_SELECT_Z << R300_SWIZZLE_SELECT_Z_SHIFT) | \
- (R300_SWIZZLE_SELECT_W << R300_SWIZZLE_SELECT_W_SHIFT) | \
- (0xf << R300_WRITE_ENA_SHIFT))
+ debug_printf("attrib count: %d, fp input count: %d\n",
+ vinfo.num_attribs, info->num_inputs);
+ for (i = 0; i < vinfo.num_attribs; i++) {
+ debug_printf("attrib: offset %d, interp %d, size %d,"
+ " tab %d\n", vinfo.attrib[i].src_index,
+ vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit,
+ tab[i]);
+ }
for (i = 0; i < vinfo.num_attribs; i++) {
/* Make sure we have a proper destination for our attribute */
- if (tab[i] == -1) {
- debug_printf("attrib count: %d, fp input count: %d\n",
- vinfo.num_attribs, info->num_inputs);
- for (i = 0; i < vinfo.num_attribs; i++) {
- debug_printf("attrib: offset %d, interp %d, size %d,"
- " tab %d\n", vinfo.attrib[i].src_index,
- vinfo.attrib[i].interp_mode, vinfo.attrib[i].emit,
- tab[i]);
- }
- assert(0);
- }
+ assert(tab[i] == -1);
temp = translate_vertex_data_type(vinfo.attrib[i].emit) |
- (tab[i] << R300_DST_VEC_LOC_SHIFT) | R300_SIGNED;
+ (tab[i] << R300_DST_VEC_LOC_SHIFT);
if (i & 1) {
- r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff;
- r300->vertex_info.vap_prog_stream_cntl[i >> 1] |=
- temp << 16;
+ r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0x0000ffff;
+ r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp << 16;
} else {
r300->vertex_info.vap_prog_stream_cntl[i >> 1] &= 0xffff0000;
- r300->vertex_info.vap_prog_stream_cntl[i >> 1] |=
- temp;
+ r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= temp;
}
r300->vertex_info.vap_prog_stream_cntl_ext[i >> 1] |=
- (BORING_SWIZZLE << (i & 1 ? 16 : 0));
+ (R300_VAP_SWIZZLE_XYZW << (i & 1 ? 16 : 0));
}
r300->vertex_info.vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC <<
(i & 1 ? 16 : 0));
r300_emit_rs_block_state(r300, &r300_rs_block_clear_state);
}
- BEGIN_CS(112 + (caps->has_tcl ? 2 : 0));
+ BEGIN_CS(106 + (caps->has_tcl ? 2 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
R300_VPORT_X_OFFSET_ENA | R300_VPORT_Y_SCALE_ENA |
R300_VPORT_Y_OFFSET_ENA | R300_VPORT_Z_SCALE_ENA |
R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT);
- /* Vertex size. */
- OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8);
/* Max and min vertex index clamp. */
OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, 0xFFFFFF);
OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0x0);
((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) |
R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT));
}
- OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688);
+ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0,
+ (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE0_SHIFT) |
+ (R300_VAP_SWIZZLE_XYZW << R300_SWIZZLE1_SHIFT));
OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
OUT_CS_REG(R300_VAP_VSM_VTX_ASSM, 0x405);
OUT_CS_REG(R300_SE_VTE_CNTL, 0x0000043F);
- OUT_CS_REG(R300_VAP_VTX_SIZE, 0x00000008);
+ /* Vertex size. */
+ OUT_CS_REG(R300_VAP_VTX_SIZE, 0x8);
OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA);
OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_0, 0x00000003);
OUT_CS_REG(R300_VAP_OUTPUT_VTX_FMT_1, 0x00000000);