Make syscalls serialize after instructions so they work properly on the new CPU model.

--HG--
extra : convert_revision : c2cea5771e41d3c97d0e44559316363718d89abd

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 2ecd9f5adb7a663aab78d7ca6ec903edb2cd82ea..d2908b27a2937b8163d9e3902dcbb257560241f8 100644 (file)
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -701,7 +701,7 @@ decode OPCODE default Unknown::unknown() {
             }}, IsNonSpeculative);
             0x83: callsys({{
                 xc->syscall(R0);
-            }}, IsNonSpeculative);
+            }}, IsSerializeAfter, IsNonSpeculative);
             // Read uniq reg into ABI return value register (r0)
             0x9e: rduniq({{ R0 = Runiq; }}, IsIprAccess);
             // Write uniq reg with value from ABI arg register (r16)