S/390: Add missing constraints in builtin patterns

gcc/ChangeLog:

2017-03-09  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vx-builtins.md ("vfee<mode>", "vfeez<mode>")
	("vfenez<mode>"): Add missing constraints.

From-SVN: r245987

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3f97e1645091def5f1245dd0040905919334ffca..de662f1e349575db0d4d7760b419228fc53082ea 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-03-09  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * config/s390/vx-builtins.md ("vfee<mode>", "vfeez<mode>")
+       ("vfenez<mode>"): Add missing constraints.
+
 2017-03-08  Martin Sebor  <msebor@redhat.com>
 
        PR target/79928

diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
index 1e9010ac909448628bf7a1e03b3e9a1aaa886ef7..6aff378810e204ff35871d1e4bb2bf48d92c1214 100644 (file)
--- a/gcc/config/s390/vx-builtins.md
+++ b/gcc/config/s390/vx-builtins.md
@@ -1351,9 +1351,9 @@
 
 ; vfeeb, vfeeh, vfeef
 (define_insn "vfee<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-                          (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+                          (match_operand:VI_HW_QHS 2 "register_operand"  "v")
                           (const_int 0)]
                          UNSPEC_VEC_VFEE))]
   "TARGET_VX"
@@ -1362,9 +1362,9 @@
 
 ; vfeezb, vfeezh, vfeezf
 (define_insn "vfeez<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-                          (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+                          (match_operand:VI_HW_QHS 2 "register_operand"  "v")
                           (const_int VSTRING_FLAG_ZS)]
                          UNSPEC_VEC_VFEE))]
   "TARGET_VX"
@@ -1423,9 +1423,9 @@
 
 ; vfenezb, vfenezh, vfenezf
 (define_insn "vfenez<mode>"
-  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "")
-       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "")
-                          (match_operand:VI_HW_QHS 2 "register_operand" "")
+  [(set (match_operand:VI_HW_QHS                    0 "register_operand" "=v")
+       (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand"  "v")
+                          (match_operand:VI_HW_QHS 2 "register_operand"  "v")
                           (const_int VSTRING_FLAG_ZS)]
                          UNSPEC_VEC_VFENE))]
   "TARGET_VX"