r600g: set MIN/MAX_VTX_INDX to 0 and ~0, respectively

The CS checker doesn't check the regs and the state-tracker-provided values
are not to be trusted.

This also removes the hack for non-zero index bias.

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 14a2ab0a4db3fed04ff05f0ba1c9fa65b580ecf0..24d07be25bec5c8218aa95f1f1c300baef64e90b 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -551,12 +551,6 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
        rdraw.vgt_num_instances = info.instance_count;
 
        if (info.indexed) {
-               /* Adjust min/max_index by the index bias. */
-               if (info.max_index != ~0) {
-                       info.min_index += info.index_bias;
-                       info.max_index += info.index_bias;
-               }
-
                /* Initialize the index buffer struct. */
                pipe_resource_reference(&ib.buffer, rctx->index_buffer.buffer);
                ib.index_size = rctx->index_buffer.index_size;
@@ -592,8 +586,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                rctx->vgt.nregs = 0;
                r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL, 0);
-               r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, info.max_index, 0xFFFFFFFF, NULL, 0);
-               r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, info.min_index, 0xFFFFFFFF, NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, ~0, 0xFFFFFFFF, NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, 0, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, info.index_bias, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart, 0xFFFFFFFF, NULL, 0);
@@ -610,8 +604,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
        rctx->vgt.nregs = 0;
        r600_pipe_state_mod_reg(&rctx->vgt, prim);
        r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_target_mask & mask);
-       r600_pipe_state_mod_reg(&rctx->vgt, info.max_index);
-       r600_pipe_state_mod_reg(&rctx->vgt, info.min_index);
+       r600_pipe_state_mod_reg(&rctx->vgt, ~0);
+       r600_pipe_state_mod_reg(&rctx->vgt, 0);
        r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias);
        r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index);
        r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart);