**AVX-512**
-An informative article by Vamsi Sripathi of Intel shows the extent of the problem
-faced by SIMD ISAs (in the case below, AVX-512). Significant loop-unrolling is performed
-which leaves blocks that need to be merged: this is carried out with "blending"
-instructions.
+An informative article by Vamsi Sripathi of Intel shows the extent of
+the problem faced by SIMD ISAs (in the case below, AVX-512). Significant
+loop-unrolling is performed which leaves blocks that need to be merged:
+this is carried out with "blending" instructions.
Article:
<https://www.intel.com/content/www/us/en/developer/articles/technical/optimizing-maxloc-operation-using-avx-512-vector-instructions.html#gs.12t5y0>
**Rust Assembler Intrinsics**
-An approach by jvdd shows that the two stage approach of "blending" arrays of
-results in a type of parallelised "leaf node depth first" search seems to be
-a common technique.
+An approach by jvdd shows that the two stage approach of "blending"
+arrays of results in a type of parallelised "leaf node depth first"
+search seems to be a common technique.
<https://github.com/jvdd/argminmax/blob/main/src/simd/simd_u64.rs>