* Secondly, that no instruction shall change meaning to produce
different results on different hardware (present or future).
* Thirdly, that Scalar "defined words" (32 bit instruction
- encodings) if Vwctorised will also always be implemented as
+ encodings) if Vectorised will also always be implemented as
identical Scalar instructions (the sole semi-exception being
- Vevtorised Branch-Conditional)
+ Vectorised Branch-Conditional)
* Fourthly, that implementors are not permitted to either add
arbitrary features nor implement features in an incompatible
way. *(Performance may differ, but differing results are