freedreno/ir3: set even bit for f2f16_rtne

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 553b772b8ec1b04e8a3f71331ffdc1cf55734fed..c6ed65550a0be335c760760d0b82ff4b1c84691a 100644 (file)
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -236,7 +236,6 @@ create_cov(struct ir3_context *ctx, struct ir3_instruction *src,
        case nir_op_f2f16_rtne:
        case nir_op_f2f16_rtz:
        case nir_op_f2f16:
-               /* TODO how to handle rounding mode? */
        case nir_op_i2f16:
        case nir_op_u2f16:
                dst_type = TYPE_F16;
@@ -276,7 +275,13 @@ create_cov(struct ir3_context *ctx, struct ir3_instruction *src,
                ir3_context_error(ctx, "invalid conversion op: %u", op);
        }
 
-       return ir3_COV(ctx->block, src, src_type, dst_type);
+       struct ir3_instruction *cov =
+               ir3_COV(ctx->block, src, src_type, dst_type);
+
+       if (op == nir_op_f2f16_rtne)
+               cov->regs[0]->flags |= IR3_REG_EVEN;
+
+       return cov;
 }
 
 static void