sizeof(struct pipe_transfer), 64,
UTIL_SLAB_SINGLETHREADED);
- r300->cs = rws->cs_create(rws, RING_GFX, NULL);
+ r300->cs = rws->cs_create(rws, RING_GFX, r300_flush_callback, r300, NULL);
if (r300->cs == NULL)
goto fail;
goto fail;
r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
- rws->cs_set_flush_callback(r300->cs, r300_flush_callback, r300);
-
/* The KIL opcode needs the first texture unit to be enabled
* on r3xx-r4xx. In order to calm down the CS checker, we bind this
* dummy texture there. */
{
struct r600_context *rctx = CALLOC_STRUCT(r600_context);
struct r600_screen* rscreen = (struct r600_screen *)screen;
+ struct radeon_winsys *ws = rscreen->b.ws;
if (rctx == NULL)
return NULL;
goto fail;
}
- if (rscreen->b.trace_bo) {
- rctx->b.rings.gfx.cs = rctx->b.ws->cs_create(rctx->b.ws, RING_GFX, rscreen->b.trace_bo->cs_buf);
- } else {
- rctx->b.rings.gfx.cs = rctx->b.ws->cs_create(rctx->b.ws, RING_GFX, NULL);
- }
+ rctx->b.rings.gfx.cs = ws->cs_create(ws, RING_GFX,
+ r600_flush_gfx_ring, rctx,
+ rscreen->b.trace_bo ?
+ rscreen->b.trace_bo->cs_buf : NULL);
rctx->b.rings.gfx.flush = r600_flush_gfx_ring;
- rctx->b.ws->cs_set_flush_callback(rctx->b.rings.gfx.cs, r600_flush_gfx_ring, rctx);
rctx->b.rings.gfx.flushing = false;
rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256,
return false;
if (rscreen->info.r600_has_dma && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
- rctx->rings.dma.cs = rctx->ws->cs_create(rctx->ws, RING_DMA, NULL);
+ rctx->rings.dma.cs = rctx->ws->cs_create(rctx->ws, RING_DMA,
+ r600_flush_dma_from_winsys,
+ rctx, NULL);
rctx->rings.dma.flush = r600_flush_dma_ring;
- rctx->ws->cs_set_flush_callback(rctx->rings.dma.cs, r600_flush_dma_from_winsys, rctx);
}
return true;
dec->set_dtb = set_dtb;
dec->stream_handle = rvid_alloc_stream_handle();
dec->ws = ws;
- dec->cs = ws->cs_create(ws, RING_UVD, NULL);
+ dec->cs = ws->cs_create(ws, RING_UVD, NULL, NULL, NULL);
if (!dec->cs) {
RVID_ERR("Can't get command submission context.\n");
goto error;
enc->get_buffer = get_buffer;
enc->ws = ws;
- enc->cs = ws->cs_create(ws, RING_VCE, NULL);
+ enc->cs = ws->cs_create(ws, RING_VCE, rvce_cs_flush, enc, NULL);
if (!enc->cs) {
RVID_ERR("Can't get command submission context.\n");
goto error;
}
- enc->ws->cs_set_flush_callback(enc->cs, rvce_cs_flush, enc);
templat.buffer_format = PIPE_FORMAT_NV12;
templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
templat.width = enc->base.width;
{
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
+ struct radeon_winsys *ws = sscreen->b.ws;
int shader, i;
if (sctx == NULL)
sctx->b.b.create_video_buffer = vl_video_buffer_create;
}
- sctx->b.rings.gfx.cs = sctx->b.ws->cs_create(sctx->b.ws, RING_GFX, NULL);
+ sctx->b.rings.gfx.cs = ws->cs_create(ws, RING_GFX, si_flush_gfx_ring,
+ sctx, NULL);
sctx->b.rings.gfx.flush = si_flush_gfx_ring;
- sctx->b.ws->cs_set_flush_callback(sctx->b.rings.gfx.cs, si_flush_gfx_ring, sctx);
si_init_all_descriptors(sctx);
}
-static struct radeon_winsys_cs *radeon_drm_cs_create(struct radeon_winsys *rws,
- enum ring_type ring_type,
- struct radeon_winsys_cs_handle *trace_buf)
+static struct radeon_winsys_cs *
+radeon_drm_cs_create(struct radeon_winsys *rws,
+ enum ring_type ring_type,
+ void (*flush)(void *ctx, unsigned flags),
+ void *flush_ctx,
+ struct radeon_winsys_cs_handle *trace_buf)
{
struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
struct radeon_drm_cs *cs;
pipe_semaphore_init(&cs->flush_completed, 1);
cs->ws = ws;
+ cs->flush_cs = flush;
+ cs->flush_data = flush_ctx;
cs->trace_buf = (struct radeon_bo*)trace_buf;
if (!radeon_init_cs_context(&cs->csc1, cs->ws)) {
FREE(cs);
}
-static void radeon_drm_cs_set_flush(struct radeon_winsys_cs *rcs,
- void (*flush)(void *ctx, unsigned flags),
- void *user)
-{
- struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
-
- cs->flush_cs = flush;
- cs->flush_data = user;
-}
-
static boolean radeon_bo_is_referenced(struct radeon_winsys_cs *rcs,
struct radeon_winsys_cs_handle *_buf,
enum radeon_bo_usage usage)
ws->base.cs_validate = radeon_drm_cs_validate;
ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
ws->base.cs_flush = radeon_drm_cs_flush;
- ws->base.cs_set_flush_callback = radeon_drm_cs_set_flush;
ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;
ws->base.cs_sync_flush = radeon_drm_cs_sync_flush;
ws->base.cs_create_fence = radeon_cs_create_fence;
*
* \param ws The winsys this function is called from.
* \param ring_type The ring type (GFX, DMA, UVD)
+ * \param flush Flush callback function associated with the command stream.
+ * \param user User pointer that will be passed to the flush callback.
* \param trace_buf Trace buffer when tracing is enabled
*/
struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws,
enum ring_type ring_type,
+ void (*flush)(void *ctx, unsigned flags),
+ void *flush_ctx,
struct radeon_winsys_cs_handle *trace_buf);
/**
*/
void (*cs_flush)(struct radeon_winsys_cs *cs, unsigned flags, uint32_t cs_trace_id);
- /**
- * Set a flush callback which is called from winsys when flush is
- * required.
- *
- * \param cs A command stream to set the callback for.
- * \param flush A flush callback function associated with the command stream.
- * \param user A user pointer that will be passed to the flush callback.
- */
- void (*cs_set_flush_callback)(struct radeon_winsys_cs *cs,
- void (*flush)(void *ctx, unsigned flags),
- void *ctx);
-
/**
* Return TRUE if a buffer is referenced by a command stream.
*