i965: Track the windowizer's dispatch for kill pixel, promoted, and OQ

Looks like the problem was we weren't passing the depth to the render
target as expected, so the chip would wedge.  Fixes GPU hang in
occlusion-query-discard.

Bug #30097

diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index d70be7bda28557b4d5f5541c33dcd67a5aac8287..17ff3e2b2b34fa0c91e3d0e8e4b12244233e8564 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -215,6 +215,7 @@ static void do_wm_prog( struct brw_context *brw,
 static void brw_wm_populate_key( struct brw_context *brw,
                                 struct brw_wm_prog_key *key )
 {
+   struct intel_context *intel = &brw->intel;
    GLcontext *ctx = &brw->intel.ctx;
    /* BRW_NEW_FRAGMENT_PROGRAM */
    const struct brw_fragment_program *fp = 
@@ -279,7 +280,8 @@ static void brw_wm_populate_key( struct brw_context *brw,
       }
    }
         
-   brw_wm_lookup_iz(line_aa,
+   brw_wm_lookup_iz(intel,
+                   line_aa,
                    lookup,
                    uses_depth,
                    key);

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index c28acad24b54b630040d50b4ac84fb3df32ce6f8..fed13729698de32b4c7fd163f201a8bdde6ad1fb 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -299,7 +299,8 @@ void brw_wm_print_insn( struct brw_wm_compile *c,
 void brw_wm_print_program( struct brw_wm_compile *c,
                           const char *stage );
 
-void brw_wm_lookup_iz( GLuint line_aa,
+void brw_wm_lookup_iz( struct intel_context *intel,
+                      GLuint line_aa,
                       GLuint lookup,
                       GLboolean ps_uses_depth,
                       struct brw_wm_prog_key *key );

diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c
index 8505ef19510535eab0d56f25ea08ae1a75d25300..62e556698ba8dea4fba3cb87840efe40042cd8d6 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_iz.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c
@@ -120,24 +120,38 @@ const struct {
  * \param line_aa  AA_NEVER, AA_ALWAYS or AA_SOMETIMES
  * \param lookup  bitmask of IZ_* flags
  */
-void brw_wm_lookup_iz( GLuint line_aa,
+void brw_wm_lookup_iz( struct intel_context *intel,
+                      GLuint line_aa,
                       GLuint lookup,
                       GLboolean ps_uses_depth,
                       struct brw_wm_prog_key *key )
 {
    GLuint reg = 2;
+   GLboolean kill_stats_promoted_workaround = GL_FALSE;
 
    assert (lookup < IZ_BIT_MAX);
-      
+
+   /* Crazy workaround in the windowizer, which we need to track in
+    * our register allocation and render target writes.  See the "If
+    * statistics are enabled..." paragraph of 11.5.3.2: Early Depth
+    * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec.
+    */
+   if (intel->stats_wm &&
+       (lookup & IZ_PS_KILL_ALPHATEST_BIT) &&
+       wm_iz_table[lookup].mode == P) {
+      kill_stats_promoted_workaround = GL_TRUE;
+   }
+
    if (lookup & IZ_PS_COMPUTES_DEPTH_BIT)
       key->computes_depth = 1;
 
-   if (wm_iz_table[lookup].sd_present || ps_uses_depth) {
+   if (wm_iz_table[lookup].sd_present || ps_uses_depth ||
+       kill_stats_promoted_workaround) {
       key->source_depth_reg = reg;
       reg += 2;
    }
 
-   if (wm_iz_table[lookup].sd_to_rt)
+   if (wm_iz_table[lookup].sd_to_rt || kill_stats_promoted_workaround)
       key->source_depth_to_render_target = 1;
 
    if (wm_iz_table[lookup].ds_present || line_aa != AA_NEVER) {