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lkcl
<lkcl@web>
Thu, 23 Jan 2020 13:55:18 +0000
(13:55 +0000)
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IkiWiki
<ikiwiki.info>
Thu, 23 Jan 2020 13:55:18 +0000
(13:55 +0000)
HDL_workflow.mdwn
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a/HDL_workflow.mdwn
b/HDL_workflow.mdwn
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HDL_workflow.mdwn
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HDL_workflow.mdwn
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The reasons for doing a proper modularisation job are several-fold:
Find appropriate tutorials for nmigen and yosys, as well as symbiyosys.
+* Although a verilog example this is very useful to do <https://symbiyosys.readthedocs.io/en/latest/quickstart.html#first-step-a-simple-bmc-example>