---------- Begin Simulation Statistics ----------
-sim_seconds 5.152315 # Number of seconds simulated
-sim_ticks 5152314519000 # Number of ticks simulated
-final_tick 5152314519000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 5.152314 # Number of seconds simulated
+sim_ticks 5152313559000 # Number of ticks simulated
+final_tick 5152313559000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 171705 # Simulator instruction rate (inst/s)
-host_op_rate 339400 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2173929918 # Simulator tick rate (ticks/s)
-host_mem_usage 815744 # Number of bytes of host memory used
-host_seconds 2370.05 # Real time elapsed on the host
-sim_insts 406948645 # Number of instructions simulated
-sim_ops 804394656 # Number of ops (including micro ops) simulated
+host_inst_rate 122296 # Simulator instruction rate (inst/s)
+host_op_rate 241737 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1548372689 # Simulator tick rate (ticks/s)
+host_mem_usage 812680 # Number of bytes of host memory used
+host_seconds 3327.57 # Real time elapsed on the host
+sim_insts 406949634 # Number of instructions simulated
+sim_ops 804396566 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.dtb.walker 4096 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.inst 1035840 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 10724032 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.inst 1035776 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 10724352 # Number of bytes read from this memory
system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory
-system.physmem.bytes_read::total 11792640 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 1035840 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 1035840 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 9542144 # Number of bytes written to this memory
-system.physmem.bytes_written::total 9542144 # Number of bytes written to this memory
+system.physmem.bytes_read::total 11792896 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 1035776 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 1035776 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 9542784 # Number of bytes written to this memory
+system.physmem.bytes_written::total 9542784 # Number of bytes written to this memory
system.physmem.num_reads::cpu.dtb.walker 64 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.inst 16185 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 167563 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.inst 16184 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 167568 # Number of read requests responded to by this memory
system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 184260 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 149096 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 149096 # Number of write requests responded to by this memory
+system.physmem.num_reads::total 184264 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 149106 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 149106 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu.dtb.walker 795 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.itb.walker 62 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.inst 201044 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 2081401 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 201031 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 2081463 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::pc.south_bridge.ide 5503 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 2288804 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 201044 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 201044 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 1852011 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 1852011 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 1852011 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::total 2288854 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 201031 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 201031 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 1852136 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 1852136 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 1852136 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.dtb.walker 795 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.itb.walker 62 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 201044 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 2081401 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 201031 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 2081463 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::pc.south_bridge.ide 5503 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 4140816 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 184260 # Number of read requests accepted
-system.physmem.writeReqs 149096 # Number of write requests accepted
-system.physmem.readBursts 184260 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 149096 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 11779776 # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ 12864 # Total number of bytes read from write queue
-system.physmem.bytesWritten 9541120 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 11792640 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 9542144 # Total written bytes from the system interface side
-system.physmem.servicedByWrQ 201 # Number of DRAM read bursts serviced by the write queue
+system.physmem.bw_total::total 4140990 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 184264 # Number of read requests accepted
+system.physmem.writeReqs 149106 # Number of write requests accepted
+system.physmem.readBursts 184264 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 149106 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 11780160 # Total number of bytes read from DRAM
+system.physmem.bytesReadWrQ 12736 # Total number of bytes read from write queue
+system.physmem.bytesWritten 9541632 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 11792896 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 9542784 # Total written bytes from the system interface side
+system.physmem.servicedByWrQ 199 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs 58140 # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0 11261 # Per bank write bursts
-system.physmem.perBankRdBursts::1 10600 # Per bank write bursts
-system.physmem.perBankRdBursts::2 12322 # Per bank write bursts
-system.physmem.perBankRdBursts::3 11592 # Per bank write bursts
-system.physmem.perBankRdBursts::4 11482 # Per bank write bursts
-system.physmem.perBankRdBursts::5 10950 # Per bank write bursts
-system.physmem.perBankRdBursts::6 11082 # Per bank write bursts
-system.physmem.perBankRdBursts::7 11124 # Per bank write bursts
+system.physmem.neitherReadNorWriteReqs 58128 # Number of requests that are neither read nor write
+system.physmem.perBankRdBursts::0 11264 # Per bank write bursts
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system.physmem.perBankRdBursts::8 10622 # Per bank write bursts
-system.physmem.perBankRdBursts::9 11032 # Per bank write bursts
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system.physmem.perBankRdBursts::10 11540 # Per bank write bursts
-system.physmem.perBankRdBursts::11 11373 # Per bank write bursts
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system.physmem.perBankRdBursts::12 12384 # Per bank write bursts
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system.physmem.perBankRdBursts::15 12225 # Per bank write bursts
-system.physmem.perBankWrBursts::0 9586 # Per bank write bursts
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system.physmem.perBankWrBursts::8 8752 # Per bank write bursts
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system.physmem.perBankWrBursts::10 9210 # Per bank write bursts
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system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
-system.physmem.numWrRetry 7 # Number of times write queue was full causing retry
-system.physmem.totGap 5152314469500 # Total gap between requests
+system.physmem.numWrRetry 6 # Number of times write queue was full causing retry
+system.physmem.totGap 5152313509500 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 184260 # Read request sizes (log2)
+system.physmem.readPktSize::6 184264 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
-system.physmem.writePktSize::6 149096 # Write request sizes (log2)
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system.physmem.rdQLenPdf::0 169844 # What read queue length does an incoming req see
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-system.physmem.bytesPerActivate::samples 73146 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean 291.483225 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean 174.242867 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev 313.005738 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127 28143 38.48% 38.48% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255 17778 24.30% 62.78% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383 7759 10.61% 73.39% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511 4281 5.85% 79.24% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639 2977 4.07% 83.31% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767 2397 3.28% 86.59% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895 1373 1.88% 88.46% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023 1102 1.51% 89.97% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151 7336 10.03% 100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total 73146 # Bytes accessed per row activation
-system.physmem.rdPerTurnAround::samples 7286 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::mean 25.261872 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::stdev 562.739811 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::0-2047 7285 99.99% 99.99% # Reads before turning the bus around for writes
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+system.physmem.wrQLenPdf::52 62 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::53 85 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::54 59 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::55 40 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::56 62 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::57 46 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::58 25 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::59 35 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::60 34 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::61 13 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::62 11 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::63 36 # What write queue length does an incoming req see
+system.physmem.bytesPerActivate::samples 73162 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 291.431727 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 174.195666 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 313.031817 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 28160 38.49% 38.49% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 17784 24.31% 62.80% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 7754 10.60% 73.40% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 4294 5.87% 79.27% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 2960 4.05% 83.31% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 2393 3.27% 86.58% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 1365 1.87% 88.45% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 1117 1.53% 89.97% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 7335 10.03% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 73162 # Bytes accessed per row activation
+system.physmem.rdPerTurnAround::samples 7284 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::mean 25.269357 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::stdev 562.815412 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::0-2047 7283 99.99% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::47104-49151 1 0.01% 100.00% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::total 7286 # Reads before turning the bus around for writes
-system.physmem.wrPerTurnAround::samples 7286 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::mean 20.461158 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::gmean 18.651895 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::stdev 13.024155 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::16-19 6243 85.68% 85.68% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::20-23 165 2.26% 87.95% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::24-27 39 0.54% 88.48% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::28-31 177 2.43% 90.91% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::32-35 22 0.30% 91.22% # Writes before turning the bus around for reads
+system.physmem.rdPerTurnAround::total 7284 # Reads before turning the bus around for writes
+system.physmem.wrPerTurnAround::samples 7284 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::mean 20.467875 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::gmean 18.652190 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::stdev 13.050833 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::16-19 6239 85.65% 85.65% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::20-23 170 2.33% 87.99% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::24-27 40 0.55% 88.54% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::28-31 173 2.38% 90.91% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::32-35 22 0.30% 91.21% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::36-39 151 2.07% 93.29% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::40-43 106 1.45% 94.74% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::44-47 11 0.15% 94.89% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::48-51 24 0.33% 95.22% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::52-55 33 0.45% 95.68% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::56-59 7 0.10% 95.77% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::60-63 7 0.10% 95.87% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::64-67 220 3.02% 98.89% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::40-43 103 1.41% 94.70% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::44-47 10 0.14% 94.84% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::48-51 24 0.33% 95.17% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::52-55 33 0.45% 95.62% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::56-59 7 0.10% 95.72% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::60-63 8 0.11% 95.83% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::64-67 223 3.06% 98.89% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::68-71 4 0.05% 98.94% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::72-75 9 0.12% 99.07% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::76-79 29 0.40% 99.46% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::152-155 1 0.01% 99.97% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::156-159 1 0.01% 99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::164-167 1 0.01% 100.00% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::total 7286 # Writes before turning the bus around for reads
-system.physmem.totQLat 2105191048 # Total ticks spent queuing
-system.physmem.totMemAccLat 5556297298 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 920295000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 11437.59 # Average queueing delay per DRAM burst
+system.physmem.wrPerTurnAround::total 7284 # Writes before turning the bus around for reads
+system.physmem.totQLat 2101117298 # Total ticks spent queuing
+system.physmem.totMemAccLat 5552336048 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 920325000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 11415.08 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 30187.59 # Average memory access latency per DRAM burst
+system.physmem.avgMemAccLat 30165.08 # Average memory access latency per DRAM burst
system.physmem.avgRdBW 2.29 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW 1.85 # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys 2.29 # Average system read bandwidth in MiByte/s
system.physmem.busUtilWrite 0.01 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.05 # Average read queue length when enqueuing
system.physmem.avgWrQLen 22.81 # Average write queue length when enqueuing
-system.physmem.readRowHits 150243 # Number of row buffer hits during reads
-system.physmem.writeRowHits 109749 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 81.63 # Row buffer hit rate for reads
+system.physmem.readRowHits 150235 # Number of row buffer hits during reads
+system.physmem.writeRowHits 109755 # Number of row buffer hits during writes
+system.physmem.readRowHitRate 81.62 # Row buffer hit rate for reads
system.physmem.writeRowHitRate 73.61 # Row buffer hit rate for writes
-system.physmem.avgGap 15455892.41 # Average gap between requests
+system.physmem.avgGap 15455240.45 # Average gap between requests
system.physmem.pageHitRate 78.04 # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy 269634960 # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy 147122250 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 705213600 # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy 484704000 # Energy for write commands per rank (pJ)
+system.physmem_0.actEnergy 269725680 # Energy for activate commands per rank (pJ)
+system.physmem_0.preEnergy 147171750 # Energy for precharge commands per rank (pJ)
+system.physmem_0.readEnergy 705252600 # Energy for read commands per rank (pJ)
+system.physmem_0.writeEnergy 484710480 # Energy for write commands per rank (pJ)
system.physmem_0.refreshEnergy 336523814640 # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy 132970948335 # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy 2974744703250 # Energy for precharge background per rank (pJ)
-system.physmem_0.totalEnergy 3445846141035 # Total energy per rank (pJ)
-system.physmem_0.averagePower 668.796378 # Core power per rank (mW)
-system.physmem_0.memoryStateTime::IDLE 4948677575724 # Time in different power states
+system.physmem_0.actBackEnergy 132965791830 # Energy for active background per rank (pJ)
+system.physmem_0.preBackEnergy 2974749226500 # Energy for precharge background per rank (pJ)
+system.physmem_0.totalEnergy 3445845693480 # Total energy per rank (pJ)
+system.physmem_0.averagePower 668.796291 # Core power per rank (mW)
+system.physmem_0.memoryStateTime::IDLE 4948684136224 # Time in different power states
system.physmem_0.memoryStateTime::REF 172046940000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_0.memoryStateTime::ACT 31589843276 # Time in different power states
+system.physmem_0.memoryStateTime::ACT 31582322276 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.physmem_1.actEnergy 283348800 # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy 154605000 # Energy for precharge commands per rank (pJ)
-system.physmem_1.readEnergy 730438800 # Energy for read commands per rank (pJ)
-system.physmem_1.writeEnergy 481334400 # Energy for write commands per rank (pJ)
+system.physmem_1.actEnergy 283379040 # Energy for activate commands per rank (pJ)
+system.physmem_1.preEnergy 154621500 # Energy for precharge commands per rank (pJ)
+system.physmem_1.readEnergy 730446600 # Energy for read commands per rank (pJ)
+system.physmem_1.writeEnergy 481379760 # Energy for write commands per rank (pJ)
system.physmem_1.refreshEnergy 336523814640 # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy 133265512935 # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy 2974486313250 # Energy for precharge background per rank (pJ)
-system.physmem_1.totalEnergy 3445925367825 # Total energy per rank (pJ)
-system.physmem_1.averagePower 668.811755 # Core power per rank (mW)
-system.physmem_1.memoryStateTime::IDLE 4948236275986 # Time in different power states
+system.physmem_1.actBackEnergy 133234904790 # Energy for active background per rank (pJ)
+system.physmem_1.preBackEnergy 2974513162500 # Energy for precharge background per rank (pJ)
+system.physmem_1.totalEnergy 3445921708830 # Total energy per rank (pJ)
+system.physmem_1.averagePower 668.811045 # Core power per rank (mW)
+system.physmem_1.memoryStateTime::IDLE 4948281584736 # Time in different power states
system.physmem_1.memoryStateTime::REF 172046940000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_1.memoryStateTime::ACT 32026607764 # Time in different power states
+system.physmem_1.memoryStateTime::ACT 31981299014 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.cpu.branchPred.lookups 86360408 # Number of BP lookups
-system.cpu.branchPred.condPredicted 86360408 # Number of conditional branches predicted
-system.cpu.branchPred.condIncorrect 844738 # Number of conditional branches incorrect
-system.cpu.branchPred.BTBLookups 79711483 # Number of BTB lookups
-system.cpu.branchPred.BTBHits 77808056 # Number of BTB hits
+system.cpu.branchPred.lookups 86361942 # Number of BP lookups
+system.cpu.branchPred.condPredicted 86361942 # Number of conditional branches predicted
+system.cpu.branchPred.condIncorrect 844867 # Number of conditional branches incorrect
+system.cpu.branchPred.BTBLookups 79712463 # Number of BTB lookups
+system.cpu.branchPred.BTBHits 77809670 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.branchPred.BTBHitPct 97.612104 # BTB Hit Percentage
-system.cpu.branchPred.usedRAS 1540361 # Number of times the RAS was used to get a target.
-system.cpu.branchPred.RASInCorrect 177639 # Number of incorrect RAS predictions.
+system.cpu.branchPred.BTBHitPct 97.612929 # BTB Hit Percentage
+system.cpu.branchPred.usedRAS 1539914 # Number of times the RAS was used to get a target.
+system.cpu.branchPred.RASInCorrect 177576 # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks
-system.cpu.numCycles 465551291 # number of cpu cycles simulated
+system.cpu.numCycles 465537238 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.fetch.icacheStallCycles 27284501 # Number of cycles fetch is stalled on an Icache miss
-system.cpu.fetch.Insts 426653476 # Number of instructions fetch has processed
-system.cpu.fetch.Branches 86360408 # Number of branches that fetch encountered
-system.cpu.fetch.predictedBranches 79348417 # Number of branches that fetch has predicted taken
-system.cpu.fetch.Cycles 433446162 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles 1774418 # Number of cycles fetch has spent squashing
-system.cpu.fetch.TlbCycles 139394 # Number of cycles fetch has spent waiting for tlb
-system.cpu.fetch.MiscStallCycles 62229 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu.fetch.PendingTrapStallCycles 198576 # Number of stall cycles due to pending traps
+system.cpu.fetch.icacheStallCycles 27283425 # Number of cycles fetch is stalled on an Icache miss
+system.cpu.fetch.Insts 426658175 # Number of instructions fetch has processed
+system.cpu.fetch.Branches 86361942 # Number of branches that fetch encountered
+system.cpu.fetch.predictedBranches 79349584 # Number of branches that fetch has predicted taken
+system.cpu.fetch.Cycles 433433945 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu.fetch.SquashCycles 1774834 # Number of cycles fetch has spent squashing
+system.cpu.fetch.TlbCycles 138611 # Number of cycles fetch has spent waiting for tlb
+system.cpu.fetch.MiscStallCycles 62197 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu.fetch.PendingTrapStallCycles 198243 # Number of stall cycles due to pending traps
system.cpu.fetch.PendingQuiesceStallCycles 56 # Number of stall cycles due to pending quiesce instructions
-system.cpu.fetch.IcacheWaitRetryStallCycles 774 # Number of stall cycles due to full MSHR
-system.cpu.fetch.CacheLines 8943748 # Number of cache lines fetched
-system.cpu.fetch.IcacheSquashes 426371 # Number of outstanding Icache misses that were squashed
+system.cpu.fetch.IcacheWaitRetryStallCycles 777 # Number of stall cycles due to full MSHR
+system.cpu.fetch.CacheLines 8943730 # Number of cache lines fetched
+system.cpu.fetch.IcacheSquashes 426192 # Number of outstanding Icache misses that were squashed
system.cpu.fetch.ItlbSquashes 4516 # Number of outstanding ITLB misses that were squashed
-system.cpu.fetch.rateDist::samples 462018901 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::mean 1.822492 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::stdev 3.015475 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::samples 462004671 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::mean 1.822565 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::stdev 3.015508 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::0 297432046 64.38% 64.38% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::1 2127313 0.46% 64.84% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::2 72010980 15.59% 80.42% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::3 1540927 0.33% 80.76% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::4 2092821 0.45% 81.21% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::5 2281981 0.49% 81.70% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::6 1471602 0.32% 82.02% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::7 1847080 0.40% 82.42% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::8 81214151 17.58% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::0 297416009 64.38% 64.38% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::1 2127138 0.46% 64.84% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::2 72011199 15.59% 80.42% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::3 1542030 0.33% 80.76% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::4 2092912 0.45% 81.21% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::5 2282044 0.49% 81.70% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::6 1471797 0.32% 82.02% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::7 1847192 0.40% 82.42% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::8 81214350 17.58% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::total 462018901 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.branchRate 0.185501 # Number of branch fetches per cycle
-system.cpu.fetch.rate 0.916448 # Number of inst fetches per cycle
-system.cpu.decode.IdleCycles 22519839 # Number of cycles decode is idle
-system.cpu.decode.BlockedCycles 281050355 # Number of cycles decode is blocked
-system.cpu.decode.RunCycles 150243576 # Number of cycles decode is running
-system.cpu.decode.UnblockCycles 7317922 # Number of cycles decode is unblocking
-system.cpu.decode.SquashCycles 887209 # Number of cycles decode is squashing
-system.cpu.decode.DecodedInsts 834205750 # Number of instructions handled by decode
-system.cpu.rename.SquashCycles 887209 # Number of cycles rename is squashing
-system.cpu.rename.IdleCycles 25305856 # Number of cycles rename is idle
-system.cpu.rename.BlockCycles 229987183 # Number of cycles rename is blocking
-system.cpu.rename.serializeStallCycles 14520771 # count of cycles rename stalled for serializing inst
-system.cpu.rename.RunCycles 154096496 # Number of cycles rename is running
-system.cpu.rename.UnblockCycles 37221386 # Number of cycles rename is unblocking
-system.cpu.rename.RenamedInsts 830901673 # Number of instructions processed by rename
-system.cpu.rename.ROBFullEvents 454414 # Number of times rename has blocked due to ROB full
-system.cpu.rename.IQFullEvents 12058066 # Number of times rename has blocked due to IQ full
-system.cpu.rename.LQFullEvents 208457 # Number of times rename has blocked due to LQ full
-system.cpu.rename.SQFullEvents 22294259 # Number of times rename has blocked due to SQ full
-system.cpu.rename.RenamedOperands 992600987 # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups 1804085973 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 1109069164 # Number of integer rename lookups
+system.cpu.fetch.rateDist::total 462004671 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.branchRate 0.185510 # Number of branch fetches per cycle
+system.cpu.fetch.rate 0.916486 # Number of inst fetches per cycle
+system.cpu.decode.IdleCycles 22519882 # Number of cycles decode is idle
+system.cpu.decode.BlockedCycles 281035605 # Number of cycles decode is blocked
+system.cpu.decode.RunCycles 150243041 # Number of cycles decode is running
+system.cpu.decode.UnblockCycles 7318726 # Number of cycles decode is unblocking
+system.cpu.decode.SquashCycles 887417 # Number of cycles decode is squashing
+system.cpu.decode.DecodedInsts 834212570 # Number of instructions handled by decode
+system.cpu.rename.SquashCycles 887417 # Number of cycles rename is squashing
+system.cpu.rename.IdleCycles 25306548 # Number of cycles rename is idle
+system.cpu.rename.BlockCycles 229981312 # Number of cycles rename is blocking
+system.cpu.rename.serializeStallCycles 14515163 # count of cycles rename stalled for serializing inst
+system.cpu.rename.RunCycles 154096108 # Number of cycles rename is running
+system.cpu.rename.UnblockCycles 37218123 # Number of cycles rename is unblocking
+system.cpu.rename.RenamedInsts 830907338 # Number of instructions processed by rename
+system.cpu.rename.ROBFullEvents 454391 # Number of times rename has blocked due to ROB full
+system.cpu.rename.IQFullEvents 12058587 # Number of times rename has blocked due to IQ full
+system.cpu.rename.LQFullEvents 208124 # Number of times rename has blocked due to LQ full
+system.cpu.rename.SQFullEvents 22290402 # Number of times rename has blocked due to SQ full
+system.cpu.rename.RenamedOperands 992604792 # Number of destination operands rename has renamed
+system.cpu.rename.RenameLookups 1804097397 # Number of register rename lookups that rename has made
+system.cpu.rename.int_rename_lookups 1109074070 # Number of integer rename lookups
system.cpu.rename.fp_rename_lookups 286 # Number of floating rename lookups
-system.cpu.rename.CommittedMaps 961883524 # Number of HB maps that are committed
-system.cpu.rename.UndoneMaps 30717461 # Number of HB maps that are undone due to squashing
-system.cpu.rename.serializingInsts 460427 # count of serializing insts renamed
-system.cpu.rename.tempSerializingInsts 463529 # count of temporary serializing insts renamed
-system.cpu.rename.skidInsts 38187587 # count of insts added to the skid buffer
-system.cpu.memDep0.insertedLoads 17040256 # Number of loads inserted to the mem dependence unit.
-system.cpu.memDep0.insertedStores 10018392 # Number of stores inserted to the mem dependence unit.
-system.cpu.memDep0.conflictingLoads 1266986 # Number of conflicting loads.
-system.cpu.memDep0.conflictingStores 1072258 # Number of conflicting stores.
-system.cpu.iq.iqInstsAdded 825691253 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu.iq.iqNonSpecInstsAdded 1151613 # Number of non-speculative instructions added to the IQ
-system.cpu.iq.iqInstsIssued 820808364 # Number of instructions issued
-system.cpu.iq.iqSquashedInstsIssued 215045 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 22448205 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu.iq.iqSquashedOperandsExamined 33824600 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu.iq.iqSquashedNonSpecRemoved 141893 # Number of squashed non-spec instructions that were removed
-system.cpu.iq.issued_per_cycle::samples 462018901 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::mean 1.776569 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::stdev 2.399860 # Number of insts issued each cycle
+system.cpu.rename.CommittedMaps 961885827 # Number of HB maps that are committed
+system.cpu.rename.UndoneMaps 30718963 # Number of HB maps that are undone due to squashing
+system.cpu.rename.serializingInsts 460377 # count of serializing insts renamed
+system.cpu.rename.tempSerializingInsts 463475 # count of temporary serializing insts renamed
+system.cpu.rename.skidInsts 38191150 # count of insts added to the skid buffer
+system.cpu.memDep0.insertedLoads 17040621 # Number of loads inserted to the mem dependence unit.
+system.cpu.memDep0.insertedStores 10018939 # Number of stores inserted to the mem dependence unit.
+system.cpu.memDep0.conflictingLoads 1267546 # Number of conflicting loads.
+system.cpu.memDep0.conflictingStores 1072117 # Number of conflicting stores.
+system.cpu.iq.iqInstsAdded 825695768 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu.iq.iqNonSpecInstsAdded 1151715 # Number of non-speculative instructions added to the IQ
+system.cpu.iq.iqInstsIssued 820812543 # Number of instructions issued
+system.cpu.iq.iqSquashedInstsIssued 215202 # Number of squashed instructions issued
+system.cpu.iq.iqSquashedInstsExamined 22450912 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedOperandsExamined 33825927 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu.iq.iqSquashedNonSpecRemoved 141995 # Number of squashed non-spec instructions that were removed
+system.cpu.iq.issued_per_cycle::samples 462004671 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::mean 1.776633 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::stdev 2.399879 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::0 278841075 60.35% 60.35% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::1 13664119 2.96% 63.31% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::2 9689206 2.10% 65.41% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::3 6979280 1.51% 66.92% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::4 74151695 16.05% 82.97% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::5 4284933 0.93% 83.89% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::6 72644295 15.72% 99.62% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::7 1183606 0.26% 99.87% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::8 580692 0.13% 100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0 278825933 60.35% 60.35% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1 13663917 2.96% 63.31% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2 9689323 2.10% 65.41% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3 6980180 1.51% 66.92% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::4 74150960 16.05% 82.97% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::5 4285873 0.93% 83.89% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::6 72643996 15.72% 99.62% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::7 1183653 0.26% 99.87% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::8 580836 0.13% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::total 462018901 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::total 462004671 # Number of insts issued each cycle
system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntAlu 1922566 72.06% 72.06% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntAlu 1923038 72.06% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::IntMult 0 0.00% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::IntDiv 0 0.00% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatAdd 0 0.00% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 72.06% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 72.06% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 586085 21.97% 94.02% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 159449 5.98% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 586062 21.96% 94.02% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 159510 5.98% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu.iq.FU_type_0::No_OpClass 284230 0.03% 0.03% # Type of FU issued
-system.cpu.iq.FU_type_0::IntAlu 792921370 96.60% 96.64% # Type of FU issued
-system.cpu.iq.FU_type_0::IntMult 149961 0.02% 96.66% # Type of FU issued
-system.cpu.iq.FU_type_0::IntDiv 126332 0.02% 96.67% # Type of FU issued
+system.cpu.iq.FU_type_0::No_OpClass 284391 0.03% 0.03% # Type of FU issued
+system.cpu.iq.FU_type_0::IntAlu 792925473 96.60% 96.64% # Type of FU issued
+system.cpu.iq.FU_type_0::IntMult 149981 0.02% 96.66% # Type of FU issued
+system.cpu.iq.FU_type_0::IntDiv 126333 0.02% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 89 0.00% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 96.67% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 96.67% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 18051625 2.20% 98.87% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 9274757 1.13% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 18051798 2.20% 98.87% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 9274478 1.13% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::total 820808364 # Type of FU issued
-system.cpu.iq.rate 1.763089 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 2668100 # FU busy when requested
+system.cpu.iq.FU_type_0::total 820812543 # Type of FU issued
+system.cpu.iq.rate 1.763151 # Inst issue rate
+system.cpu.iq.fu_busy_cnt 2668610 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.003251 # FU busy rate (busy events/executed inst)
-system.cpu.iq.int_inst_queue_reads 2106518335 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 849303097 # Number of integer instruction queue writes
-system.cpu.iq.int_inst_queue_wakeup_accesses 816525348 # Number of integer instruction queue wakeup accesses
+system.cpu.iq.int_inst_queue_reads 2106513130 # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_writes 849310448 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_wakeup_accesses 816528938 # Number of integer instruction queue wakeup accesses
system.cpu.iq.fp_inst_queue_reads 438 # Number of floating instruction queue reads
system.cpu.iq.fp_inst_queue_writes 438 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 154 # Number of floating instruction queue wakeup accesses
-system.cpu.iq.int_alu_accesses 823192025 # Number of integer alu accesses
+system.cpu.iq.int_alu_accesses 823196553 # Number of integer alu accesses
system.cpu.iq.fp_alu_accesses 209 # Number of floating point alu accesses
-system.cpu.iew.lsq.thread0.forwLoads 1863548 # Number of loads that had data forwarded from stores
+system.cpu.iew.lsq.thread0.forwLoads 1863533 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread0.squashedLoads 3085191 # Number of loads squashed
-system.cpu.iew.lsq.thread0.ignoredResponses 14446 # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread0.memOrderViolation 13942 # Number of memory ordering violations
-system.cpu.iew.lsq.thread0.squashedStores 1597044 # Number of stores squashed
+system.cpu.iew.lsq.thread0.squashedLoads 3085538 # Number of loads squashed
+system.cpu.iew.lsq.thread0.ignoredResponses 14402 # Number of memory responses ignored because the instruction is squashed
+system.cpu.iew.lsq.thread0.memOrderViolation 13954 # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.squashedStores 1597584 # Number of stores squashed
system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread0.rescheduledLoads 2095832 # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread0.cacheBlocked 68625 # Number of times an access to memory failed due to the cache being blocked
+system.cpu.iew.lsq.thread0.rescheduledLoads 2095829 # Number of loads that were rescheduled
+system.cpu.iew.lsq.thread0.cacheBlocked 68627 # Number of times an access to memory failed due to the cache being blocked
system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu.iew.iewSquashCycles 887209 # Number of cycles IEW is squashing
-system.cpu.iew.iewBlockCycles 206158213 # Number of cycles IEW is blocking
-system.cpu.iew.iewUnblockCycles 15645218 # Number of cycles IEW is unblocking
-system.cpu.iew.iewDispatchedInsts 826842866 # Number of instructions dispatched to IQ
-system.cpu.iew.iewDispSquashedInsts 165190 # Number of squashed instructions skipped by dispatch
-system.cpu.iew.iewDispLoadInsts 17040277 # Number of dispatched load instructions
-system.cpu.iew.iewDispStoreInsts 10018392 # Number of dispatched store instructions
-system.cpu.iew.iewDispNonSpecInsts 682629 # Number of dispatched non-speculative instructions
-system.cpu.iew.iewIQFullEvents 383889 # Number of times the IQ has become full, causing a stall
-system.cpu.iew.iewLSQFullEvents 14436572 # Number of times the LSQ has become full, causing a stall
-system.cpu.iew.memOrderViolationEvents 13942 # Number of memory order violations
-system.cpu.iew.predictedTakenIncorrect 477389 # Number of branches that were predicted taken incorrectly
-system.cpu.iew.predictedNotTakenIncorrect 506444 # Number of branches that were predicted not taken incorrectly
-system.cpu.iew.branchMispredicts 983833 # Number of branch mispredicts detected at execute
-system.cpu.iew.iewExecutedInsts 819298071 # Number of executed instructions
-system.cpu.iew.iewExecLoadInsts 17680302 # Number of load instructions executed
-system.cpu.iew.iewExecSquashedInsts 1386078 # Number of squashed instructions skipped in execute
+system.cpu.iew.iewSquashCycles 887417 # Number of cycles IEW is squashing
+system.cpu.iew.iewBlockCycles 206161533 # Number of cycles IEW is blocking
+system.cpu.iew.iewUnblockCycles 15636111 # Number of cycles IEW is unblocking
+system.cpu.iew.iewDispatchedInsts 826847483 # Number of instructions dispatched to IQ
+system.cpu.iew.iewDispSquashedInsts 165160 # Number of squashed instructions skipped by dispatch
+system.cpu.iew.iewDispLoadInsts 17040642 # Number of dispatched load instructions
+system.cpu.iew.iewDispStoreInsts 10018939 # Number of dispatched store instructions
+system.cpu.iew.iewDispNonSpecInsts 682638 # Number of dispatched non-speculative instructions
+system.cpu.iew.iewIQFullEvents 383814 # Number of times the IQ has become full, causing a stall
+system.cpu.iew.iewLSQFullEvents 14427518 # Number of times the LSQ has become full, causing a stall
+system.cpu.iew.memOrderViolationEvents 13954 # Number of memory order violations
+system.cpu.iew.predictedTakenIncorrect 477334 # Number of branches that were predicted taken incorrectly
+system.cpu.iew.predictedNotTakenIncorrect 506559 # Number of branches that were predicted not taken incorrectly
+system.cpu.iew.branchMispredicts 983893 # Number of branch mispredicts detected at execute
+system.cpu.iew.iewExecutedInsts 819301527 # Number of executed instructions
+system.cpu.iew.iewExecLoadInsts 17680087 # Number of load instructions executed
+system.cpu.iew.iewExecSquashedInsts 1386795 # Number of squashed instructions skipped in execute
system.cpu.iew.exec_swp 0 # number of swp insts executed
system.cpu.iew.exec_nop 0 # number of nop insts executed
-system.cpu.iew.exec_refs 26745461 # number of memory reference insts executed
-system.cpu.iew.exec_branches 82993620 # Number of branches executed
-system.cpu.iew.exec_stores 9065159 # Number of stores executed
-system.cpu.iew.exec_rate 1.759845 # Inst execution rate
-system.cpu.iew.wb_sent 818824421 # cumulative count of insts sent to commit
-system.cpu.iew.wb_count 816525502 # cumulative count of insts written-back
-system.cpu.iew.wb_producers 638690631 # num instructions producing a value
-system.cpu.iew.wb_consumers 1046712832 # num instructions consuming a value
-system.cpu.iew.wb_rate 1.753889 # insts written-back per cycle
-system.cpu.iew.wb_fanout 0.610187 # average fanout of values written-back
-system.cpu.commit.commitSquashedInsts 22323770 # The number of squashed insts skipped by commit
+system.cpu.iew.exec_refs 26745143 # number of memory reference insts executed
+system.cpu.iew.exec_branches 82994335 # Number of branches executed
+system.cpu.iew.exec_stores 9065056 # Number of stores executed
+system.cpu.iew.exec_rate 1.759905 # Inst execution rate
+system.cpu.iew.wb_sent 818828086 # cumulative count of insts sent to commit
+system.cpu.iew.wb_count 816529092 # cumulative count of insts written-back
+system.cpu.iew.wb_producers 638693519 # num instructions producing a value
+system.cpu.iew.wb_consumers 1046716801 # num instructions consuming a value
+system.cpu.iew.wb_rate 1.753950 # insts written-back per cycle
+system.cpu.iew.wb_fanout 0.610188 # average fanout of values written-back
+system.cpu.commit.commitSquashedInsts 22326581 # The number of squashed insts skipped by commit
system.cpu.commit.commitNonSpecStalls 1009720 # The number of times commit has been forced to stall to communicate backwards
-system.cpu.commit.branchMispredicts 855337 # The number of times a branch was mispredicted
-system.cpu.commit.committed_per_cycle::samples 458653605 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::mean 1.753817 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::stdev 2.647498 # Number of insts commited each cycle
+system.cpu.commit.branchMispredicts 855503 # The number of times a branch was mispredicted
+system.cpu.commit.committed_per_cycle::samples 458638769 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::mean 1.753878 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::stdev 2.647523 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::0 288196518 62.84% 62.84% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::1 11088839 2.42% 65.25% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::2 3639702 0.79% 66.05% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::3 74471288 16.24% 82.28% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::4 2429938 0.53% 82.81% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::5 1624365 0.35% 83.17% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::6 1000566 0.22% 83.39% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::7 70851536 15.45% 98.83% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::8 5350853 1.17% 100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0 288181414 62.83% 62.83% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::1 11088145 2.42% 65.25% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::2 3640328 0.79% 66.05% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::3 74471829 16.24% 82.28% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::4 2429591 0.53% 82.81% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::5 1624239 0.35% 83.17% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::6 1000805 0.22% 83.39% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::7 70851455 15.45% 98.83% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::8 5350963 1.17% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::total 458653605 # Number of insts commited each cycle
-system.cpu.commit.committedInsts 406948645 # Number of instructions committed
-system.cpu.commit.committedOps 804394656 # Number of ops (including micro ops) committed
+system.cpu.commit.committed_per_cycle::total 458638769 # Number of insts commited each cycle
+system.cpu.commit.committedInsts 406949634 # Number of instructions committed
+system.cpu.commit.committedOps 804396566 # Number of ops (including micro ops) committed
system.cpu.commit.swp_count 0 # Number of s/w prefetches committed
-system.cpu.commit.refs 22376433 # Number of memory references committed
-system.cpu.commit.loads 13955085 # Number of loads committed
+system.cpu.commit.refs 22376458 # Number of memory references committed
+system.cpu.commit.loads 13955103 # Number of loads committed
system.cpu.commit.membars 448031 # Number of memory barriers committed
-system.cpu.commit.branches 82000673 # Number of branches committed
+system.cpu.commit.branches 82000860 # Number of branches committed
system.cpu.commit.fp_insts 48 # Number of committed floating point instructions.
-system.cpu.commit.int_insts 733377152 # Number of committed integer instructions.
+system.cpu.commit.int_insts 733378889 # Number of committed integer instructions.
system.cpu.commit.function_calls 1155590 # Number of function calls committed.
-system.cpu.commit.op_class_0::No_OpClass 171815 0.02% 0.02% # Class of committed instruction
-system.cpu.commit.op_class_0::IntAlu 781582591 97.16% 97.19% # Class of committed instruction
+system.cpu.commit.op_class_0::No_OpClass 171811 0.02% 0.02% # Class of committed instruction
+system.cpu.commit.op_class_0::IntAlu 781584496 97.16% 97.19% # Class of committed instruction
system.cpu.commit.op_class_0::IntMult 144575 0.02% 97.20% # Class of committed instruction
-system.cpu.commit.op_class_0::IntDiv 121813 0.02% 97.22% # Class of committed instruction
+system.cpu.commit.op_class_0::IntDiv 121797 0.02% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::FloatAdd 0 0.00% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCmp 0 0.00% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCvt 16 0.00% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 97.22% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 97.22% # Class of committed instruction
-system.cpu.commit.op_class_0::MemRead 13952498 1.73% 98.95% # Class of committed instruction
-system.cpu.commit.op_class_0::MemWrite 8421348 1.05% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::MemRead 13952516 1.73% 98.95% # Class of committed instruction
+system.cpu.commit.op_class_0::MemWrite 8421355 1.05% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
-system.cpu.commit.op_class_0::total 804394656 # Class of committed instruction
-system.cpu.commit.bw_lim_events 5350853 # number cycles where commit BW limit reached
-system.cpu.rob.rob_reads 1279942872 # The number of ROB reads
-system.cpu.rob.rob_writes 1656820485 # The number of ROB writes
-system.cpu.timesIdled 287895 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.idleCycles 3532390 # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu.quiesceCycles 9839075158 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
-system.cpu.committedInsts 406948645 # Number of Instructions Simulated
-system.cpu.committedOps 804394656 # Number of Ops (including micro ops) Simulated
-system.cpu.cpi 1.144005 # CPI: Cycles Per Instruction
-system.cpu.cpi_total 1.144005 # CPI: Total CPI of All Threads
-system.cpu.ipc 0.874122 # IPC: Instructions Per Cycle
-system.cpu.ipc_total 0.874122 # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 1088092002 # number of integer regfile reads
-system.cpu.int_regfile_writes 653524498 # number of integer regfile writes
+system.cpu.commit.op_class_0::total 804396566 # Class of committed instruction
+system.cpu.commit.bw_lim_events 5350963 # number cycles where commit BW limit reached
+system.cpu.rob.rob_reads 1279932650 # The number of ROB reads
+system.cpu.rob.rob_writes 1656830555 # The number of ROB writes
+system.cpu.timesIdled 287928 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu.idleCycles 3532567 # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu.quiesceCycles 9839087291 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
+system.cpu.committedInsts 406949634 # Number of Instructions Simulated
+system.cpu.committedOps 804396566 # Number of Ops (including micro ops) Simulated
+system.cpu.cpi 1.143968 # CPI: Cycles Per Instruction
+system.cpu.cpi_total 1.143968 # CPI: Total CPI of All Threads
+system.cpu.ipc 0.874151 # IPC: Instructions Per Cycle
+system.cpu.ipc_total 0.874151 # IPC: Total IPC of All Threads
+system.cpu.int_regfile_reads 1088094227 # number of integer regfile reads
+system.cpu.int_regfile_writes 653527011 # number of integer regfile writes
system.cpu.fp_regfile_reads 154 # number of floating regfile reads
-system.cpu.cc_regfile_reads 414883395 # number of cc regfile reads
-system.cpu.cc_regfile_writes 320972082 # number of cc regfile writes
-system.cpu.misc_regfile_reads 264296844 # number of misc regfile reads
+system.cpu.cc_regfile_reads 414885669 # number of cc regfile reads
+system.cpu.cc_regfile_writes 320973068 # number of cc regfile writes
+system.cpu.misc_regfile_reads 264298420 # number of misc regfile reads
system.cpu.misc_regfile_writes 400155 # number of misc regfile writes
-system.cpu.dcache.tags.replacements 1656669 # number of replacements
+system.cpu.dcache.tags.replacements 1656768 # number of replacements
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system.cpu.dtb_walker_cache.tags.warmup_cycle 199860126500 # Cycle when the warmup percentage was hit.
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+system.cpu.dtb_walker_cache.overall_avg_mshr_miss_latency::total 11875.119255 # average overall mshr miss latency
system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
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+system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.460665 # mshr miss rate for ReadExReq accesses
+system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.460665 # mshr miss rate for ReadExReq accesses
+system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 0.016553 # mshr miss rate for ReadCleanReq accesses
+system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 0.016553 # mshr miss rate for ReadCleanReq accesses
+system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.dtb.walker 0.000991 # mshr miss rate for ReadSharedReq accesses
+system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.itb.walker 0.000416 # mshr miss rate for ReadSharedReq accesses
+system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 0.026082 # mshr miss rate for ReadSharedReq accesses
+system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 0.024747 # mshr miss rate for ReadSharedReq accesses
+system.cpu.l2cache.demand_mshr_miss_rate::cpu.dtb.walker 0.000991 # mshr miss rate for demand accesses
+system.cpu.l2cache.demand_mshr_miss_rate::cpu.itb.walker 0.000416 # mshr miss rate for demand accesses
+system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.016553 # mshr miss rate for demand accesses
+system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.101714 # mshr miss rate for demand accesses
+system.cpu.l2cache.demand_mshr_miss_rate::total 0.068153 # mshr miss rate for demand accesses
+system.cpu.l2cache.overall_mshr_miss_rate::cpu.dtb.walker 0.000991 # mshr miss rate for overall accesses
+system.cpu.l2cache.overall_mshr_miss_rate::cpu.itb.walker 0.000416 # mshr miss rate for overall accesses
+system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.016553 # mshr miss rate for overall accesses
+system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.101714 # mshr miss rate for overall accesses
+system.cpu.l2cache.overall_mshr_miss_rate::total 0.068153 # mshr miss rate for overall accesses
+system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::cpu.data 71524.863760 # average UpgradeReq mshr miss latency
+system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::total 71524.863760 # average UpgradeReq mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 117896.046499 # average ReadExReq mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 117896.046499 # average ReadExReq mshr miss latency
+system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 124289.514335 # average ReadCleanReq mshr miss latency
+system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 124289.514335 # average ReadCleanReq mshr miss latency
+system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.dtb.walker 134554.687500 # average ReadSharedReq mshr miss latency
system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.itb.walker 123000 # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 124549.223742 # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 124566.539871 # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.dtb.walker 134343.750000 # average overall mshr miss latency
+system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 124530.947044 # average ReadSharedReq mshr miss latency
+system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 124548.673061 # average ReadSharedReq mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.dtb.walker 134554.687500 # average overall mshr miss latency
system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.itb.walker 123000 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 124347.049737 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 119306.792556 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 119753.623581 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.dtb.walker 134343.750000 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 124289.514335 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 119301.310316 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::total 119743.629642 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.dtb.walker 134554.687500 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.itb.walker 123000 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 124347.049737 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 119306.792556 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 119753.623581 # average overall mshr miss latency
-system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 158647.225613 # average ReadReq mshr uncacheable latency
-system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total 158647.225613 # average ReadReq mshr uncacheable latency
-system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 188391.238671 # average WriteReq mshr uncacheable latency
-system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total 188391.238671 # average WriteReq mshr uncacheable latency
-system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data 159351.222926 # average overall mshr uncacheable latency
-system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total 159351.222926 # average overall mshr uncacheable latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 124289.514335 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 119301.310316 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::total 119743.629642 # average overall mshr miss latency
+system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 158647.194225 # average ReadReq mshr uncacheable latency
+system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total 158647.194225 # average ReadReq mshr uncacheable latency
+system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 188391.094807 # average WriteReq mshr uncacheable latency
+system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total 188391.094807 # average WriteReq mshr uncacheable latency
+system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data 159351.188875 # average overall mshr uncacheable latency
+system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total 159351.188875 # average overall mshr uncacheable latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.toL2Bus.snoop_filter.tot_requests 5440647 # Total number of requests made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_requests 2708460 # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests 66609 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.snoop_filter.tot_snoops 1238 # Total number of snoops made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1238 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
+system.cpu.toL2Bus.snoop_filter.tot_requests 5440904 # Total number of requests made to the snoop filter.
+system.cpu.toL2Bus.snoop_filter.hit_single_requests 2708527 # Number of requests hitting in the snoop filter with a single holder of the requested data.
+system.cpu.toL2Bus.snoop_filter.hit_multi_requests 66581 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.snoop_filter.tot_snoops 1244 # Total number of snoops made to the snoop filter.
+system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1244 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.cpu.toL2Bus.trans_dist::ReadReq 573460 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadResp 3006256 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp 3006380 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteReq 13902 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteResp 13902 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackDirty 1731980 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackClean 976140 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::CleanEvict 117314 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeReq 2288 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeResp 2288 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExReq 288324 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExResp 288324 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadCleanReq 977872 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadSharedReq 1455461 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WritebackDirty 1732191 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WritebackClean 976106 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::CleanEvict 117351 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeReq 2287 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeResp 2287 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq 288332 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp 288332 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadCleanReq 977836 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadSharedReq 1455618 # Transaction distribution
system.cpu.toL2Bus.trans_dist::MessageReq 1647 # Transaction distribution
system.cpu.toL2Bus.trans_dist::BadAddressError 4 # Transaction distribution
system.cpu.toL2Bus.trans_dist::InvalidateReq 46720 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2931742 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6148479 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 31127 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 166003 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total 9277351 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 125047680 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 207509531 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 939712 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 5524480 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total 339021403 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops 218907 # Total snoops (count)
-system.cpu.toL2Bus.snoop_fanout::samples 3519115 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::mean 0.019900 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::stdev 0.161788 # Request fanout histogram
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2931638 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6148755 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 31077 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 165763 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 9277233 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 125043328 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 207521115 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 938048 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 5501056 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size::total 339003547 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.snoops 219501 # Total snoops (count)
+system.cpu.toL2Bus.snoop_fanout::samples 3519248 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::mean 0.019893 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::stdev 0.161869 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::0 3460821 98.34% 98.34% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::1 46556 1.32% 99.67% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::2 11738 0.33% 100.00% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::0 3461036 98.35% 98.35% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::1 46415 1.32% 99.66% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::2 11797 0.34% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total 3519115 # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy 5581131973 # Layer occupancy (ticks)
+system.cpu.toL2Bus.snoop_fanout::total 3519248 # Request fanout histogram
+system.cpu.toL2Bus.reqLayer0.occupancy 5581428473 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
-system.cpu.toL2Bus.snoopLayer0.occupancy 669284 # Layer occupancy (ticks)
+system.cpu.toL2Bus.snoopLayer0.occupancy 673784 # Layer occupancy (ticks)
system.cpu.toL2Bus.snoopLayer0.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy 1468639319 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.occupancy 1468574841 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy 3067775714 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.occupancy 3067922715 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer2.occupancy 21694467 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer2.occupancy 21677471 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer3.occupancy 106870358 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer3.occupancy 106983360 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
system.iobus.trans_dist::ReadReq 212021 # Transaction distribution
system.iobus.trans_dist::ReadResp 212021 # Transaction distribution
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6588 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6588 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size::total 3262802 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.reqLayer0.occupancy 3986644 # Layer occupancy (ticks)
+system.iobus.reqLayer0.occupancy 3986144 # Layer occupancy (ticks)
system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer1.occupancy 43000 # Layer occupancy (ticks)
system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer2.occupancy 6500 # Layer occupancy (ticks)
system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer3.occupancy 10458500 # Layer occupancy (ticks)
+system.iobus.reqLayer3.occupancy 10452000 # Layer occupancy (ticks)
system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer4.occupancy 146500 # Layer occupancy (ticks)
system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer8.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer9.occupancy 300003000 # Layer occupancy (ticks)
system.iobus.reqLayer9.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer10.occupancy 1174000 # Layer occupancy (ticks)
+system.iobus.reqLayer10.occupancy 1174500 # Layer occupancy (ticks)
system.iobus.reqLayer10.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer11.occupancy 212500 # Layer occupancy (ticks)
system.iobus.reqLayer11.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer13.occupancy 2000 # Layer occupancy (ticks)
system.iobus.reqLayer13.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer14.occupancy 24569000 # Layer occupancy (ticks)
+system.iobus.reqLayer14.occupancy 24568000 # Layer occupancy (ticks)
system.iobus.reqLayer14.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer15.occupancy 10500 # Layer occupancy (ticks)
system.iobus.reqLayer15.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer17.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer18.occupancy 11500 # Layer occupancy (ticks)
system.iobus.reqLayer18.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer19.occupancy 241170809 # Layer occupancy (ticks)
+system.iobus.reqLayer19.occupancy 241169809 # Layer occupancy (ticks)
system.iobus.reqLayer19.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer20.occupancy 1085500 # Layer occupancy (ticks)
system.iobus.reqLayer20.utilization 0.0 # Layer utilization (%)
system.iobus.respLayer2.occupancy 1647000 # Layer occupancy (ticks)
system.iobus.respLayer2.utilization 0.0 # Layer utilization (%)
system.iocache.tags.replacements 47574 # number of replacements
-system.iocache.tags.tagsinuse 0.140720 # Cycle average of tags in use
+system.iocache.tags.tagsinuse 0.140717 # Cycle average of tags in use
system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
system.iocache.tags.sampled_refs 47590 # Sample count of references to valid blocks.
system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
system.iocache.tags.warmup_cycle 4999394542000 # Cycle when the warmup percentage was hit.
-system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.140720 # Average occupied blocks per requestor
+system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.140717 # Average occupied blocks per requestor
system.iocache.tags.occ_percent::pc.south_bridge.ide 0.008795 # Average percentage of cache occupancy
system.iocache.tags.occ_percent::total 0.008795 # Average percentage of cache occupancy
system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
system.iocache.demand_misses::total 909 # number of demand (read+write) misses
system.iocache.overall_misses::pc.south_bridge.ide 909 # number of overall misses
system.iocache.overall_misses::total 909 # number of overall misses
-system.iocache.ReadReq_miss_latency::pc.south_bridge.ide 150240673 # number of ReadReq miss cycles
-system.iocache.ReadReq_miss_latency::total 150240673 # number of ReadReq miss cycles
-system.iocache.WriteLineReq_miss_latency::pc.south_bridge.ide 6073165136 # number of WriteLineReq miss cycles
-system.iocache.WriteLineReq_miss_latency::total 6073165136 # number of WriteLineReq miss cycles
-system.iocache.demand_miss_latency::pc.south_bridge.ide 150240673 # number of demand (read+write) miss cycles
-system.iocache.demand_miss_latency::total 150240673 # number of demand (read+write) miss cycles
-system.iocache.overall_miss_latency::pc.south_bridge.ide 150240673 # number of overall miss cycles
-system.iocache.overall_miss_latency::total 150240673 # number of overall miss cycles
+system.iocache.ReadReq_miss_latency::pc.south_bridge.ide 147582673 # number of ReadReq miss cycles
+system.iocache.ReadReq_miss_latency::total 147582673 # number of ReadReq miss cycles
+system.iocache.WriteLineReq_miss_latency::pc.south_bridge.ide 6073068136 # number of WriteLineReq miss cycles
+system.iocache.WriteLineReq_miss_latency::total 6073068136 # number of WriteLineReq miss cycles
+system.iocache.demand_miss_latency::pc.south_bridge.ide 147582673 # number of demand (read+write) miss cycles
+system.iocache.demand_miss_latency::total 147582673 # number of demand (read+write) miss cycles
+system.iocache.overall_miss_latency::pc.south_bridge.ide 147582673 # number of overall miss cycles
+system.iocache.overall_miss_latency::total 147582673 # number of overall miss cycles
system.iocache.ReadReq_accesses::pc.south_bridge.ide 909 # number of ReadReq accesses(hits+misses)
system.iocache.ReadReq_accesses::total 909 # number of ReadReq accesses(hits+misses)
system.iocache.WriteLineReq_accesses::pc.south_bridge.ide 46720 # number of WriteLineReq accesses(hits+misses)
system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses
system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses
system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses
-system.iocache.ReadReq_avg_miss_latency::pc.south_bridge.ide 165281.268427 # average ReadReq miss latency
-system.iocache.ReadReq_avg_miss_latency::total 165281.268427 # average ReadReq miss latency
-system.iocache.WriteLineReq_avg_miss_latency::pc.south_bridge.ide 129990.692123 # average WriteLineReq miss latency
-system.iocache.WriteLineReq_avg_miss_latency::total 129990.692123 # average WriteLineReq miss latency
-system.iocache.demand_avg_miss_latency::pc.south_bridge.ide 165281.268427 # average overall miss latency
-system.iocache.demand_avg_miss_latency::total 165281.268427 # average overall miss latency
-system.iocache.overall_avg_miss_latency::pc.south_bridge.ide 165281.268427 # average overall miss latency
-system.iocache.overall_avg_miss_latency::total 165281.268427 # average overall miss latency
-system.iocache.blocked_cycles::no_mshrs 1090 # number of cycles access was blocked
+system.iocache.ReadReq_avg_miss_latency::pc.south_bridge.ide 162357.176018 # average ReadReq miss latency
+system.iocache.ReadReq_avg_miss_latency::total 162357.176018 # average ReadReq miss latency
+system.iocache.WriteLineReq_avg_miss_latency::pc.south_bridge.ide 129988.615925 # average WriteLineReq miss latency
+system.iocache.WriteLineReq_avg_miss_latency::total 129988.615925 # average WriteLineReq miss latency
+system.iocache.demand_avg_miss_latency::pc.south_bridge.ide 162357.176018 # average overall miss latency
+system.iocache.demand_avg_miss_latency::total 162357.176018 # average overall miss latency
+system.iocache.overall_avg_miss_latency::pc.south_bridge.ide 162357.176018 # average overall miss latency
+system.iocache.overall_avg_miss_latency::total 162357.176018 # average overall miss latency
+system.iocache.blocked_cycles::no_mshrs 921 # number of cycles access was blocked
system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.iocache.blocked::no_mshrs 104 # number of cycles access was blocked
system.iocache.blocked::no_targets 0 # number of cycles access was blocked
-system.iocache.avg_blocked_cycles::no_mshrs 10.480769 # average number of cycles each access was blocked
+system.iocache.avg_blocked_cycles::no_mshrs 8.855769 # average number of cycles each access was blocked
system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.iocache.fast_writes 0 # number of fast writes performed
system.iocache.cache_copies 0 # number of cache copies performed
system.iocache.demand_mshr_misses::total 909 # number of demand (read+write) MSHR misses
system.iocache.overall_mshr_misses::pc.south_bridge.ide 909 # number of overall MSHR misses
system.iocache.overall_mshr_misses::total 909 # number of overall MSHR misses
-system.iocache.ReadReq_mshr_miss_latency::pc.south_bridge.ide 104790673 # number of ReadReq MSHR miss cycles
-system.iocache.ReadReq_mshr_miss_latency::total 104790673 # number of ReadReq MSHR miss cycles
-system.iocache.WriteLineReq_mshr_miss_latency::pc.south_bridge.ide 3737165136 # number of WriteLineReq MSHR miss cycles
-system.iocache.WriteLineReq_mshr_miss_latency::total 3737165136 # number of WriteLineReq MSHR miss cycles
-system.iocache.demand_mshr_miss_latency::pc.south_bridge.ide 104790673 # number of demand (read+write) MSHR miss cycles
-system.iocache.demand_mshr_miss_latency::total 104790673 # number of demand (read+write) MSHR miss cycles
-system.iocache.overall_mshr_miss_latency::pc.south_bridge.ide 104790673 # number of overall MSHR miss cycles
-system.iocache.overall_mshr_miss_latency::total 104790673 # number of overall MSHR miss cycles
+system.iocache.ReadReq_mshr_miss_latency::pc.south_bridge.ide 102132673 # number of ReadReq MSHR miss cycles
+system.iocache.ReadReq_mshr_miss_latency::total 102132673 # number of ReadReq MSHR miss cycles
+system.iocache.WriteLineReq_mshr_miss_latency::pc.south_bridge.ide 3737068136 # number of WriteLineReq MSHR miss cycles
+system.iocache.WriteLineReq_mshr_miss_latency::total 3737068136 # number of WriteLineReq MSHR miss cycles
+system.iocache.demand_mshr_miss_latency::pc.south_bridge.ide 102132673 # number of demand (read+write) MSHR miss cycles
+system.iocache.demand_mshr_miss_latency::total 102132673 # number of demand (read+write) MSHR miss cycles
+system.iocache.overall_mshr_miss_latency::pc.south_bridge.ide 102132673 # number of overall MSHR miss cycles
+system.iocache.overall_mshr_miss_latency::total 102132673 # number of overall MSHR miss cycles
system.iocache.ReadReq_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for ReadReq accesses
system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses
system.iocache.WriteLineReq_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for WriteLineReq accesses
system.iocache.demand_mshr_miss_rate::total 1 # mshr miss rate for demand accesses
system.iocache.overall_mshr_miss_rate::pc.south_bridge.ide 1 # mshr miss rate for overall accesses
system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
-system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 115281.268427 # average ReadReq mshr miss latency
-system.iocache.ReadReq_avg_mshr_miss_latency::total 115281.268427 # average ReadReq mshr miss latency
-system.iocache.WriteLineReq_avg_mshr_miss_latency::pc.south_bridge.ide 79990.692123 # average WriteLineReq mshr miss latency
-system.iocache.WriteLineReq_avg_mshr_miss_latency::total 79990.692123 # average WriteLineReq mshr miss latency
-system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 115281.268427 # average overall mshr miss latency
-system.iocache.demand_avg_mshr_miss_latency::total 115281.268427 # average overall mshr miss latency
-system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 115281.268427 # average overall mshr miss latency
-system.iocache.overall_avg_mshr_miss_latency::total 115281.268427 # average overall mshr miss latency
+system.iocache.ReadReq_avg_mshr_miss_latency::pc.south_bridge.ide 112357.176018 # average ReadReq mshr miss latency
+system.iocache.ReadReq_avg_mshr_miss_latency::total 112357.176018 # average ReadReq mshr miss latency
+system.iocache.WriteLineReq_avg_mshr_miss_latency::pc.south_bridge.ide 79988.615925 # average WriteLineReq mshr miss latency
+system.iocache.WriteLineReq_avg_mshr_miss_latency::total 79988.615925 # average WriteLineReq mshr miss latency
+system.iocache.demand_avg_mshr_miss_latency::pc.south_bridge.ide 112357.176018 # average overall mshr miss latency
+system.iocache.demand_avg_mshr_miss_latency::total 112357.176018 # average overall mshr miss latency
+system.iocache.overall_avg_mshr_miss_latency::pc.south_bridge.ide 112357.176018 # average overall mshr miss latency
+system.iocache.overall_avg_mshr_miss_latency::total 112357.176018 # average overall mshr miss latency
system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
system.membus.trans_dist::ReadReq 573460 # Transaction distribution
-system.membus.trans_dist::ReadResp 626303 # Transaction distribution
+system.membus.trans_dist::ReadResp 626308 # Transaction distribution
system.membus.trans_dist::WriteReq 13902 # Transaction distribution
system.membus.trans_dist::WriteResp 13902 # Transaction distribution
-system.membus.trans_dist::WritebackDirty 149096 # Transaction distribution
-system.membus.trans_dist::CleanEvict 9693 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 2236 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 1746 # Transaction distribution
+system.membus.trans_dist::WritebackDirty 149106 # Transaction distribution
+system.membus.trans_dist::CleanEvict 9689 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 2235 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 1738 # Transaction distribution
system.membus.trans_dist::ReadExReq 132555 # Transaction distribution
-system.membus.trans_dist::ReadExResp 132550 # Transaction distribution
-system.membus.trans_dist::ReadSharedReq 52847 # Transaction distribution
+system.membus.trans_dist::ReadExResp 132549 # Transaction distribution
+system.membus.trans_dist::ReadSharedReq 52852 # Transaction distribution
system.membus.trans_dist::MessageReq 1647 # Transaction distribution
system.membus.trans_dist::MessageResp 1647 # Transaction distribution
system.membus.trans_dist::BadAddressError 4 # Transaction distribution
system.membus.pkt_count_system.apicbridge.master::total 3294 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 444236 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 730488 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 484035 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 484041 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.membus.badaddr_responder.pio 8 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1658767 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1658773 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141815 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::total 141815 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 1803876 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 1803882 # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6588 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::total 6588 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 228398 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 1460973 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18319744 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total 20009115 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18320640 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::total 20010011 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3015040 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::total 3015040 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 23030743 # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops 1647 # Total snoops (count)
-system.membus.snoop_fanout::samples 982714 # Request fanout histogram
+system.membus.pkt_size::total 23031639 # Cumulative packet size per connected master and slave (bytes)
+system.membus.snoops 1655 # Total snoops (count)
+system.membus.snoop_fanout::samples 982723 # Request fanout histogram
system.membus.snoop_fanout::mean 1.001676 # Request fanout histogram
system.membus.snoop_fanout::stdev 0.040904 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::1 981067 99.83% 99.83% # Request fanout histogram
+system.membus.snoop_fanout::1 981076 99.83% 99.83% # Request fanout histogram
system.membus.snoop_fanout::2 1647 0.17% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 1 # Request fanout histogram
system.membus.snoop_fanout::max_value 2 # Request fanout histogram
-system.membus.snoop_fanout::total 982714 # Request fanout histogram
-system.membus.reqLayer0.occupancy 338956500 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 982723 # Request fanout histogram
+system.membus.reqLayer0.occupancy 338949500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer1.occupancy 369067500 # Layer occupancy (ticks)
+system.membus.reqLayer1.occupancy 369068500 # Layer occupancy (ticks)
system.membus.reqLayer1.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer2.occupancy 3986356 # Layer occupancy (ticks)
+system.membus.reqLayer2.occupancy 3985856 # Layer occupancy (ticks)
system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer3.occupancy 1013629759 # Layer occupancy (ticks)
+system.membus.reqLayer3.occupancy 1013663510 # Layer occupancy (ticks)
system.membus.reqLayer3.utilization 0.0 # Layer utilization (%)
system.membus.reqLayer4.occupancy 5500 # Layer occupancy (ticks)
system.membus.reqLayer4.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer0.occupancy 2339356 # Layer occupancy (ticks)
+system.membus.respLayer0.occupancy 2338856 # Layer occupancy (ticks)
system.membus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer2.occupancy 2140696281 # Layer occupancy (ticks)
+system.membus.respLayer2.occupancy 2140705292 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer4.occupancy 85836693 # Layer occupancy (ticks)
+system.membus.respLayer4.occupancy 85841188 # Layer occupancy (ticks)
system.membus.respLayer4.utilization 0.0 # Layer utilization (%)
system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
---------- Begin Simulation Statistics ----------
sim_seconds 5.140310 # Number of seconds simulated
-sim_ticks 5140310078000 # Number of ticks simulated
-final_tick 5140310078000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_ticks 5140310077000 # Number of ticks simulated
+final_tick 5140310077000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 269101 # Simulator instruction rate (inst/s)
-host_op_rate 534933 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 5691143534 # Simulator tick rate (ticks/s)
-host_mem_usage 1043812 # Number of bytes of host memory used
-host_seconds 903.21 # Real time elapsed on the host
-sim_insts 243055556 # Number of instructions simulated
-sim_ops 483158347 # Number of ops (including micro ops) simulated
+host_inst_rate 193642 # Simulator instruction rate (inst/s)
+host_op_rate 384932 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 4095276555 # Simulator tick rate (ticks/s)
+host_mem_usage 1038092 # Number of bytes of host memory used
+host_seconds 1255.18 # Real time elapsed on the host
+sim_insts 243055842 # Number of instructions simulated
+sim_ops 483158927 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu0.itb.walker 320 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu0.inst 444224 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.inst 444160 # Number of bytes read from this memory
system.physmem.bytes_read::cpu0.data 5333440 # Number of bytes read from this memory
system.physmem.bytes_read::cpu1.inst 157504 # Number of bytes read from this memory
system.physmem.bytes_read::cpu1.data 1822656 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.dtb.walker 1984 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.inst 355648 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.data 3199424 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.dtb.walker 2112 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.inst 355968 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.data 3200064 # Number of bytes read from this memory
system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory
-system.physmem.bytes_read::total 11343552 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu0.inst 444224 # Number of instructions bytes read from this memory
+system.physmem.bytes_read::total 11344576 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu0.inst 444160 # Number of instructions bytes read from this memory
system.physmem.bytes_inst_read::cpu1.inst 157504 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::cpu2.inst 355648 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 957376 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 9153408 # Number of bytes written to this memory
-system.physmem.bytes_written::total 9153408 # Number of bytes written to this memory
+system.physmem.bytes_inst_read::cpu2.inst 355968 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 957632 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 9154432 # Number of bytes written to this memory
+system.physmem.bytes_written::total 9154432 # Number of bytes written to this memory
system.physmem.num_reads::cpu0.itb.walker 5 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu0.inst 6941 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu0.inst 6940 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu0.data 83335 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu1.inst 2461 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu1.data 28479 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.dtb.walker 31 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.inst 5557 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.data 49991 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.dtb.walker 33 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.inst 5562 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.data 50001 # Number of read requests responded to by this memory
system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 177243 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 143022 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 143022 # Number of write requests responded to by this memory
+system.physmem.num_reads::total 177259 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 143038 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 143038 # Number of write requests responded to by this memory
system.physmem.bw_read::cpu0.itb.walker 62 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.inst 86420 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu0.inst 86407 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu0.data 1037572 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu1.inst 30641 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu1.data 354581 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.dtb.walker 386 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.inst 69188 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.data 622418 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.dtb.walker 411 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.inst 69250 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.data 622543 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::pc.south_bridge.ide 5516 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 2206784 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu0.inst 86420 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 2206983 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu0.inst 86407 # Instruction read bandwidth from this memory (bytes/s)
system.physmem.bw_inst_read::cpu1.inst 30641 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu2.inst 69188 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 186249 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 1780711 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 1780711 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 1780711 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu2.inst 69250 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 186298 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 1780910 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 1780910 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 1780910 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu0.itb.walker 62 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.inst 86420 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.inst 86407 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu0.data 1037572 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu1.inst 30641 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu1.data 354581 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.dtb.walker 386 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.inst 69188 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.data 622418 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.dtb.walker 411 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.inst 69250 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.data 622543 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::pc.south_bridge.ide 5516 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 3987495 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 86962 # Number of read requests accepted
-system.physmem.writeReqs 83127 # Number of write requests accepted
-system.physmem.readBursts 86962 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 83127 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 5558208 # Total number of bytes read from DRAM
+system.physmem.bw_total::total 3987893 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 86979 # Number of read requests accepted
+system.physmem.writeReqs 83143 # Number of write requests accepted
+system.physmem.readBursts 86979 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 83143 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 5559296 # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ 7360 # Total number of bytes read from write queue
-system.physmem.bytesWritten 5320128 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 5565568 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 5320128 # Total written bytes from the system interface side
+system.physmem.bytesWritten 5321152 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 5566656 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 5321152 # Total written bytes from the system interface side
system.physmem.servicedByWrQ 115 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs 33935 # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0 5197 # Per bank write bursts
-system.physmem.perBankRdBursts::1 4660 # Per bank write bursts
-system.physmem.perBankRdBursts::2 5410 # Per bank write bursts
+system.physmem.neitherReadNorWriteReqs 33940 # Number of requests that are neither read nor write
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system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
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-system.physmem.rdPerTurnAround::0-511 4011 99.93% 99.93% # Reads before turning the bus around for writes
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system.physmem.rdPerTurnAround::512-1023 1 0.02% 99.95% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::1536-2047 1 0.02% 99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::14336-14847 1 0.02% 100.00% # Reads before turning the bus around for writes
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system.physmem.wrPerTurnAround::0-3 66 1.64% 1.64% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::4-7 4 0.10% 1.74% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::8-11 1 0.02% 1.77% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::12-15 5 0.12% 1.89% # Writes before turning the bus around for reads
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system.physmem.wrPerTurnAround::72-75 4 0.10% 99.08% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::76-79 15 0.37% 99.45% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::84-87 1 0.02% 99.48% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::152-155 1 0.02% 99.95% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::156-159 1 0.02% 99.98% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::160-163 1 0.02% 100.00% # Writes before turning the bus around for reads
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-system.physmem.totMemAccLat 2686545475 # Total ticks spent from burst creation until serviced by the DRAM
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-system.physmem.avgQLat 12184.23 # Average queueing delay per DRAM burst
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system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 30934.23 # Average memory access latency per DRAM burst
+system.physmem.avgMemAccLat 30947.95 # Average memory access latency per DRAM burst
system.physmem.avgRdBW 1.08 # Average DRAM read bandwidth in MiByte/s
-system.physmem.avgWrBW 1.03 # Average achieved write bandwidth in MiByte/s
+system.physmem.avgWrBW 1.04 # Average achieved write bandwidth in MiByte/s
system.physmem.avgRdBWSys 1.08 # Average system read bandwidth in MiByte/s
-system.physmem.avgWrBWSys 1.03 # Average system write bandwidth in MiByte/s
+system.physmem.avgWrBWSys 1.04 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.02 # Data bus utilization in percentage
system.physmem.busUtilRead 0.01 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.01 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.23 # Average read queue length when enqueuing
system.physmem.avgWrQLen 6.40 # Average write queue length when enqueuing
-system.physmem.readRowHits 68775 # Number of row buffer hits during reads
-system.physmem.writeRowHits 61495 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 79.19 # Row buffer hit rate for reads
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+system.physmem.writeRowHits 61507 # Number of row buffer hits during writes
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system.physmem.writeRowHitRate 73.98 # Row buffer hit rate for writes
-system.physmem.avgGap 30198476.95 # Average gap between requests
-system.physmem.pageHitRate 76.64 # Row buffer hit rate, read and write combined
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-system.physmem_0.preEnergy 79191750 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 323902800 # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy 269956800 # Energy for write commands per rank (pJ)
+system.physmem.avgGap 30192618.95 # Average gap between requests
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system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu0.dcache.fast_writes 0 # number of fast writes performed
system.cpu0.dcache.cache_copies 0 # number of cache copies performed
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-system.cpu0.dcache.SoftPFReq_mshr_miss_latency::total 3972690000 # number of SoftPFReq MSHR miss cycles
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-system.cpu0.dcache.demand_mshr_miss_latency::total 17297216896 # number of demand (read+write) MSHR miss cycles
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system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::cpu1.data 30675451000 # number of ReadReq MSHR uncacheable cycles
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-system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::total 63674216500 # number of ReadReq MSHR uncacheable cycles
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system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::cpu1.data 673827500 # number of WriteReq MSHR uncacheable cycles
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system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu1.data 31349278500 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu2.data 33610785500 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::total 64960064000 # number of overall MSHR uncacheable cycles
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system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu1.data 0.060083 # mshr miss rate for ReadReq accesses
-system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu2.data 0.086633 # mshr miss rate for ReadReq accesses
+system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu2.data 0.086629 # mshr miss rate for ReadReq accesses
system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.045028 # mshr miss rate for ReadReq accesses
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-system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu2.data 0.031991 # mshr miss rate for WriteReq accesses
-system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.018219 # mshr miss rate for WriteReq accesses
+system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu2.data 0.031989 # mshr miss rate for WriteReq accesses
+system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.018218 # mshr miss rate for WriteReq accesses
system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu1.data 0.857969 # mshr miss rate for SoftPFReq accesses
-system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu2.data 0.855500 # mshr miss rate for SoftPFReq accesses
-system.cpu0.dcache.SoftPFReq_mshr_miss_rate::total 0.527018 # mshr miss rate for SoftPFReq accesses
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system.cpu0.dcache.demand_mshr_miss_rate::cpu1.data 0.048793 # mshr miss rate for demand accesses
-system.cpu0.dcache.demand_mshr_miss_rate::cpu2.data 0.065299 # mshr miss rate for demand accesses
+system.cpu0.dcache.demand_mshr_miss_rate::cpu2.data 0.065297 # mshr miss rate for demand accesses
system.cpu0.dcache.demand_mshr_miss_rate::total 0.034382 # mshr miss rate for demand accesses
system.cpu0.dcache.overall_mshr_miss_rate::cpu1.data 0.061648 # mshr miss rate for overall accesses
-system.cpu0.dcache.overall_mshr_miss_rate::cpu2.data 0.086356 # mshr miss rate for overall accesses
+system.cpu0.dcache.overall_mshr_miss_rate::cpu2.data 0.086352 # mshr miss rate for overall accesses
system.cpu0.dcache.overall_mshr_miss_rate::total 0.044992 # mshr miss rate for overall accesses
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 13641.719268 # average ReadReq mshr miss latency
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu2.data 14358.953550 # average ReadReq mshr miss latency
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 14167.589917 # average ReadReq mshr miss latency
+system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 13640.978240 # average ReadReq mshr miss latency
+system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu2.data 14361.527674 # average ReadReq mshr miss latency
+system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 14169.282962 # average ReadReq mshr miss latency
system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu1.data 64405.422483 # average WriteReq mshr miss latency
-system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu2.data 57260.664202 # average WriteReq mshr miss latency
-system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 59756.737817 # average WriteReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu1.data 17234.946017 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu2.data 15840.999807 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::total 16174.262473 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu1.data 26774.032837 # average overall mshr miss latency
-system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu2.data 22564.776866 # average overall mshr miss latency
-system.cpu0.dcache.demand_avg_mshr_miss_latency::total 23760.957756 # average overall mshr miss latency
-system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu1.data 24664.978614 # average overall mshr miss latency
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-system.cpu0.dcache.overall_avg_mshr_miss_latency::total 21846.972837 # average overall mshr miss latency
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+system.cpu0.dcache.demand_avg_mshr_miss_latency::total 23762.575134 # average overall mshr miss latency
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system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 173970.095165 # average ReadReq mshr uncacheable latency
-system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu2.data 170516.868883 # average ReadReq mshr uncacheable latency
-system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 172163.203532 # average ReadReq mshr uncacheable latency
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+system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 172163.215699 # average ReadReq mshr uncacheable latency
system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu1.data 192852.747567 # average WriteReq mshr uncacheable latency
-system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu2.data 212802.503477 # average WriteReq mshr uncacheable latency
-system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::total 201859.890110 # average WriteReq mshr uncacheable latency
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+system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::total 201858.084772 # average WriteReq mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 174336.995329 # average overall mshr uncacheable latency
-system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu2.data 171136.088453 # average overall mshr uncacheable latency
-system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 172666.018107 # average overall mshr uncacheable latency
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+system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 172665.999500 # average overall mshr uncacheable latency
system.cpu0.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu0.icache.tags.replacements 862079 # number of replacements
+system.cpu0.icache.tags.replacements 862096 # number of replacements
system.cpu0.icache.tags.tagsinuse 510.743965 # Cycle average of tags in use
-system.cpu0.icache.tags.total_refs 129387157 # Total number of references to valid blocks.
-system.cpu0.icache.tags.sampled_refs 862591 # Sample count of references to valid blocks.
-system.cpu0.icache.tags.avg_refs 149.998269 # Average number of references to valid blocks.
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+system.cpu1.numCycles 2606017773 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
-system.cpu1.committedInsts 35434797 # Number of instructions committed
-system.cpu1.committedOps 68967057 # Number of ops (including micro ops) committed
-system.cpu1.num_int_alu_accesses 63950611 # Number of integer alu accesses
+system.cpu1.committedInsts 35434857 # Number of instructions committed
+system.cpu1.committedOps 68967174 # Number of ops (including micro ops) committed
+system.cpu1.num_int_alu_accesses 63950727 # Number of integer alu accesses
system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses
-system.cpu1.num_func_calls 471158 # number of times a function call or return occured
-system.cpu1.num_conditional_control_insts 6540301 # number of instructions that are conditional controls
-system.cpu1.num_int_insts 63950611 # number of integer instructions
+system.cpu1.num_func_calls 471160 # number of times a function call or return occured
+system.cpu1.num_conditional_control_insts 6540311 # number of instructions that are conditional controls
+system.cpu1.num_int_insts 63950727 # number of integer instructions
system.cpu1.num_fp_insts 0 # number of float instructions
-system.cpu1.num_int_register_reads 118144126 # number of times the integer registers were read
-system.cpu1.num_int_register_writes 55187106 # number of times the integer registers were written
+system.cpu1.num_int_register_reads 118144335 # number of times the integer registers were read
+system.cpu1.num_int_register_writes 55187205 # number of times the integer registers were written
system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written
-system.cpu1.num_cc_register_reads 36132535 # number of times the CC registers were read
-system.cpu1.num_cc_register_writes 26987071 # number of times the CC registers were written
-system.cpu1.num_mem_refs 4484181 # number of memory refs
-system.cpu1.num_load_insts 2795215 # Number of load instructions
-system.cpu1.num_store_insts 1688966 # Number of store instructions
-system.cpu1.num_idle_cycles 2475079667.780020 # Number of idle cycles
-system.cpu1.num_busy_cycles 130938104.219980 # Number of busy cycles
+system.cpu1.num_cc_register_reads 36132607 # number of times the CC registers were read
+system.cpu1.num_cc_register_writes 26987111 # number of times the CC registers were written
+system.cpu1.num_mem_refs 4484202 # number of memory refs
+system.cpu1.num_load_insts 2795233 # Number of load instructions
+system.cpu1.num_store_insts 1688969 # Number of store instructions
+system.cpu1.num_idle_cycles 2475079638.158952 # Number of idle cycles
+system.cpu1.num_busy_cycles 130938134.841048 # Number of busy cycles
system.cpu1.not_idle_fraction 0.050245 # Percentage of non-idle cycles
system.cpu1.idle_fraction 0.949755 # Percentage of idle cycles
-system.cpu1.Branches 7181908 # Number of branches fetched
+system.cpu1.Branches 7181922 # Number of branches fetched
system.cpu1.op_class::No_OpClass 31577 0.05% 0.05% # Class of executed instruction
-system.cpu1.op_class::IntAlu 64398957 93.38% 93.42% # Class of executed instruction
+system.cpu1.op_class::IntAlu 64399053 93.38% 93.42% # Class of executed instruction
system.cpu1.op_class::IntMult 30119 0.04% 93.47% # Class of executed instruction
system.cpu1.op_class::IntDiv 23752 0.03% 93.50% # Class of executed instruction
system.cpu1.op_class::FloatAdd 0 0.00% 93.50% # Class of executed instruction
system.cpu1.op_class::SimdFloatMult 0 0.00% 93.50% # Class of executed instruction
system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 93.50% # Class of executed instruction
system.cpu1.op_class::SimdFloatSqrt 0 0.00% 93.50% # Class of executed instruction
-system.cpu1.op_class::MemRead 2793855 4.05% 97.55% # Class of executed instruction
-system.cpu1.op_class::MemWrite 1688966 2.45% 100.00% # Class of executed instruction
+system.cpu1.op_class::MemRead 2793873 4.05% 97.55% # Class of executed instruction
+system.cpu1.op_class::MemWrite 1688969 2.45% 100.00% # Class of executed instruction
system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu1.op_class::total 68967226 # Class of executed instruction
-system.cpu2.branchPred.lookups 28923329 # Number of BP lookups
-system.cpu2.branchPred.condPredicted 28923329 # Number of conditional branches predicted
-system.cpu2.branchPred.condIncorrect 299282 # Number of conditional branches incorrect
-system.cpu2.branchPred.BTBLookups 26177543 # Number of BTB lookups
-system.cpu2.branchPred.BTBHits 25594622 # Number of BTB hits
+system.cpu1.op_class::total 68967343 # Class of executed instruction
+system.cpu2.branchPred.lookups 28923833 # Number of BP lookups
+system.cpu2.branchPred.condPredicted 28923833 # Number of conditional branches predicted
+system.cpu2.branchPred.condIncorrect 299320 # Number of conditional branches incorrect
+system.cpu2.branchPred.BTBLookups 26177104 # Number of BTB lookups
+system.cpu2.branchPred.BTBHits 25594852 # Number of BTB hits
system.cpu2.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu2.branchPred.BTBHitPct 97.773202 # BTB Hit Percentage
-system.cpu2.branchPred.usedRAS 576797 # Number of times the RAS was used to get a target.
-system.cpu2.branchPred.RASInCorrect 63162 # Number of incorrect RAS predictions.
-system.cpu2.numCycles 157005453 # number of cpu cycles simulated
+system.cpu2.branchPred.BTBHitPct 97.775720 # BTB Hit Percentage
+system.cpu2.branchPred.usedRAS 576883 # Number of times the RAS was used to get a target.
+system.cpu2.branchPred.RASInCorrect 63148 # Number of incorrect RAS predictions.
+system.cpu2.numCycles 157005173 # number of cpu cycles simulated
system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu2.fetch.icacheStallCycles 10540975 # Number of cycles fetch is stalled on an Icache miss
-system.cpu2.fetch.Insts 142872413 # Number of instructions fetch has processed
-system.cpu2.fetch.Branches 28923329 # Number of branches that fetch encountered
-system.cpu2.fetch.predictedBranches 26171419 # Number of branches that fetch has predicted taken
-system.cpu2.fetch.Cycles 144748563 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu2.fetch.SquashCycles 631577 # Number of cycles fetch has spent squashing
-system.cpu2.fetch.TlbCycles 103277 # Number of cycles fetch has spent waiting for tlb
-system.cpu2.fetch.MiscStallCycles 10569 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu2.fetch.icacheStallCycles 10541640 # Number of cycles fetch is stalled on an Icache miss
+system.cpu2.fetch.Insts 142873863 # Number of instructions fetch has processed
+system.cpu2.fetch.Branches 28923833 # Number of branches that fetch encountered
+system.cpu2.fetch.predictedBranches 26171735 # Number of branches that fetch has predicted taken
+system.cpu2.fetch.Cycles 144747848 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu2.fetch.SquashCycles 631807 # Number of cycles fetch has spent squashing
+system.cpu2.fetch.TlbCycles 102981 # Number of cycles fetch has spent waiting for tlb
+system.cpu2.fetch.MiscStallCycles 10810 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
system.cpu2.fetch.PendingDrainCycles 7821 # Number of cycles fetch has spent waiting on pipes to drain
-system.cpu2.fetch.PendingTrapStallCycles 68344 # Number of stall cycles due to pending traps
+system.cpu2.fetch.PendingTrapStallCycles 69710 # Number of stall cycles due to pending traps
system.cpu2.fetch.PendingQuiesceStallCycles 26 # Number of stall cycles due to pending quiesce instructions
-system.cpu2.fetch.IcacheWaitRetryStallCycles 1893 # Number of stall cycles due to full MSHR
-system.cpu2.fetch.CacheLines 3422619 # Number of cache lines fetched
-system.cpu2.fetch.IcacheSquashes 155063 # Number of outstanding Icache misses that were squashed
-system.cpu2.fetch.ItlbSquashes 2960 # Number of outstanding ITLB misses that were squashed
-system.cpu2.fetch.rateDist::samples 155796605 # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::mean 1.805087 # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::stdev 3.007326 # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.IcacheWaitRetryStallCycles 1766 # Number of stall cycles due to full MSHR
+system.cpu2.fetch.CacheLines 3423471 # Number of cache lines fetched
+system.cpu2.fetch.IcacheSquashes 155018 # Number of outstanding Icache misses that were squashed
+system.cpu2.fetch.ItlbSquashes 2920 # Number of outstanding ITLB misses that were squashed
+system.cpu2.fetch.rateDist::samples 155797854 # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::mean 1.805083 # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::stdev 3.007319 # Number of instructions fetched each cycle (Total)
system.cpu2.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::0 100986274 64.82% 64.82% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::1 876971 0.56% 65.38% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::2 23450168 15.05% 80.43% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::3 581136 0.37% 80.81% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::4 798057 0.51% 81.32% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::5 839354 0.54% 81.86% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::6 536255 0.34% 82.20% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::7 727896 0.47% 82.67% # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::8 27000494 17.33% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::0 100986987 64.82% 64.82% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::1 876917 0.56% 65.38% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::2 23450339 15.05% 80.43% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::3 581596 0.37% 80.81% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::4 798015 0.51% 81.32% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::5 839359 0.54% 81.86% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::6 536249 0.34% 82.20% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::7 727748 0.47% 82.67% # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.rateDist::8 27000644 17.33% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu2.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu2.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu2.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.rateDist::total 155796605 # Number of instructions fetched each cycle (Total)
-system.cpu2.fetch.branchRate 0.184219 # Number of branch fetches per cycle
-system.cpu2.fetch.rate 0.909984 # Number of inst fetches per cycle
-system.cpu2.decode.IdleCycles 9166270 # Number of cycles decode is idle
-system.cpu2.decode.BlockedCycles 95860787 # Number of cycles decode is blocked
-system.cpu2.decode.RunCycles 22254534 # Number of cycles decode is running
-system.cpu2.decode.UnblockCycles 3994693 # Number of cycles decode is unblocking
-system.cpu2.decode.SquashCycles 316440 # Number of cycles decode is squashing
-system.cpu2.decode.DecodedInsts 278480395 # Number of instructions handled by decode
-system.cpu2.rename.SquashCycles 316440 # Number of cycles rename is squashing
-system.cpu2.rename.IdleCycles 10781716 # Number of cycles rename is idle
-system.cpu2.rename.BlockCycles 77380942 # Number of cycles rename is blocking
-system.cpu2.rename.serializeStallCycles 5123914 # count of cycles rename stalled for serializing inst
-system.cpu2.rename.RunCycles 24366684 # Number of cycles rename is running
-system.cpu2.rename.UnblockCycles 13623085 # Number of cycles rename is unblocking
-system.cpu2.rename.RenamedInsts 277321096 # Number of instructions processed by rename
-system.cpu2.rename.ROBFullEvents 194260 # Number of times rename has blocked due to ROB full
-system.cpu2.rename.IQFullEvents 5340054 # Number of times rename has blocked due to IQ full
-system.cpu2.rename.LQFullEvents 70865 # Number of times rename has blocked due to LQ full
-system.cpu2.rename.SQFullEvents 6669514 # Number of times rename has blocked due to SQ full
-system.cpu2.rename.RenamedOperands 331396172 # Number of destination operands rename has renamed
-system.cpu2.rename.RenameLookups 605049332 # Number of register rename lookups that rename has made
-system.cpu2.rename.int_rename_lookups 371619608 # Number of integer rename lookups
+system.cpu2.fetch.rateDist::total 155797854 # Number of instructions fetched each cycle (Total)
+system.cpu2.fetch.branchRate 0.184222 # Number of branch fetches per cycle
+system.cpu2.fetch.rate 0.909995 # Number of inst fetches per cycle
+system.cpu2.decode.IdleCycles 9166837 # Number of cycles decode is idle
+system.cpu2.decode.BlockedCycles 95859954 # Number of cycles decode is blocked
+system.cpu2.decode.RunCycles 22256485 # Number of cycles decode is running
+system.cpu2.decode.UnblockCycles 3994112 # Number of cycles decode is unblocking
+system.cpu2.decode.SquashCycles 316555 # Number of cycles decode is squashing
+system.cpu2.decode.DecodedInsts 278482972 # Number of instructions handled by decode
+system.cpu2.rename.SquashCycles 316555 # Number of cycles rename is squashing
+system.cpu2.rename.IdleCycles 10781931 # Number of cycles rename is idle
+system.cpu2.rename.BlockCycles 77376747 # Number of cycles rename is blocking
+system.cpu2.rename.serializeStallCycles 5125883 # count of cycles rename stalled for serializing inst
+system.cpu2.rename.RunCycles 24368379 # Number of cycles rename is running
+system.cpu2.rename.UnblockCycles 13624506 # Number of cycles rename is unblocking
+system.cpu2.rename.RenamedInsts 277324695 # Number of instructions processed by rename
+system.cpu2.rename.ROBFullEvents 194123 # Number of times rename has blocked due to ROB full
+system.cpu2.rename.IQFullEvents 5339465 # Number of times rename has blocked due to IQ full
+system.cpu2.rename.LQFullEvents 70652 # Number of times rename has blocked due to LQ full
+system.cpu2.rename.SQFullEvents 6671965 # Number of times rename has blocked due to SQ full
+system.cpu2.rename.RenamedOperands 331399724 # Number of destination operands rename has renamed
+system.cpu2.rename.RenameLookups 605057293 # Number of register rename lookups that rename has made
+system.cpu2.rename.int_rename_lookups 371622887 # Number of integer rename lookups
system.cpu2.rename.fp_rename_lookups 206 # Number of floating rename lookups
-system.cpu2.rename.CommittedMaps 320040545 # Number of HB maps that are committed
-system.cpu2.rename.UndoneMaps 11355627 # Number of HB maps that are undone due to squashing
-system.cpu2.rename.serializingInsts 162880 # count of serializing insts renamed
-system.cpu2.rename.tempSerializingInsts 164114 # count of temporary serializing insts renamed
-system.cpu2.rename.skidInsts 19801512 # count of insts added to the skid buffer
-system.cpu2.memDep0.insertedLoads 6563978 # Number of loads inserted to the mem dependence unit.
-system.cpu2.memDep0.insertedStores 3714528 # Number of stores inserted to the mem dependence unit.
-system.cpu2.memDep0.conflictingLoads 447098 # Number of conflicting loads.
-system.cpu2.memDep0.conflictingStores 397095 # Number of conflicting stores.
-system.cpu2.iq.iqInstsAdded 275506715 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu2.iq.iqNonSpecInstsAdded 407720 # Number of non-speculative instructions added to the IQ
-system.cpu2.iq.iqInstsIssued 273559358 # Number of instructions issued
-system.cpu2.iq.iqSquashedInstsIssued 95175 # Number of squashed instructions issued
-system.cpu2.iq.iqSquashedInstsExamined 8352705 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu2.iq.iqSquashedOperandsExamined 12694060 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu2.iq.iqSquashedNonSpecRemoved 62726 # Number of squashed non-spec instructions that were removed
-system.cpu2.iq.issued_per_cycle::samples 155796605 # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::mean 1.755875 # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::stdev 2.385543 # Number of insts issued each cycle
+system.cpu2.rename.CommittedMaps 320041085 # Number of HB maps that are committed
+system.cpu2.rename.UndoneMaps 11358639 # Number of HB maps that are undone due to squashing
+system.cpu2.rename.serializingInsts 162877 # count of serializing insts renamed
+system.cpu2.rename.tempSerializingInsts 164126 # count of temporary serializing insts renamed
+system.cpu2.rename.skidInsts 19798687 # count of insts added to the skid buffer
+system.cpu2.memDep0.insertedLoads 6564509 # Number of loads inserted to the mem dependence unit.
+system.cpu2.memDep0.insertedStores 3714734 # Number of stores inserted to the mem dependence unit.
+system.cpu2.memDep0.conflictingLoads 445796 # Number of conflicting loads.
+system.cpu2.memDep0.conflictingStores 396085 # Number of conflicting stores.
+system.cpu2.iq.iqInstsAdded 275510749 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu2.iq.iqNonSpecInstsAdded 407738 # Number of non-speculative instructions added to the IQ
+system.cpu2.iq.iqInstsIssued 273563069 # Number of instructions issued
+system.cpu2.iq.iqSquashedInstsIssued 95252 # Number of squashed instructions issued
+system.cpu2.iq.iqSquashedInstsExamined 8356294 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu2.iq.iqSquashedOperandsExamined 12697185 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu2.iq.iqSquashedNonSpecRemoved 62746 # Number of squashed non-spec instructions that were removed
+system.cpu2.iq.issued_per_cycle::samples 155797854 # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::mean 1.755885 # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::stdev 2.385565 # Number of insts issued each cycle
system.cpu2.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::0 93882329 60.26% 60.26% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::1 5118192 3.29% 63.54% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::2 3721128 2.39% 65.93% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::3 3254343 2.09% 68.02% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::4 23198440 14.89% 82.91% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::5 2207021 1.42% 84.33% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::6 23723391 15.23% 99.56% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::7 467418 0.30% 99.86% # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::8 224343 0.14% 100.00% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::0 93882941 60.26% 60.26% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::1 5118927 3.29% 63.55% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::2 3721264 2.39% 65.93% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::3 3253797 2.09% 68.02% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::4 23197295 14.89% 82.91% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::5 2207034 1.42% 84.33% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::6 23724652 15.23% 99.56% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::7 467591 0.30% 99.86% # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::8 224353 0.14% 100.00% # Number of insts issued each cycle
system.cpu2.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu2.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu2.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu2.iq.issued_per_cycle::total 155796605 # Number of insts issued each cycle
+system.cpu2.iq.issued_per_cycle::total 155797854 # Number of insts issued each cycle
system.cpu2.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu2.iq.fu_full::IntAlu 1207560 81.79% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::IntMult 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::IntDiv 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatAdd 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatCmp 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatCvt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatMult 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatDiv 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::FloatSqrt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdAdd 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdAddAcc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdAlu 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdCmp 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdCvt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdMisc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdMult 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdMultAcc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdShift 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdShiftAcc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdSqrt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatAdd 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatAlu 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatCmp 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatCvt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatDiv 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatMisc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatMult 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatMultAcc 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::SimdFloatSqrt 0 0.00% 81.79% # attempts to use FU when none available
-system.cpu2.iq.fu_full::MemRead 207213 14.03% 95.82% # attempts to use FU when none available
-system.cpu2.iq.fu_full::MemWrite 61669 4.18% 100.00% # attempts to use FU when none available
+system.cpu2.iq.fu_full::IntAlu 1207723 81.78% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::IntMult 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::IntDiv 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatAdd 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatCmp 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatCvt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatMult 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatDiv 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::FloatSqrt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdAdd 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdAddAcc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdAlu 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdCmp 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdCvt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdMisc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdMult 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdMultAcc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdShift 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdShiftAcc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdSqrt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatAdd 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatAlu 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatCmp 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatCvt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatDiv 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatMisc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatMult 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatMultAcc 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::SimdFloatSqrt 0 0.00% 81.78% # attempts to use FU when none available
+system.cpu2.iq.fu_full::MemRead 207267 14.03% 95.81% # attempts to use FU when none available
+system.cpu2.iq.fu_full::MemWrite 61876 4.19% 100.00% # attempts to use FU when none available
system.cpu2.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu2.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu2.iq.FU_type_0::No_OpClass 77609 0.03% 0.03% # Type of FU issued
-system.cpu2.iq.FU_type_0::IntAlu 263069409 96.17% 96.19% # Type of FU issued
-system.cpu2.iq.FU_type_0::IntMult 56423 0.02% 96.21% # Type of FU issued
-system.cpu2.iq.FU_type_0::IntDiv 50250 0.02% 96.23% # Type of FU issued
+system.cpu2.iq.FU_type_0::No_OpClass 77671 0.03% 0.03% # Type of FU issued
+system.cpu2.iq.FU_type_0::IntAlu 263072310 96.17% 96.19% # Type of FU issued
+system.cpu2.iq.FU_type_0::IntMult 56421 0.02% 96.21% # Type of FU issued
+system.cpu2.iq.FU_type_0::IntDiv 50248 0.02% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::FloatAdd 0 0.00% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::FloatCmp 0 0.00% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::FloatCvt 74 0.00% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::SimdFloatMult 0 0.00% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 96.23% # Type of FU issued
system.cpu2.iq.FU_type_0::SimdFloatSqrt 0 0.00% 96.23% # Type of FU issued
-system.cpu2.iq.FU_type_0::MemRead 6863260 2.51% 98.74% # Type of FU issued
-system.cpu2.iq.FU_type_0::MemWrite 3442333 1.26% 100.00% # Type of FU issued
+system.cpu2.iq.FU_type_0::MemRead 6863613 2.51% 98.74% # Type of FU issued
+system.cpu2.iq.FU_type_0::MemWrite 3442732 1.26% 100.00% # Type of FU issued
system.cpu2.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu2.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu2.iq.FU_type_0::total 273559358 # Type of FU issued
-system.cpu2.iq.rate 1.742356 # Inst issue rate
-system.cpu2.iq.fu_busy_cnt 1476442 # FU busy when requested
-system.cpu2.iq.fu_busy_rate 0.005397 # FU busy rate (busy events/executed inst)
-system.cpu2.iq.int_inst_queue_reads 704486629 # Number of integer instruction queue reads
-system.cpu2.iq.int_inst_queue_writes 284271419 # Number of integer instruction queue writes
-system.cpu2.iq.int_inst_queue_wakeup_accesses 272061524 # Number of integer instruction queue wakeup accesses
+system.cpu2.iq.FU_type_0::total 273563069 # Type of FU issued
+system.cpu2.iq.rate 1.742383 # Inst issue rate
+system.cpu2.iq.fu_busy_cnt 1476866 # FU busy when requested
+system.cpu2.iq.fu_busy_rate 0.005399 # FU busy rate (busy events/executed inst)
+system.cpu2.iq.int_inst_queue_reads 704495801 # Number of integer instruction queue reads
+system.cpu2.iq.int_inst_queue_writes 284279079 # Number of integer instruction queue writes
+system.cpu2.iq.int_inst_queue_wakeup_accesses 272064636 # Number of integer instruction queue wakeup accesses
system.cpu2.iq.fp_inst_queue_reads 309 # Number of floating instruction queue reads
system.cpu2.iq.fp_inst_queue_writes 294 # Number of floating instruction queue writes
system.cpu2.iq.fp_inst_queue_wakeup_accesses 118 # Number of floating instruction queue wakeup accesses
-system.cpu2.iq.int_alu_accesses 274958042 # Number of integer alu accesses
+system.cpu2.iq.int_alu_accesses 274962115 # Number of integer alu accesses
system.cpu2.iq.fp_alu_accesses 149 # Number of floating point alu accesses
-system.cpu2.iew.lsq.thread0.forwLoads 723498 # Number of loads that had data forwarded from stores
+system.cpu2.iew.lsq.thread0.forwLoads 723478 # Number of loads that had data forwarded from stores
system.cpu2.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu2.iew.lsq.thread0.squashedLoads 1134318 # Number of loads squashed
-system.cpu2.iew.lsq.thread0.ignoredResponses 5680 # Number of memory responses ignored because the instruction is squashed
-system.cpu2.iew.lsq.thread0.memOrderViolation 5091 # Number of memory ordering violations
-system.cpu2.iew.lsq.thread0.squashedStores 595155 # Number of stores squashed
+system.cpu2.iew.lsq.thread0.squashedLoads 1134849 # Number of loads squashed
+system.cpu2.iew.lsq.thread0.ignoredResponses 5659 # Number of memory responses ignored because the instruction is squashed
+system.cpu2.iew.lsq.thread0.memOrderViolation 5111 # Number of memory ordering violations
+system.cpu2.iew.lsq.thread0.squashedStores 595348 # Number of stores squashed
system.cpu2.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu2.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu2.iew.lsq.thread0.rescheduledLoads 712054 # Number of loads that were rescheduled
-system.cpu2.iew.lsq.thread0.cacheBlocked 23601 # Number of times an access to memory failed due to the cache being blocked
+system.cpu2.iew.lsq.thread0.rescheduledLoads 712058 # Number of loads that were rescheduled
+system.cpu2.iew.lsq.thread0.cacheBlocked 23525 # Number of times an access to memory failed due to the cache being blocked
system.cpu2.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu2.iew.iewSquashCycles 316440 # Number of cycles IEW is squashing
-system.cpu2.iew.iewBlockCycles 69933639 # Number of cycles IEW is blocking
-system.cpu2.iew.iewUnblockCycles 4486006 # Number of cycles IEW is unblocking
-system.cpu2.iew.iewDispatchedInsts 275914435 # Number of instructions dispatched to IQ
-system.cpu2.iew.iewDispSquashedInsts 35023 # Number of squashed instructions skipped by dispatch
-system.cpu2.iew.iewDispLoadInsts 6563978 # Number of dispatched load instructions
-system.cpu2.iew.iewDispStoreInsts 3714528 # Number of dispatched store instructions
-system.cpu2.iew.iewDispNonSpecInsts 243237 # Number of dispatched non-speculative instructions
-system.cpu2.iew.iewIQFullEvents 162474 # Number of times the IQ has become full, causing a stall
-system.cpu2.iew.iewLSQFullEvents 4012628 # Number of times the LSQ has become full, causing a stall
-system.cpu2.iew.memOrderViolationEvents 5091 # Number of memory order violations
-system.cpu2.iew.predictedTakenIncorrect 167077 # Number of branches that were predicted taken incorrectly
-system.cpu2.iew.predictedNotTakenIncorrect 180895 # Number of branches that were predicted not taken incorrectly
-system.cpu2.iew.branchMispredicts 347972 # Number of branch mispredicts detected at execute
-system.cpu2.iew.iewExecutedInsts 273011944 # Number of executed instructions
-system.cpu2.iew.iewExecLoadInsts 6727791 # Number of load instructions executed
-system.cpu2.iew.iewExecSquashedInsts 497508 # Number of squashed instructions skipped in execute
+system.cpu2.iew.iewSquashCycles 316555 # Number of cycles IEW is squashing
+system.cpu2.iew.iewBlockCycles 69932049 # Number of cycles IEW is blocking
+system.cpu2.iew.iewUnblockCycles 4483827 # Number of cycles IEW is unblocking
+system.cpu2.iew.iewDispatchedInsts 275918487 # Number of instructions dispatched to IQ
+system.cpu2.iew.iewDispSquashedInsts 35063 # Number of squashed instructions skipped by dispatch
+system.cpu2.iew.iewDispLoadInsts 6564509 # Number of dispatched load instructions
+system.cpu2.iew.iewDispStoreInsts 3714734 # Number of dispatched store instructions
+system.cpu2.iew.iewDispNonSpecInsts 243249 # Number of dispatched non-speculative instructions
+system.cpu2.iew.iewIQFullEvents 162438 # Number of times the IQ has become full, causing a stall
+system.cpu2.iew.iewLSQFullEvents 4010481 # Number of times the LSQ has become full, causing a stall
+system.cpu2.iew.memOrderViolationEvents 5111 # Number of memory order violations
+system.cpu2.iew.predictedTakenIncorrect 167096 # Number of branches that were predicted taken incorrectly
+system.cpu2.iew.predictedNotTakenIncorrect 181001 # Number of branches that were predicted not taken incorrectly
+system.cpu2.iew.branchMispredicts 348097 # Number of branch mispredicts detected at execute
+system.cpu2.iew.iewExecutedInsts 273015158 # Number of executed instructions
+system.cpu2.iew.iewExecLoadInsts 6728091 # Number of load instructions executed
+system.cpu2.iew.iewExecSquashedInsts 497866 # Number of squashed instructions skipped in execute
system.cpu2.iew.exec_swp 0 # number of swp insts executed
system.cpu2.iew.exec_nop 0 # number of nop insts executed
-system.cpu2.iew.exec_refs 10089541 # number of memory reference insts executed
-system.cpu2.iew.exec_branches 27708179 # Number of branches executed
-system.cpu2.iew.exec_stores 3361750 # Number of stores executed
-system.cpu2.iew.exec_rate 1.738869 # Inst execution rate
-system.cpu2.iew.wb_sent 272840114 # cumulative count of insts sent to commit
-system.cpu2.iew.wb_count 272061642 # cumulative count of insts written-back
-system.cpu2.iew.wb_producers 212265363 # num instructions producing a value
-system.cpu2.iew.wb_consumers 348191102 # num instructions consuming a value
-system.cpu2.iew.wb_rate 1.732817 # insts written-back per cycle
-system.cpu2.iew.wb_fanout 0.609623 # average fanout of values written-back
-system.cpu2.commit.commitSquashedInsts 8350016 # The number of squashed insts skipped by commit
-system.cpu2.commit.commitNonSpecStalls 344994 # The number of times commit has been forced to stall to communicate backwards
-system.cpu2.commit.branchMispredicts 302940 # The number of times a branch was mispredicted
-system.cpu2.commit.committed_per_cycle::samples 154548999 # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::mean 1.731242 # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::stdev 2.636335 # Number of insts commited each cycle
+system.cpu2.iew.exec_refs 10090158 # number of memory reference insts executed
+system.cpu2.iew.exec_branches 27708578 # Number of branches executed
+system.cpu2.iew.exec_stores 3362067 # Number of stores executed
+system.cpu2.iew.exec_rate 1.738893 # Inst execution rate
+system.cpu2.iew.wb_sent 272843265 # cumulative count of insts sent to commit
+system.cpu2.iew.wb_count 272064754 # cumulative count of insts written-back
+system.cpu2.iew.wb_producers 212267822 # num instructions producing a value
+system.cpu2.iew.wb_consumers 348193993 # num instructions consuming a value
+system.cpu2.iew.wb_rate 1.732839 # insts written-back per cycle
+system.cpu2.iew.wb_fanout 0.609625 # average fanout of values written-back
+system.cpu2.commit.commitSquashedInsts 8353767 # The number of squashed insts skipped by commit
+system.cpu2.commit.commitNonSpecStalls 344992 # The number of times commit has been forced to stall to communicate backwards
+system.cpu2.commit.branchMispredicts 303032 # The number of times a branch was mispredicted
+system.cpu2.commit.committed_per_cycle::samples 154549869 # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::mean 1.731235 # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::stdev 2.636337 # Number of insts commited each cycle
system.cpu2.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::0 97452573 63.06% 63.06% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::1 4255618 2.75% 65.81% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::2 1276058 0.83% 66.64% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::3 24388972 15.78% 82.42% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::4 952831 0.62% 83.03% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::5 707614 0.46% 83.49% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::6 433779 0.28% 83.77% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::7 23017420 14.89% 98.66% # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::8 2064134 1.34% 100.00% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::0 97453895 63.06% 63.06% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::1 4255487 2.75% 65.81% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::2 1275451 0.83% 66.64% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::3 24388605 15.78% 82.42% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::4 953115 0.62% 83.03% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::5 708142 0.46% 83.49% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::6 433200 0.28% 83.77% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::7 23018173 14.89% 98.66% # Number of insts commited each cycle
+system.cpu2.commit.committed_per_cycle::8 2063801 1.34% 100.00% # Number of insts commited each cycle
system.cpu2.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu2.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu2.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu2.commit.committed_per_cycle::total 154548999 # Number of insts commited each cycle
-system.cpu2.commit.committedInsts 135671284 # Number of instructions committed
-system.cpu2.commit.committedOps 267561730 # Number of ops (including micro ops) committed
+system.cpu2.commit.committed_per_cycle::total 154549869 # Number of insts commited each cycle
+system.cpu2.commit.committedInsts 135671513 # Number of instructions committed
+system.cpu2.commit.committedOps 267562193 # Number of ops (including micro ops) committed
system.cpu2.commit.swp_count 0 # Number of s/w prefetches committed
-system.cpu2.commit.refs 8549033 # Number of memory references committed
+system.cpu2.commit.refs 8549046 # Number of memory references committed
system.cpu2.commit.loads 5429660 # Number of loads committed
system.cpu2.commit.membars 149565 # Number of memory barriers committed
-system.cpu2.commit.branches 27339879 # Number of branches committed
+system.cpu2.commit.branches 27339925 # Number of branches committed
system.cpu2.commit.fp_insts 48 # Number of committed floating point instructions.
-system.cpu2.commit.int_insts 244517945 # Number of committed integer instructions.
-system.cpu2.commit.function_calls 438137 # Number of function calls committed.
-system.cpu2.commit.op_class_0::No_OpClass 46306 0.02% 0.02% # Class of committed instruction
-system.cpu2.commit.op_class_0::IntAlu 258863559 96.75% 96.77% # Class of committed instruction
+system.cpu2.commit.int_insts 244518367 # Number of committed integer instructions.
+system.cpu2.commit.function_calls 438140 # Number of function calls committed.
+system.cpu2.commit.op_class_0::No_OpClass 46308 0.02% 0.02% # Class of committed instruction
+system.cpu2.commit.op_class_0::IntAlu 258864003 96.75% 96.77% # Class of committed instruction
system.cpu2.commit.op_class_0::IntMult 54521 0.02% 96.79% # Class of committed instruction
-system.cpu2.commit.op_class_0::IntDiv 48345 0.02% 96.80% # Class of committed instruction
+system.cpu2.commit.op_class_0::IntDiv 48349 0.02% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::FloatAdd 0 0.00% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::FloatCmp 0 0.00% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::FloatCvt 16 0.00% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::SimdFloatMultAcc 0 0.00% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::SimdFloatSqrt 0 0.00% 96.80% # Class of committed instruction
system.cpu2.commit.op_class_0::MemRead 5429610 2.03% 98.83% # Class of committed instruction
-system.cpu2.commit.op_class_0::MemWrite 3119373 1.17% 100.00% # Class of committed instruction
+system.cpu2.commit.op_class_0::MemWrite 3119386 1.17% 100.00% # Class of committed instruction
system.cpu2.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu2.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
-system.cpu2.commit.op_class_0::total 267561730 # Class of committed instruction
-system.cpu2.commit.bw_lim_events 2064134 # number cycles where commit BW limit reached
-system.cpu2.rob.rob_reads 428366748 # The number of ROB reads
-system.cpu2.rob.rob_writes 553077080 # The number of ROB writes
-system.cpu2.timesIdled 112413 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu2.idleCycles 1208848 # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu2.quiesceCycles 4910585835 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
-system.cpu2.committedInsts 135671284 # Number of Instructions Simulated
-system.cpu2.committedOps 267561730 # Number of Ops (including micro ops) Simulated
-system.cpu2.cpi 1.157249 # CPI: Cycles Per Instruction
-system.cpu2.cpi_total 1.157249 # CPI: Total CPI of All Threads
-system.cpu2.ipc 0.864118 # IPC: Instructions Per Cycle
-system.cpu2.ipc_total 0.864118 # IPC: Total IPC of All Threads
-system.cpu2.int_regfile_reads 363754203 # number of integer regfile reads
-system.cpu2.int_regfile_writes 218036965 # number of integer regfile writes
+system.cpu2.commit.op_class_0::total 267562193 # Class of committed instruction
+system.cpu2.commit.bw_lim_events 2063801 # number cycles where commit BW limit reached
+system.cpu2.rob.rob_reads 428372162 # The number of ROB reads
+system.cpu2.rob.rob_writes 553085882 # The number of ROB writes
+system.cpu2.timesIdled 112358 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu2.idleCycles 1207319 # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu2.quiesceCycles 4910585893 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
+system.cpu2.committedInsts 135671513 # Number of Instructions Simulated
+system.cpu2.committedOps 267562193 # Number of Ops (including micro ops) Simulated
+system.cpu2.cpi 1.157245 # CPI: Cycles Per Instruction
+system.cpu2.cpi_total 1.157245 # CPI: Total CPI of All Threads
+system.cpu2.ipc 0.864121 # IPC: Instructions Per Cycle
+system.cpu2.ipc_total 0.864121 # IPC: Total IPC of All Threads
+system.cpu2.int_regfile_reads 363757841 # number of integer regfile reads
+system.cpu2.int_regfile_writes 218039219 # number of integer regfile writes
system.cpu2.fp_regfile_reads 73086 # number of floating regfile reads
system.cpu2.fp_regfile_writes 72968 # number of floating regfile writes
-system.cpu2.cc_regfile_reads 138800226 # number of cc regfile reads
-system.cpu2.cc_regfile_writes 106739606 # number of cc regfile writes
-system.cpu2.misc_regfile_reads 88774953 # number of misc regfile reads
-system.cpu2.misc_regfile_writes 143862 # number of misc regfile writes
+system.cpu2.cc_regfile_reads 138801079 # number of cc regfile reads
+system.cpu2.cc_regfile_writes 106740366 # number of cc regfile writes
+system.cpu2.misc_regfile_reads 88776769 # number of misc regfile reads
+system.cpu2.misc_regfile_writes 143860 # number of misc regfile writes
system.iobus.trans_dist::ReadReq 3545348 # Transaction distribution
system.iobus.trans_dist::ReadResp 3545348 # Transaction distribution
system.iobus.trans_dist::WriteReq 57726 # Transaction distribution
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6576 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6576 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size::total 6596152 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.reqLayer0.occupancy 2378920 # Layer occupancy (ticks)
+system.iobus.reqLayer0.occupancy 2378420 # Layer occupancy (ticks)
system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer1.occupancy 41500 # Layer occupancy (ticks)
system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer2.occupancy 2000 # Layer occupancy (ticks)
system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer3.occupancy 5419500 # Layer occupancy (ticks)
+system.iobus.reqLayer3.occupancy 5416500 # Layer occupancy (ticks)
system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer4.occupancy 8500 # Layer occupancy (ticks)
system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer17.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer18.occupancy 11500 # Layer occupancy (ticks)
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system.iobus.reqLayer19.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer20.occupancy 1052000 # Layer occupancy (ticks)
system.iobus.reqLayer20.utilization 0.0 # Layer utilization (%)
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+system.l2c.ReadSharedReq_avg_mshr_miss_latency::total 126048.039216 # average ReadSharedReq mshr miss latency
system.l2c.demand_avg_mshr_miss_latency::cpu1.inst 120352.905323 # average overall mshr miss latency
-system.l2c.demand_avg_mshr_miss_latency::cpu1.data 117015.785265 # average overall mshr miss latency
-system.l2c.demand_avg_mshr_miss_latency::cpu2.dtb.walker 130338.709677 # average overall mshr miss latency
-system.l2c.demand_avg_mshr_miss_latency::cpu2.inst 126261.831924 # average overall mshr miss latency
-system.l2c.demand_avg_mshr_miss_latency::cpu2.data 121631.123891 # average overall mshr miss latency
-system.l2c.demand_avg_mshr_miss_latency::total 120369.010153 # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency::cpu1.data 117018.392963 # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency::cpu2.dtb.walker 130272.727273 # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency::cpu2.inst 126443.905070 # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency::cpu2.data 121629.001134 # average overall mshr miss latency
+system.l2c.demand_avg_mshr_miss_latency::total 120381.005696 # average overall mshr miss latency
system.l2c.overall_avg_mshr_miss_latency::cpu1.inst 120352.905323 # average overall mshr miss latency
-system.l2c.overall_avg_mshr_miss_latency::cpu1.data 117015.785265 # average overall mshr miss latency
-system.l2c.overall_avg_mshr_miss_latency::cpu2.dtb.walker 130338.709677 # average overall mshr miss latency
-system.l2c.overall_avg_mshr_miss_latency::cpu2.inst 126261.831924 # average overall mshr miss latency
-system.l2c.overall_avg_mshr_miss_latency::cpu2.data 121631.123891 # average overall mshr miss latency
-system.l2c.overall_avg_mshr_miss_latency::total 120369.010153 # average overall mshr miss latency
+system.l2c.overall_avg_mshr_miss_latency::cpu1.data 117018.392963 # average overall mshr miss latency
+system.l2c.overall_avg_mshr_miss_latency::cpu2.dtb.walker 130272.727273 # average overall mshr miss latency
+system.l2c.overall_avg_mshr_miss_latency::cpu2.inst 126443.905070 # average overall mshr miss latency
+system.l2c.overall_avg_mshr_miss_latency::cpu2.data 121629.001134 # average overall mshr miss latency
+system.l2c.overall_avg_mshr_miss_latency::total 120381.005696 # average overall mshr miss latency
system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 161470.092329 # average ReadReq mshr uncacheable latency
-system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu2.data 158016.775870 # average ReadReq mshr uncacheable latency
-system.l2c.ReadReq_avg_mshr_uncacheable_latency::total 159663.153512 # average ReadReq mshr uncacheable latency
+system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu2.data 158016.799124 # average ReadReq mshr uncacheable latency
+system.l2c.ReadReq_avg_mshr_uncacheable_latency::total 159663.165679 # average ReadReq mshr uncacheable latency
system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu1.data 181352.604465 # average WriteReq mshr uncacheable latency
-system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu2.data 201296.418637 # average WriteReq mshr uncacheable latency
-system.l2c.WriteReq_avg_mshr_uncacheable_latency::total 190357.064364 # average WriteReq mshr uncacheable latency
+system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu2.data 201291.724618 # average WriteReq mshr uncacheable latency
+system.l2c.WriteReq_avg_mshr_uncacheable_latency::total 190354.945055 # average WriteReq mshr uncacheable latency
system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 161856.420309 # average overall mshr uncacheable latency
-system.l2c.overall_avg_mshr_uncacheable_latency::cpu2.data 158650.551431 # average overall mshr uncacheable latency
-system.l2c.overall_avg_mshr_uncacheable_latency::total 160182.852761 # average overall mshr uncacheable latency
+system.l2c.overall_avg_mshr_uncacheable_latency::cpu2.data 158650.505606 # average overall mshr uncacheable latency
+system.l2c.overall_avg_mshr_uncacheable_latency::total 160182.828839 # average overall mshr uncacheable latency
system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
system.membus.trans_dist::ReadReq 5063565 # Transaction distribution
-system.membus.trans_dist::ReadResp 5112222 # Transaction distribution
+system.membus.trans_dist::ReadResp 5112237 # Transaction distribution
system.membus.trans_dist::WriteReq 13898 # Transaction distribution
system.membus.trans_dist::WriteResp 13898 # Transaction distribution
-system.membus.trans_dist::WritebackDirty 143022 # Transaction distribution
-system.membus.trans_dist::CleanEvict 8552 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 1672 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 1672 # Transaction distribution
-system.membus.trans_dist::ReadExReq 129713 # Transaction distribution
-system.membus.trans_dist::ReadExResp 129713 # Transaction distribution
-system.membus.trans_dist::ReadSharedReq 48657 # Transaction distribution
+system.membus.trans_dist::WritebackDirty 143038 # Transaction distribution
+system.membus.trans_dist::CleanEvict 8555 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 1675 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 1675 # Transaction distribution
+system.membus.trans_dist::ReadExReq 129715 # Transaction distribution
+system.membus.trans_dist::ReadExResp 129715 # Transaction distribution
+system.membus.trans_dist::ReadSharedReq 48672 # Transaction distribution
system.membus.trans_dist::MessageReq 1644 # Transaction distribution
system.membus.trans_dist::MessageResp 1644 # Transaction distribution
system.membus.trans_dist::InvalidateReq 46720 # Transaction distribution
system.membus.pkt_count_system.apicbridge.master::total 3288 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 7110880 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.l2c.mem_side::system.cpu0.interrupts.pio 3044046 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 462447 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.l2c.mem_side::total 10617373 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 462505 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.l2c.mem_side::total 10617431 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141987 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::total 141987 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 10762648 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 10762706 # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::system.cpu0.interrupts.int_slave 6576 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.apicbridge.master::total 6576 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 3561720 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.l2c.mem_side::system.cpu0.interrupts.pio 6088089 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 17501760 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.l2c.mem_side::total 27151569 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 17503808 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.l2c.mem_side::total 27153617 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3025152 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::total 3025152 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 30183297 # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops 664 # Total snoops (count)
-system.membus.snoop_fanout::samples 5457993 # Request fanout histogram
+system.membus.pkt_size::total 30185345 # Cumulative packet size per connected master and slave (bytes)
+system.membus.snoops 665 # Total snoops (count)
+system.membus.snoop_fanout::samples 5458032 # Request fanout histogram
system.membus.snoop_fanout::mean 1.000301 # Request fanout histogram
system.membus.snoop_fanout::stdev 0.017353 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::1 5456349 99.97% 99.97% # Request fanout histogram
+system.membus.snoop_fanout::1 5456388 99.97% 99.97% # Request fanout histogram
system.membus.snoop_fanout::2 1644 0.03% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 1 # Request fanout histogram
system.membus.snoop_fanout::max_value 2 # Request fanout histogram
-system.membus.snoop_fanout::total 5457993 # Request fanout histogram
-system.membus.reqLayer0.occupancy 219248500 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 5458032 # Request fanout histogram
+system.membus.reqLayer0.occupancy 219245500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.membus.reqLayer1.occupancy 286800000 # Layer occupancy (ticks)
system.membus.reqLayer1.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer2.occupancy 2377080 # Layer occupancy (ticks)
+system.membus.reqLayer2.occupancy 2376580 # Layer occupancy (ticks)
system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer3.occupancy 547350354 # Layer occupancy (ticks)
+system.membus.reqLayer3.occupancy 547442853 # Layer occupancy (ticks)
system.membus.reqLayer3.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer0.occupancy 1398080 # Layer occupancy (ticks)
+system.membus.respLayer0.occupancy 1397580 # Layer occupancy (ticks)
system.membus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer2.occupancy 1208209380 # Layer occupancy (ticks)
+system.membus.respLayer2.occupancy 1208317879 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer4.occupancy 52355698 # Layer occupancy (ticks)
+system.membus.respLayer4.occupancy 52360943 # Layer occupancy (ticks)
system.membus.respLayer4.utilization 0.0 # Layer utilization (%)
system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes.
system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes.
system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions.
-system.toL2Bus.snoop_filter.tot_requests 5045321 # Total number of requests made to the snoop filter.
-system.toL2Bus.snoop_filter.hit_single_requests 2544604 # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.toL2Bus.snoop_filter.hit_multi_requests 482 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.toL2Bus.snoop_filter.tot_snoops 1171 # Total number of snoops made to the snoop filter.
-system.toL2Bus.snoop_filter.hit_single_snoops 1171 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
+system.toL2Bus.snoop_filter.tot_requests 5045447 # Total number of requests made to the snoop filter.
+system.toL2Bus.snoop_filter.hit_single_requests 2544703 # Number of requests hitting in the snoop filter with a single holder of the requested data.
+system.toL2Bus.snoop_filter.hit_multi_requests 484 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.toL2Bus.snoop_filter.tot_snoops 1173 # Total number of snoops made to the snoop filter.
+system.toL2Bus.snoop_filter.hit_single_snoops 1173 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.toL2Bus.trans_dist::ReadReq 5213952 # Transaction distribution
-system.toL2Bus.trans_dist::ReadResp 7425084 # Transaction distribution
+system.toL2Bus.trans_dist::ReadReq 5213999 # Transaction distribution
+system.toL2Bus.trans_dist::ReadResp 7425168 # Transaction distribution
system.toL2Bus.trans_dist::WriteReq 13900 # Transaction distribution
system.toL2Bus.trans_dist::WriteResp 13900 # Transaction distribution
-system.toL2Bus.trans_dist::WritebackDirty 1631207 # Transaction distribution
-system.toL2Bus.trans_dist::WritebackClean 861736 # Transaction distribution
-system.toL2Bus.trans_dist::CleanEvict 94941 # Transaction distribution
-system.toL2Bus.trans_dist::UpgradeReq 1656 # Transaction distribution
-system.toL2Bus.trans_dist::UpgradeResp 1656 # Transaction distribution
-system.toL2Bus.trans_dist::ReadExReq 289822 # Transaction distribution
-system.toL2Bus.trans_dist::ReadExResp 289822 # Transaction distribution
-system.toL2Bus.trans_dist::ReadCleanReq 862602 # Transaction distribution
-system.toL2Bus.trans_dist::ReadSharedReq 1349057 # Transaction distribution
+system.toL2Bus.trans_dist::WritebackDirty 1631215 # Transaction distribution
+system.toL2Bus.trans_dist::WritebackClean 861756 # Transaction distribution
+system.toL2Bus.trans_dist::CleanEvict 94957 # Transaction distribution
+system.toL2Bus.trans_dist::UpgradeReq 1659 # Transaction distribution
+system.toL2Bus.trans_dist::UpgradeResp 1659 # Transaction distribution
+system.toL2Bus.trans_dist::ReadExReq 289813 # Transaction distribution
+system.toL2Bus.trans_dist::ReadExResp 289813 # Transaction distribution
+system.toL2Bus.trans_dist::ReadCleanReq 862620 # Transaction distribution
+system.toL2Bus.trans_dist::ReadSharedReq 1349075 # Transaction distribution
system.toL2Bus.trans_dist::MessageReq 979 # Transaction distribution
system.toL2Bus.trans_dist::InvalidateReq 27936 # Transaction distribution
-system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 2586927 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 15072185 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.itb.walker.port::system.l2c.cpu_side 70382 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.dtb.walker.port::system.l2c.cpu_side 205946 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count::total 17935440 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 110356800 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 213581265 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.itb.walker.port::system.l2c.cpu_side 259408 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.dtb.walker.port::system.l2c.cpu_side 748104 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size::total 324945577 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.snoops 226314 # Total snoops (count)
-system.toL2Bus.snoop_fanout::samples 8918759 # Request fanout histogram
-system.toL2Bus.snoop_fanout::mean 0.005043 # Request fanout histogram
-system.toL2Bus.snoop_fanout::stdev 0.070832 # Request fanout histogram
+system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 2586983 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 15072215 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.itb.walker.port::system.l2c.cpu_side 70159 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.dtb.walker.port::system.l2c.cpu_side 206201 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count::total 17935558 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 110359232 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 213581393 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.itb.walker.port::system.l2c.cpu_side 258600 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.dtb.walker.port::system.l2c.cpu_side 748792 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size::total 324948017 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.snoops 226396 # Total snoops (count)
+system.toL2Bus.snoop_fanout::samples 8918852 # Request fanout histogram
+system.toL2Bus.snoop_fanout::mean 0.005051 # Request fanout histogram
+system.toL2Bus.snoop_fanout::stdev 0.070893 # Request fanout histogram
system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.toL2Bus.snoop_fanout::0 8873785 99.50% 99.50% # Request fanout histogram
-system.toL2Bus.snoop_fanout::1 44974 0.50% 100.00% # Request fanout histogram
+system.toL2Bus.snoop_fanout::0 8873800 99.49% 99.49% # Request fanout histogram
+system.toL2Bus.snoop_fanout::1 45052 0.51% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
-system.toL2Bus.snoop_fanout::total 8918759 # Request fanout histogram
-system.toL2Bus.reqLayer0.occupancy 3217757998 # Layer occupancy (ticks)
+system.toL2Bus.snoop_fanout::total 8918852 # Request fanout histogram
+system.toL2Bus.reqLayer0.occupancy 3217820998 # Layer occupancy (ticks)
system.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
-system.toL2Bus.snoopLayer0.occupancy 405376 # Layer occupancy (ticks)
+system.toL2Bus.snoopLayer0.occupancy 406876 # Layer occupancy (ticks)
system.toL2Bus.snoopLayer0.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer0.occupancy 810539408 # Layer occupancy (ticks)
+system.toL2Bus.respLayer0.occupancy 810576399 # Layer occupancy (ticks)
system.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer1.occupancy 1832719254 # Layer occupancy (ticks)
+system.toL2Bus.respLayer1.occupancy 1832733252 # Layer occupancy (ticks)
system.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer2.occupancy 24003478 # Layer occupancy (ticks)
+system.toL2Bus.respLayer2.occupancy 23881478 # Layer occupancy (ticks)
system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer3.occupancy 87328075 # Layer occupancy (ticks)
+system.toL2Bus.respLayer3.occupancy 87500568 # Layer occupancy (ticks)
system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
system.cpu2.kern.inst.arm 0 # number of arm instructions executed
system.cpu2.kern.inst.quiesce 0 # number of quiesce instructions executed
---------- Begin Simulation Statistics ----------
-sim_seconds 0.403830 # Number of seconds simulated
-sim_ticks 403830091000 # Number of ticks simulated
-final_tick 403830091000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.403730 # Number of seconds simulated
+sim_ticks 403729503000 # Number of ticks simulated
+final_tick 403729503000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 95719 # Simulator instruction rate (inst/s)
-host_op_rate 176996 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 46747318 # Simulator tick rate (ticks/s)
-host_mem_usage 431916 # Number of bytes of host memory used
-host_seconds 8638.57 # Real time elapsed on the host
+host_inst_rate 76742 # Simulator instruction rate (inst/s)
+host_op_rate 141905 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 37470018 # Simulator tick rate (ticks/s)
+host_mem_usage 427104 # Number of bytes of host memory used
+host_seconds 10774.73 # Real time elapsed on the host
sim_insts 826877109 # Number of instructions simulated
sim_ops 1528988701 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu.inst 163776 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 24545280 # Number of bytes read from this memory
-system.physmem.bytes_read::total 24709056 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 163776 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 163776 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 18890432 # Number of bytes written to this memory
-system.physmem.bytes_written::total 18890432 # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst 2559 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 383520 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 386079 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 295163 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 295163 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 405557 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 60781206 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 61186763 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 405557 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 405557 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 46778168 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 46778168 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 46778168 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 405557 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 60781206 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 107964931 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 386079 # Number of read requests accepted
-system.physmem.writeReqs 295163 # Number of write requests accepted
-system.physmem.readBursts 386079 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 295163 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 24689408 # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ 19648 # Total number of bytes read from write queue
-system.physmem.bytesWritten 18889088 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 24709056 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 18890432 # Total written bytes from the system interface side
-system.physmem.servicedByWrQ 307 # Number of DRAM read bursts serviced by the write queue
+system.physmem.bytes_read::cpu.inst 163712 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 24543168 # Number of bytes read from this memory
+system.physmem.bytes_read::total 24706880 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 163712 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 163712 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 18889152 # Number of bytes written to this memory
+system.physmem.bytes_written::total 18889152 # Number of bytes written to this memory
+system.physmem.num_reads::cpu.inst 2558 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 383487 # Number of read requests responded to by this memory
+system.physmem.num_reads::total 386045 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 295143 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 295143 # Number of write requests responded to by this memory
+system.physmem.bw_read::cpu.inst 405499 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 60791118 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 61196618 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 405499 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 405499 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 46786653 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 46786653 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 46786653 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 405499 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 60791118 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 107983270 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 386045 # Number of read requests accepted
+system.physmem.writeReqs 295143 # Number of write requests accepted
+system.physmem.readBursts 386045 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 295143 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 24687936 # Total number of bytes read from DRAM
+system.physmem.bytesReadWrQ 18944 # Total number of bytes read from write queue
+system.physmem.bytesWritten 18887232 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 24706880 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 18889152 # Total written bytes from the system interface side
+system.physmem.servicedByWrQ 296 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs 251728 # Number of requests that are neither read nor write
+system.physmem.neitherReadNorWriteReqs 250871 # Number of requests that are neither read nor write
system.physmem.perBankRdBursts::0 24087 # Per bank write bursts
-system.physmem.perBankRdBursts::1 26440 # Per bank write bursts
-system.physmem.perBankRdBursts::2 24835 # Per bank write bursts
-system.physmem.perBankRdBursts::3 24498 # Per bank write bursts
-system.physmem.perBankRdBursts::4 23219 # Per bank write bursts
-system.physmem.perBankRdBursts::5 23721 # Per bank write bursts
-system.physmem.perBankRdBursts::6 24501 # Per bank write bursts
-system.physmem.perBankRdBursts::7 24288 # Per bank write bursts
+system.physmem.perBankRdBursts::1 26442 # Per bank write bursts
+system.physmem.perBankRdBursts::2 24836 # Per bank write bursts
+system.physmem.perBankRdBursts::3 24492 # Per bank write bursts
+system.physmem.perBankRdBursts::4 23224 # Per bank write bursts
+system.physmem.perBankRdBursts::5 23711 # Per bank write bursts
+system.physmem.perBankRdBursts::6 24489 # Per bank write bursts
+system.physmem.perBankRdBursts::7 24279 # Per bank write bursts
system.physmem.perBankRdBursts::8 23633 # Per bank write bursts
-system.physmem.perBankRdBursts::9 23532 # Per bank write bursts
-system.physmem.perBankRdBursts::10 24814 # Per bank write bursts
+system.physmem.perBankRdBursts::9 23527 # Per bank write bursts
+system.physmem.perBankRdBursts::10 24817 # Per bank write bursts
system.physmem.perBankRdBursts::11 23996 # Per bank write bursts
-system.physmem.perBankRdBursts::12 23302 # Per bank write bursts
-system.physmem.perBankRdBursts::13 22925 # Per bank write bursts
-system.physmem.perBankRdBursts::14 24085 # Per bank write bursts
-system.physmem.perBankRdBursts::15 23896 # Per bank write bursts
-system.physmem.perBankWrBursts::0 18615 # Per bank write bursts
+system.physmem.perBankRdBursts::12 23303 # Per bank write bursts
+system.physmem.perBankRdBursts::13 22926 # Per bank write bursts
+system.physmem.perBankRdBursts::14 24088 # Per bank write bursts
+system.physmem.perBankRdBursts::15 23899 # Per bank write bursts
+system.physmem.perBankWrBursts::0 18617 # Per bank write bursts
system.physmem.perBankWrBursts::1 19935 # Per bank write bursts
-system.physmem.perBankWrBursts::2 19196 # Per bank write bursts
-system.physmem.perBankWrBursts::3 19026 # Per bank write bursts
-system.physmem.perBankWrBursts::4 18118 # Per bank write bursts
-system.physmem.perBankWrBursts::5 18514 # Per bank write bursts
-system.physmem.perBankWrBursts::6 19142 # Per bank write bursts
-system.physmem.perBankWrBursts::7 19086 # Per bank write bursts
-system.physmem.perBankWrBursts::8 18651 # Per bank write bursts
-system.physmem.perBankWrBursts::9 17953 # Per bank write bursts
+system.physmem.perBankWrBursts::2 19195 # Per bank write bursts
+system.physmem.perBankWrBursts::3 19025 # Per bank write bursts
+system.physmem.perBankWrBursts::4 18116 # Per bank write bursts
+system.physmem.perBankWrBursts::5 18510 # Per bank write bursts
+system.physmem.perBankWrBursts::6 19136 # Per bank write bursts
+system.physmem.perBankWrBursts::7 19083 # Per bank write bursts
+system.physmem.perBankWrBursts::8 18650 # Per bank write bursts
+system.physmem.perBankWrBursts::9 17952 # Per bank write bursts
system.physmem.perBankWrBursts::10 18925 # Per bank write bursts
-system.physmem.perBankWrBursts::11 17775 # Per bank write bursts
+system.physmem.perBankWrBursts::11 17774 # Per bank write bursts
system.physmem.perBankWrBursts::12 17401 # Per bank write bursts
-system.physmem.perBankWrBursts::13 17016 # Per bank write bursts
-system.physmem.perBankWrBursts::14 17907 # Per bank write bursts
-system.physmem.perBankWrBursts::15 17882 # Per bank write bursts
+system.physmem.perBankWrBursts::13 17014 # Per bank write bursts
+system.physmem.perBankWrBursts::14 17904 # Per bank write bursts
+system.physmem.perBankWrBursts::15 17876 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
-system.physmem.totGap 403830049500 # Total gap between requests
+system.physmem.totGap 403729461000 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 386079 # Read request sizes (log2)
+system.physmem.readPktSize::6 386045 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
-system.physmem.writePktSize::6 295163 # Write request sizes (log2)
-system.physmem.rdQLenPdf::0 380933 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1 4500 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 294 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3 35 # What read queue length does an incoming req see
+system.physmem.writePktSize::6 295143 # Write request sizes (log2)
+system.physmem.rdQLenPdf::0 380927 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1 4486 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 295 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3 31 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4 8 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5 2 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::15 6196 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::16 6591 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::17 16916 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::15 6206 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::16 6612 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::17 16966 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::18 17527 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::19 17623 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::20 17650 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::21 17664 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::22 17651 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::23 17699 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::19 17618 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::20 17652 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::21 17668 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::22 17652 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::23 17703 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::24 17666 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::25 17709 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::26 17701 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::27 17778 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::28 17763 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::29 17758 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::30 17953 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::25 17700 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::26 17697 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::27 17772 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::28 17751 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::29 17746 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::30 17900 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::31 17614 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::32 17545 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::33 41 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::34 22 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::35 11 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::36 6 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::37 10 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::38 6 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::39 6 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::32 17540 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::33 42 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::34 20 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::35 10 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::36 5 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::37 9 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::38 5 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::39 5 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::40 4 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::41 4 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::42 8 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
-system.physmem.bytesPerActivate::samples 146827 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean 296.793805 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean 175.429172 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev 322.898216 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127 54192 36.91% 36.91% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255 39812 27.11% 64.02% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383 13750 9.36% 73.39% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511 7660 5.22% 78.61% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639 5440 3.71% 82.31% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767 4000 2.72% 85.03% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895 3009 2.05% 87.08% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023 2793 1.90% 88.99% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151 16171 11.01% 100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total 146827 # Bytes accessed per row activation
-system.physmem.rdPerTurnAround::samples 17508 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::mean 22.033813 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::stdev 216.830406 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::0-1023 17497 99.94% 99.94% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::1024-2047 6 0.03% 99.97% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::2048-3071 1 0.01% 99.98% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::3072-4095 2 0.01% 99.99% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::7168-8191 1 0.01% 99.99% # Reads before turning the bus around for writes
+system.physmem.bytesPerActivate::samples 146786 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 296.850108 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 175.490764 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 322.864709 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 54135 36.88% 36.88% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 39792 27.11% 63.99% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 13762 9.38% 73.36% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 7666 5.22% 78.59% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 5518 3.76% 82.35% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 3980 2.71% 85.06% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 2950 2.01% 87.07% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 2794 1.90% 88.97% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 16189 11.03% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 146786 # Bytes accessed per row activation
+system.physmem.rdPerTurnAround::samples 17505 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::mean 22.035647 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::stdev 217.931424 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::0-1023 17495 99.94% 99.94% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::1024-2047 5 0.03% 99.97% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::3072-4095 3 0.02% 99.99% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::8192-9215 1 0.01% 99.99% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::26624-27647 1 0.01% 100.00% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::total 17508 # Reads before turning the bus around for writes
-system.physmem.wrPerTurnAround::samples 17508 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::mean 16.857551 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::gmean 16.779124 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::stdev 2.831180 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::16-19 17335 99.01% 99.01% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::20-23 121 0.69% 99.70% # Writes before turning the bus around for reads
+system.physmem.rdPerTurnAround::total 17505 # Reads before turning the bus around for writes
+system.physmem.wrPerTurnAround::samples 17505 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::mean 16.858783 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::gmean 16.780497 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::stdev 2.828638 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::16-19 17323 98.96% 98.96% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::20-23 130 0.74% 99.70% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::24-27 25 0.14% 99.85% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::28-31 8 0.05% 99.89% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::32-35 2 0.01% 99.90% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::36-39 2 0.01% 99.91% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::40-43 2 0.01% 99.93% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::36-39 3 0.02% 99.92% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::40-43 1 0.01% 99.93% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::48-51 1 0.01% 99.93% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::52-55 1 0.01% 99.94% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::60-63 2 0.01% 99.95% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::124-127 2 0.01% 99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::140-143 1 0.01% 99.99% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::216-219 1 0.01% 100.00% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::total 17508 # Writes before turning the bus around for reads
-system.physmem.totQLat 4276128000 # Total ticks spent queuing
-system.physmem.totMemAccLat 11509353000 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 1928860000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 11084.60 # Average queueing delay per DRAM burst
+system.physmem.wrPerTurnAround::total 17505 # Writes before turning the bus around for reads
+system.physmem.totQLat 4275493000 # Total ticks spent queuing
+system.physmem.totMemAccLat 11508286750 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 1928745000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 11083.61 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 29834.60 # Average memory access latency per DRAM burst
-system.physmem.avgRdBW 61.14 # Average DRAM read bandwidth in MiByte/s
-system.physmem.avgWrBW 46.77 # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys 61.19 # Average system read bandwidth in MiByte/s
-system.physmem.avgWrBWSys 46.78 # Average system write bandwidth in MiByte/s
+system.physmem.avgMemAccLat 29833.61 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 61.15 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgWrBW 46.78 # Average achieved write bandwidth in MiByte/s
+system.physmem.avgRdBWSys 61.20 # Average system read bandwidth in MiByte/s
+system.physmem.avgWrBWSys 46.79 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.84 # Data bus utilization in percentage
system.physmem.busUtilRead 0.48 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.37 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.03 # Average read queue length when enqueuing
-system.physmem.avgWrQLen 21.79 # Average write queue length when enqueuing
-system.physmem.readRowHits 318168 # Number of row buffer hits during reads
-system.physmem.writeRowHits 215906 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 82.48 # Row buffer hit rate for reads
-system.physmem.writeRowHitRate 73.15 # Row buffer hit rate for writes
-system.physmem.avgGap 592785.02 # Average gap between requests
-system.physmem.pageHitRate 78.43 # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy 567876960 # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy 309853500 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 1525477200 # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy 982432800 # Energy for write commands per rank (pJ)
-system.physmem_0.refreshEnergy 26375955840 # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy 62051510430 # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy 187864648500 # Energy for precharge background per rank (pJ)
-system.physmem_0.totalEnergy 279677755230 # Total energy per rank (pJ)
-system.physmem_0.averagePower 692.569390 # Core power per rank (mW)
-system.physmem_0.memoryStateTime::IDLE 311979208000 # Time in different power states
-system.physmem_0.memoryStateTime::REF 13484640000 # Time in different power states
+system.physmem.avgWrQLen 21.84 # Average write queue length when enqueuing
+system.physmem.readRowHits 318194 # Number of row buffer hits during reads
+system.physmem.writeRowHits 215867 # Number of row buffer hits during writes
+system.physmem.readRowHitRate 82.49 # Row buffer hit rate for reads
+system.physmem.writeRowHitRate 73.14 # Row buffer hit rate for writes
+system.physmem.avgGap 592684.34 # Average gap between requests
+system.physmem.pageHitRate 78.44 # Row buffer hit rate, read and write combined
+system.physmem_0.actEnergy 567559440 # Energy for activate commands per rank (pJ)
+system.physmem_0.preEnergy 309680250 # Energy for precharge commands per rank (pJ)
+system.physmem_0.readEnergy 1525227600 # Energy for read commands per rank (pJ)
+system.physmem_0.writeEnergy 982283760 # Energy for write commands per rank (pJ)
+system.physmem_0.refreshEnergy 26369344560 # Energy for refresh commands per rank (pJ)
+system.physmem_0.actBackEnergy 61980966945 # Energy for active background per rank (pJ)
+system.physmem_0.preBackEnergy 187865787750 # Energy for precharge background per rank (pJ)
+system.physmem_0.totalEnergy 279600850305 # Total energy per rank (pJ)
+system.physmem_0.averagePower 692.552566 # Core power per rank (mW)
+system.physmem_0.memoryStateTime::IDLE 311981579750 # Time in different power states
+system.physmem_0.memoryStateTime::REF 13481260000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_0.memoryStateTime::ACT 78362495750 # Time in different power states
+system.physmem_0.memoryStateTime::ACT 78262397250 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.physmem_1.actEnergy 541779840 # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy 295614000 # Energy for precharge commands per rank (pJ)
+system.physmem_1.actEnergy 541772280 # Energy for activate commands per rank (pJ)
+system.physmem_1.preEnergy 295609875 # Energy for precharge commands per rank (pJ)
system.physmem_1.readEnergy 1483021800 # Energy for read commands per rank (pJ)
-system.physmem_1.writeEnergy 929672640 # Energy for write commands per rank (pJ)
-system.physmem_1.refreshEnergy 26375955840 # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy 60320910060 # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy 189382719000 # Energy for precharge background per rank (pJ)
-system.physmem_1.totalEnergy 279329673180 # Total energy per rank (pJ)
-system.physmem_1.averagePower 691.707431 # Core power per rank (mW)
-system.physmem_1.memoryStateTime::IDLE 314516116250 # Time in different power states
-system.physmem_1.memoryStateTime::REF 13484640000 # Time in different power states
+system.physmem_1.writeEnergy 929607840 # Energy for write commands per rank (pJ)
+system.physmem_1.refreshEnergy 26369344560 # Energy for refresh commands per rank (pJ)
+system.physmem_1.actBackEnergy 60334101000 # Energy for active background per rank (pJ)
+system.physmem_1.preBackEnergy 189310415250 # Energy for precharge background per rank (pJ)
+system.physmem_1.totalEnergy 279263872605 # Total energy per rank (pJ)
+system.physmem_1.averagePower 691.717871 # Core power per rank (mW)
+system.physmem_1.memoryStateTime::IDLE 314398189250 # Time in different power states
+system.physmem_1.memoryStateTime::REF 13481260000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_1.memoryStateTime::ACT 75825587500 # Time in different power states
+system.physmem_1.memoryStateTime::ACT 75845673250 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.cpu.branchPred.lookups 219264229 # Number of BP lookups
-system.cpu.branchPred.condPredicted 219264229 # Number of conditional branches predicted
-system.cpu.branchPred.condIncorrect 8531047 # Number of conditional branches incorrect
-system.cpu.branchPred.BTBLookups 124002696 # Number of BTB lookups
-system.cpu.branchPred.BTBHits 121802201 # Number of BTB hits
+system.cpu.branchPred.lookups 219274987 # Number of BP lookups
+system.cpu.branchPred.condPredicted 219274987 # Number of conditional branches predicted
+system.cpu.branchPred.condIncorrect 8531522 # Number of conditional branches incorrect
+system.cpu.branchPred.BTBLookups 123993741 # Number of BTB lookups
+system.cpu.branchPred.BTBHits 121807441 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.branchPred.BTBHitPct 98.225446 # BTB Hit Percentage
-system.cpu.branchPred.usedRAS 27063113 # Number of times the RAS was used to get a target.
-system.cpu.branchPred.RASInCorrect 1406921 # Number of incorrect RAS predictions.
+system.cpu.branchPred.BTBHitPct 98.236766 # BTB Hit Percentage
+system.cpu.branchPred.usedRAS 27065979 # Number of times the RAS was used to get a target.
+system.cpu.branchPred.RASInCorrect 1406611 # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks
system.cpu.workload.num_syscalls 551 # Number of system calls
-system.cpu.numCycles 807660183 # number of cpu cycles simulated
+system.cpu.numCycles 807459007 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.fetch.icacheStallCycles 175911242 # Number of cycles fetch is stalled on an Icache miss
-system.cpu.fetch.Insts 1208663462 # Number of instructions fetch has processed
-system.cpu.fetch.Branches 219264229 # Number of branches that fetch encountered
-system.cpu.fetch.predictedBranches 148865314 # Number of branches that fetch has predicted taken
-system.cpu.fetch.Cycles 621862787 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu.fetch.SquashCycles 17775835 # Number of cycles fetch has spent squashing
-system.cpu.fetch.TlbCycles 233 # Number of cycles fetch has spent waiting for tlb
-system.cpu.fetch.MiscStallCycles 94904 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu.fetch.PendingTrapStallCycles 745978 # Number of stall cycles due to pending traps
-system.cpu.fetch.PendingQuiesceStallCycles 1264 # Number of stall cycles due to pending quiesce instructions
-system.cpu.fetch.IcacheWaitRetryStallCycles 17 # Number of stall cycles due to full MSHR
-system.cpu.fetch.CacheLines 170762091 # Number of cache lines fetched
-system.cpu.fetch.IcacheSquashes 2319100 # Number of outstanding Icache misses that were squashed
+system.cpu.fetch.icacheStallCycles 175909904 # Number of cycles fetch is stalled on an Icache miss
+system.cpu.fetch.Insts 1208657074 # Number of instructions fetch has processed
+system.cpu.fetch.Branches 219274987 # Number of branches that fetch encountered
+system.cpu.fetch.predictedBranches 148873420 # Number of branches that fetch has predicted taken
+system.cpu.fetch.Cycles 621672943 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu.fetch.SquashCycles 17773933 # Number of cycles fetch has spent squashing
+system.cpu.fetch.TlbCycles 228 # Number of cycles fetch has spent waiting for tlb
+system.cpu.fetch.MiscStallCycles 93572 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu.fetch.PendingTrapStallCycles 739186 # Number of stall cycles due to pending traps
+system.cpu.fetch.PendingQuiesceStallCycles 1184 # Number of stall cycles due to pending quiesce instructions
+system.cpu.fetch.IcacheWaitRetryStallCycles 20 # Number of stall cycles due to full MSHR
+system.cpu.fetch.CacheLines 170767375 # Number of cache lines fetched
+system.cpu.fetch.IcacheSquashes 2320347 # Number of outstanding Icache misses that were squashed
system.cpu.fetch.ItlbSquashes 3 # Number of outstanding ITLB misses that were squashed
-system.cpu.fetch.rateDist::samples 807504342 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::mean 2.785127 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::stdev 3.367664 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::samples 807304003 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::mean 2.785786 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::stdev 3.367608 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::0 417532473 51.71% 51.71% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::1 32497368 4.02% 55.73% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::2 31891068 3.95% 59.68% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::3 32657877 4.04% 63.72% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::4 26554759 3.29% 67.01% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::5 26902865 3.33% 70.34% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::6 35168137 4.36% 74.70% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::7 31391832 3.89% 78.59% # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::8 172907963 21.41% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::0 417240348 51.68% 51.68% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::1 32574428 4.03% 55.72% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::2 31907657 3.95% 59.67% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::3 32681653 4.05% 63.72% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::4 26580392 3.29% 67.01% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::5 26881376 3.33% 70.34% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::6 35152240 4.35% 74.70% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::7 31387341 3.89% 78.58% # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.rateDist::8 172898568 21.42% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.rateDist::total 807504342 # Number of instructions fetched each cycle (Total)
-system.cpu.fetch.branchRate 0.271481 # Number of branch fetches per cycle
-system.cpu.fetch.rate 1.496500 # Number of inst fetches per cycle
-system.cpu.decode.IdleCycles 120449956 # Number of cycles decode is idle
-system.cpu.decode.BlockedCycles 370877919 # Number of cycles decode is blocked
-system.cpu.decode.RunCycles 225251519 # Number of cycles decode is running
-system.cpu.decode.UnblockCycles 82037031 # Number of cycles decode is unblocking
-system.cpu.decode.SquashCycles 8887917 # Number of cycles decode is squashing
-system.cpu.decode.DecodedInsts 2132109647 # Number of instructions handled by decode
-system.cpu.rename.SquashCycles 8887917 # Number of cycles rename is squashing
-system.cpu.rename.IdleCycles 152555499 # Number of cycles rename is idle
-system.cpu.rename.BlockCycles 150771591 # Number of cycles rename is blocking
-system.cpu.rename.serializeStallCycles 44475 # count of cycles rename stalled for serializing inst
-system.cpu.rename.RunCycles 271462113 # Number of cycles rename is running
-system.cpu.rename.UnblockCycles 223782747 # Number of cycles rename is unblocking
-system.cpu.rename.RenamedInsts 2088438662 # Number of instructions processed by rename
-system.cpu.rename.ROBFullEvents 138448 # Number of times rename has blocked due to ROB full
-system.cpu.rename.IQFullEvents 138151621 # Number of times rename has blocked due to IQ full
-system.cpu.rename.LQFullEvents 24868058 # Number of times rename has blocked due to LQ full
-system.cpu.rename.SQFullEvents 50731794 # Number of times rename has blocked due to SQ full
-system.cpu.rename.RenamedOperands 2190645258 # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups 5278038161 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 3357041251 # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups 59967 # Number of floating rename lookups
+system.cpu.fetch.rateDist::total 807304003 # Number of instructions fetched each cycle (Total)
+system.cpu.fetch.branchRate 0.271562 # Number of branch fetches per cycle
+system.cpu.fetch.rate 1.496865 # Number of inst fetches per cycle
+system.cpu.decode.IdleCycles 120520385 # Number of cycles decode is idle
+system.cpu.decode.BlockedCycles 370608769 # Number of cycles decode is blocked
+system.cpu.decode.RunCycles 225149515 # Number of cycles decode is running
+system.cpu.decode.UnblockCycles 82138368 # Number of cycles decode is unblocking
+system.cpu.decode.SquashCycles 8886966 # Number of cycles decode is squashing
+system.cpu.decode.DecodedInsts 2132102743 # Number of instructions handled by decode
+system.cpu.rename.SquashCycles 8886966 # Number of cycles rename is squashing
+system.cpu.rename.IdleCycles 152568309 # Number of cycles rename is idle
+system.cpu.rename.BlockCycles 150685768 # Number of cycles rename is blocking
+system.cpu.rename.serializeStallCycles 43752 # count of cycles rename stalled for serializing inst
+system.cpu.rename.RunCycles 271514393 # Number of cycles rename is running
+system.cpu.rename.UnblockCycles 223604815 # Number of cycles rename is unblocking
+system.cpu.rename.RenamedInsts 2088452096 # Number of instructions processed by rename
+system.cpu.rename.ROBFullEvents 136935 # Number of times rename has blocked due to ROB full
+system.cpu.rename.IQFullEvents 138015544 # Number of times rename has blocked due to IQ full
+system.cpu.rename.LQFullEvents 24816035 # Number of times rename has blocked due to LQ full
+system.cpu.rename.SQFullEvents 50717991 # Number of times rename has blocked due to SQ full
+system.cpu.rename.RenamedOperands 2190623283 # Number of destination operands rename has renamed
+system.cpu.rename.RenameLookups 5277995133 # Number of register rename lookups that rename has made
+system.cpu.rename.int_rename_lookups 3356987177 # Number of integer rename lookups
+system.cpu.rename.fp_rename_lookups 59736 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 1614040854 # Number of HB maps that are committed
-system.cpu.rename.UndoneMaps 576604404 # Number of HB maps that are undone due to squashing
-system.cpu.rename.serializingInsts 3331 # count of serializing insts renamed
-system.cpu.rename.tempSerializingInsts 3057 # count of temporary serializing insts renamed
-system.cpu.rename.skidInsts 422478077 # count of insts added to the skid buffer
-system.cpu.memDep0.insertedLoads 507119798 # Number of loads inserted to the mem dependence unit.
-system.cpu.memDep0.insertedStores 200816388 # Number of stores inserted to the mem dependence unit.
-system.cpu.memDep0.conflictingLoads 229077730 # Number of conflicting loads.
-system.cpu.memDep0.conflictingStores 68200212 # Number of conflicting stores.
-system.cpu.iq.iqInstsAdded 2023068034 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu.iq.iqNonSpecInstsAdded 22911 # Number of non-speculative instructions added to the IQ
-system.cpu.iq.iqInstsIssued 1788999576 # Number of instructions issued
-system.cpu.iq.iqSquashedInstsIssued 413303 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 494102244 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu.iq.iqSquashedOperandsExamined 832764755 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu.iq.iqSquashedNonSpecRemoved 22359 # Number of squashed non-spec instructions that were removed
-system.cpu.iq.issued_per_cycle::samples 807504342 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::mean 2.215467 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::stdev 2.071001 # Number of insts issued each cycle
+system.cpu.rename.UndoneMaps 576582429 # Number of HB maps that are undone due to squashing
+system.cpu.rename.serializingInsts 3320 # count of serializing insts renamed
+system.cpu.rename.tempSerializingInsts 3053 # count of temporary serializing insts renamed
+system.cpu.rename.skidInsts 422372622 # count of insts added to the skid buffer
+system.cpu.memDep0.insertedLoads 507122898 # Number of loads inserted to the mem dependence unit.
+system.cpu.memDep0.insertedStores 200817266 # Number of stores inserted to the mem dependence unit.
+system.cpu.memDep0.conflictingLoads 229152229 # Number of conflicting loads.
+system.cpu.memDep0.conflictingStores 68250410 # Number of conflicting stores.
+system.cpu.iq.iqInstsAdded 2023093893 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu.iq.iqNonSpecInstsAdded 22490 # Number of non-speculative instructions added to the IQ
+system.cpu.iq.iqInstsIssued 1789041324 # Number of instructions issued
+system.cpu.iq.iqSquashedInstsIssued 413281 # Number of squashed instructions issued
+system.cpu.iq.iqSquashedInstsExamined 494127682 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedOperandsExamined 832693724 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu.iq.iqSquashedNonSpecRemoved 21938 # Number of squashed non-spec instructions that were removed
+system.cpu.iq.issued_per_cycle::samples 807304003 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::mean 2.216069 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::stdev 2.071086 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::0 238908265 29.59% 29.59% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::1 123628552 15.31% 44.90% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::2 118817632 14.71% 59.61% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::3 107769877 13.35% 72.96% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::4 89573603 11.09% 84.05% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::5 60241832 7.46% 91.51% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::6 42310466 5.24% 96.75% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::7 18973159 2.35% 99.10% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::8 7280956 0.90% 100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0 238827775 29.58% 29.58% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1 123535270 15.30% 44.89% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2 118660489 14.70% 59.58% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3 107754933 13.35% 72.93% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::4 89757341 11.12% 84.05% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::5 60254934 7.46% 91.51% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::6 42261668 5.23% 96.75% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::7 18966509 2.35% 99.10% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::8 7285084 0.90% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::total 807504342 # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::total 807304003 # Number of insts issued each cycle
system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntAlu 11498712 42.77% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntMult 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::IntDiv 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatAdd 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCmp 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatCvt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatMult 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatDiv 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::FloatSqrt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAdd 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdAlu 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCmp 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdCvt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMisc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMult 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShift 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdSqrt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 42.77% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 12295029 45.73% 88.49% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 3093590 11.51% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntAlu 11494986 42.61% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntMult 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntDiv 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatAdd 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCmp 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCvt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMult 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatDiv 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatSqrt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAdd 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAlu 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCmp 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCvt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMisc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMult 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShift 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdSqrt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 42.61% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 12377047 45.88% 88.50% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 3103525 11.50% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu.iq.FU_type_0::No_OpClass 2718967 0.15% 0.15% # Type of FU issued
-system.cpu.iq.FU_type_0::IntAlu 1183065523 66.13% 66.28% # Type of FU issued
-system.cpu.iq.FU_type_0::IntMult 369413 0.02% 66.30% # Type of FU issued
-system.cpu.iq.FU_type_0::IntDiv 3881231 0.22% 66.52% # Type of FU issued
+system.cpu.iq.FU_type_0::No_OpClass 2717072 0.15% 0.15% # Type of FU issued
+system.cpu.iq.FU_type_0::IntAlu 1183096351 66.13% 66.28% # Type of FU issued
+system.cpu.iq.FU_type_0::IntMult 369503 0.02% 66.30% # Type of FU issued
+system.cpu.iq.FU_type_0::IntDiv 3881165 0.22% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::FloatAdd 133 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.52% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatMult 60 0.00% 66.52% # Type of FU issued
-system.cpu.iq.FU_type_0::FloatDiv 380 0.00% 66.52% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMult 59 0.00% 66.52% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatDiv 366 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.52% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.52% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 428545273 23.95% 90.47% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 170418596 9.53% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 428542339 23.95% 90.47% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 170434336 9.53% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu.iq.FU_type_0::total 1788999576 # Type of FU issued
-system.cpu.iq.rate 2.215040 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 26887331 # FU busy when requested
-system.cpu.iq.fu_busy_rate 0.015029 # FU busy rate (busy events/executed inst)
-system.cpu.iq.int_inst_queue_reads 4412774566 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 2517442986 # Number of integer instruction queue writes
-system.cpu.iq.int_inst_queue_wakeup_accesses 1762358918 # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads 29562 # Number of floating instruction queue reads
-system.cpu.iq.fp_inst_queue_writes 69250 # Number of floating instruction queue writes
-system.cpu.iq.fp_inst_queue_wakeup_accesses 5611 # Number of floating instruction queue wakeup accesses
-system.cpu.iq.int_alu_accesses 1813154984 # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses 12956 # Number of floating point alu accesses
-system.cpu.iew.lsq.thread0.forwLoads 186087729 # Number of loads that had data forwarded from stores
+system.cpu.iq.FU_type_0::total 1789041324 # Type of FU issued
+system.cpu.iq.rate 2.215644 # Inst issue rate
+system.cpu.iq.fu_busy_cnt 26975558 # FU busy when requested
+system.cpu.iq.fu_busy_rate 0.015078 # FU busy rate (busy events/executed inst)
+system.cpu.iq.int_inst_queue_reads 4412746171 # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_writes 2517494100 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_wakeup_accesses 1762401602 # Number of integer instruction queue wakeup accesses
+system.cpu.iq.fp_inst_queue_reads 29319 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_writes 68666 # Number of floating instruction queue writes
+system.cpu.iq.fp_inst_queue_wakeup_accesses 5587 # Number of floating instruction queue wakeup accesses
+system.cpu.iq.int_alu_accesses 1813286934 # Number of integer alu accesses
+system.cpu.iq.fp_alu_accesses 12876 # Number of floating point alu accesses
+system.cpu.iew.lsq.thread0.forwLoads 186139067 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread0.squashedLoads 123020037 # Number of loads squashed
-system.cpu.iew.lsq.thread0.ignoredResponses 213128 # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread0.memOrderViolation 372787 # Number of memory ordering violations
-system.cpu.iew.lsq.thread0.squashedStores 51656202 # Number of stores squashed
+system.cpu.iew.lsq.thread0.squashedLoads 123023226 # Number of loads squashed
+system.cpu.iew.lsq.thread0.ignoredResponses 213197 # Number of memory responses ignored because the instruction is squashed
+system.cpu.iew.lsq.thread0.memOrderViolation 372513 # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.squashedStores 51657080 # Number of stores squashed
system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread0.rescheduledLoads 22930 # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread0.cacheBlocked 1078 # Number of times an access to memory failed due to the cache being blocked
+system.cpu.iew.lsq.thread0.rescheduledLoads 22979 # Number of loads that were rescheduled
+system.cpu.iew.lsq.thread0.cacheBlocked 1120 # Number of times an access to memory failed due to the cache being blocked
system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu.iew.iewSquashCycles 8887917 # Number of cycles IEW is squashing
-system.cpu.iew.iewBlockCycles 97798502 # Number of cycles IEW is blocking
-system.cpu.iew.iewUnblockCycles 6162253 # Number of cycles IEW is unblocking
-system.cpu.iew.iewDispatchedInsts 2023090945 # Number of instructions dispatched to IQ
-system.cpu.iew.iewDispSquashedInsts 375323 # Number of squashed instructions skipped by dispatch
-system.cpu.iew.iewDispLoadInsts 507122194 # Number of dispatched load instructions
-system.cpu.iew.iewDispStoreInsts 200816388 # Number of dispatched store instructions
-system.cpu.iew.iewDispNonSpecInsts 7129 # Number of dispatched non-speculative instructions
-system.cpu.iew.iewIQFullEvents 1832886 # Number of times the IQ has become full, causing a stall
-system.cpu.iew.iewLSQFullEvents 3426694 # Number of times the LSQ has become full, causing a stall
-system.cpu.iew.memOrderViolationEvents 372787 # Number of memory order violations
-system.cpu.iew.predictedTakenIncorrect 4845812 # Number of branches that were predicted taken incorrectly
-system.cpu.iew.predictedNotTakenIncorrect 4140641 # Number of branches that were predicted not taken incorrectly
-system.cpu.iew.branchMispredicts 8986453 # Number of branch mispredicts detected at execute
-system.cpu.iew.iewExecutedInsts 1769991187 # Number of executed instructions
-system.cpu.iew.iewExecLoadInsts 423150453 # Number of load instructions executed
-system.cpu.iew.iewExecSquashedInsts 19008389 # Number of squashed instructions skipped in execute
+system.cpu.iew.iewSquashCycles 8886966 # Number of cycles IEW is squashing
+system.cpu.iew.iewBlockCycles 97771041 # Number of cycles IEW is blocking
+system.cpu.iew.iewUnblockCycles 6172788 # Number of cycles IEW is unblocking
+system.cpu.iew.iewDispatchedInsts 2023116383 # Number of instructions dispatched to IQ
+system.cpu.iew.iewDispSquashedInsts 372939 # Number of squashed instructions skipped by dispatch
+system.cpu.iew.iewDispLoadInsts 507125383 # Number of dispatched load instructions
+system.cpu.iew.iewDispStoreInsts 200817266 # Number of dispatched store instructions
+system.cpu.iew.iewDispNonSpecInsts 6964 # Number of dispatched non-speculative instructions
+system.cpu.iew.iewIQFullEvents 1835087 # Number of times the IQ has become full, causing a stall
+system.cpu.iew.iewLSQFullEvents 3428846 # Number of times the LSQ has become full, causing a stall
+system.cpu.iew.memOrderViolationEvents 372513 # Number of memory order violations
+system.cpu.iew.predictedTakenIncorrect 4846135 # Number of branches that were predicted taken incorrectly
+system.cpu.iew.predictedNotTakenIncorrect 4139030 # Number of branches that were predicted not taken incorrectly
+system.cpu.iew.branchMispredicts 8985165 # Number of branch mispredicts detected at execute
+system.cpu.iew.iewExecutedInsts 1770027230 # Number of executed instructions
+system.cpu.iew.iewExecLoadInsts 423145659 # Number of load instructions executed
+system.cpu.iew.iewExecSquashedInsts 19014094 # Number of squashed instructions skipped in execute
system.cpu.iew.exec_swp 0 # number of swp insts executed
system.cpu.iew.exec_nop 0 # number of nop insts executed
-system.cpu.iew.exec_refs 590375275 # number of memory reference insts executed
-system.cpu.iew.exec_branches 168976940 # Number of branches executed
-system.cpu.iew.exec_stores 167224822 # Number of stores executed
-system.cpu.iew.exec_rate 2.191505 # Inst execution rate
-system.cpu.iew.wb_sent 1766866321 # cumulative count of insts sent to commit
-system.cpu.iew.wb_count 1762364529 # cumulative count of insts written-back
-system.cpu.iew.wb_producers 1339720871 # num instructions producing a value
-system.cpu.iew.wb_consumers 2049946578 # num instructions consuming a value
-system.cpu.iew.wb_rate 2.182062 # insts written-back per cycle
-system.cpu.iew.wb_fanout 0.653539 # average fanout of values written-back
-system.cpu.commit.commitSquashedInsts 494164798 # The number of squashed insts skipped by commit
+system.cpu.iew.exec_refs 590385270 # number of memory reference insts executed
+system.cpu.iew.exec_branches 168978597 # Number of branches executed
+system.cpu.iew.exec_stores 167239611 # Number of stores executed
+system.cpu.iew.exec_rate 2.192095 # Inst execution rate
+system.cpu.iew.wb_sent 1766903441 # cumulative count of insts sent to commit
+system.cpu.iew.wb_count 1762407189 # cumulative count of insts written-back
+system.cpu.iew.wb_producers 1339775634 # num instructions producing a value
+system.cpu.iew.wb_consumers 2050025380 # num instructions consuming a value
+system.cpu.iew.wb_rate 2.182658 # insts written-back per cycle
+system.cpu.iew.wb_fanout 0.653541 # average fanout of values written-back
+system.cpu.commit.commitSquashedInsts 494189981 # The number of squashed insts skipped by commit
system.cpu.commit.commitNonSpecStalls 552 # The number of times commit has been forced to stall to communicate backwards
-system.cpu.commit.branchMispredicts 8615583 # The number of times a branch was mispredicted
-system.cpu.commit.committed_per_cycle::samples 740300612 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::mean 2.065362 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::stdev 2.575682 # Number of insts commited each cycle
+system.cpu.commit.branchMispredicts 8614804 # The number of times a branch was mispredicted
+system.cpu.commit.committed_per_cycle::samples 740092650 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::mean 2.065942 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::stdev 2.576063 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::0 276280439 37.32% 37.32% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::1 172026383 23.24% 60.56% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::2 56011691 7.57% 68.12% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::3 86227626 11.65% 79.77% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::4 25892196 3.50% 83.27% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::5 26512378 3.58% 86.85% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::6 9839162 1.33% 88.18% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::7 8995484 1.22% 89.39% # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::8 78515253 10.61% 100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0 276159555 37.31% 37.31% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::1 172046341 23.25% 60.56% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::2 55756685 7.53% 68.09% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::3 86381753 11.67% 79.77% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::4 25885092 3.50% 83.26% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::5 26500840 3.58% 86.84% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::6 9823966 1.33% 88.17% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::7 9011977 1.22% 89.39% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::8 78526441 10.61% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu.commit.committed_per_cycle::total 740300612 # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::total 740092650 # Number of insts commited each cycle
system.cpu.commit.committedInsts 826877109 # Number of instructions committed
system.cpu.commit.committedOps 1528988701 # Number of ops (including micro ops) committed
system.cpu.commit.swp_count 0 # Number of s/w prefetches committed
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 1528988701 # Class of committed instruction
-system.cpu.commit.bw_lim_events 78515253 # number cycles where commit BW limit reached
-system.cpu.rob.rob_reads 2684938858 # The number of ROB reads
-system.cpu.rob.rob_writes 4113685431 # The number of ROB writes
-system.cpu.timesIdled 1962 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.idleCycles 155841 # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu.commit.bw_lim_events 78526441 # number cycles where commit BW limit reached
+system.cpu.rob.rob_reads 2684744891 # The number of ROB reads
+system.cpu.rob.rob_writes 4113743876 # The number of ROB writes
+system.cpu.timesIdled 1971 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu.idleCycles 155004 # Total number of cycles that the CPU has spent unscheduled due to idling
system.cpu.committedInsts 826877109 # Number of Instructions Simulated
system.cpu.committedOps 1528988701 # Number of Ops (including micro ops) Simulated
-system.cpu.cpi 0.976760 # CPI: Cycles Per Instruction
-system.cpu.cpi_total 0.976760 # CPI: Total CPI of All Threads
-system.cpu.ipc 1.023793 # IPC: Instructions Per Cycle
-system.cpu.ipc_total 1.023793 # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 2722687854 # number of integer regfile reads
-system.cpu.int_regfile_writes 1435809850 # number of integer regfile writes
-system.cpu.fp_regfile_reads 5827 # number of floating regfile reads
-system.cpu.fp_regfile_writes 561 # number of floating regfile writes
-system.cpu.cc_regfile_reads 596681162 # number of cc regfile reads
-system.cpu.cc_regfile_writes 405470892 # number of cc regfile writes
-system.cpu.misc_regfile_reads 971641846 # number of misc regfile reads
+system.cpu.cpi 0.976516 # CPI: Cycles Per Instruction
+system.cpu.cpi_total 0.976516 # CPI: Total CPI of All Threads
+system.cpu.ipc 1.024048 # IPC: Instructions Per Cycle
+system.cpu.ipc_total 1.024048 # IPC: Total IPC of All Threads
+system.cpu.int_regfile_reads 2722732526 # number of integer regfile reads
+system.cpu.int_regfile_writes 1435834166 # number of integer regfile writes
+system.cpu.fp_regfile_reads 5786 # number of floating regfile reads
+system.cpu.fp_regfile_writes 522 # number of floating regfile writes
+system.cpu.cc_regfile_reads 596664701 # number of cc regfile reads
+system.cpu.cc_regfile_writes 405464893 # number of cc regfile writes
+system.cpu.misc_regfile_reads 971659418 # number of misc regfile reads
system.cpu.misc_regfile_writes 1 # number of misc regfile writes
-system.cpu.dcache.tags.replacements 2530997 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4087.815869 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 381868965 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 2535093 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 150.633119 # Average number of references to valid blocks.
+system.cpu.dcache.tags.replacements 2530951 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4087.813830 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 381812834 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 2535047 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 150.613710 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 1673396500 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4087.815869 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.998002 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.998002 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_blocks::cpu.data 4087.813830 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.998001 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.998001 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::0 28 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 25 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::2 865 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::3 3178 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1 26 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2 871 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::3 3171 # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
-system.cpu.dcache.tags.tag_accesses 772828805 # Number of tag accesses
-system.cpu.dcache.tags.data_accesses 772828805 # Number of data accesses
-system.cpu.dcache.ReadReq_hits::cpu.data 233213748 # number of ReadReq hits
-system.cpu.dcache.ReadReq_hits::total 233213748 # number of ReadReq hits
-system.cpu.dcache.WriteReq_hits::cpu.data 148173817 # number of WriteReq hits
-system.cpu.dcache.WriteReq_hits::total 148173817 # number of WriteReq hits
-system.cpu.dcache.demand_hits::cpu.data 381387565 # number of demand (read+write) hits
-system.cpu.dcache.demand_hits::total 381387565 # number of demand (read+write) hits
-system.cpu.dcache.overall_hits::cpu.data 381387565 # number of overall hits
-system.cpu.dcache.overall_hits::total 381387565 # number of overall hits
-system.cpu.dcache.ReadReq_misses::cpu.data 2772906 # number of ReadReq misses
-system.cpu.dcache.ReadReq_misses::total 2772906 # number of ReadReq misses
-system.cpu.dcache.WriteReq_misses::cpu.data 986385 # number of WriteReq misses
-system.cpu.dcache.WriteReq_misses::total 986385 # number of WriteReq misses
-system.cpu.dcache.demand_misses::cpu.data 3759291 # number of demand (read+write) misses
-system.cpu.dcache.demand_misses::total 3759291 # number of demand (read+write) misses
-system.cpu.dcache.overall_misses::cpu.data 3759291 # number of overall misses
-system.cpu.dcache.overall_misses::total 3759291 # number of overall misses
-system.cpu.dcache.ReadReq_miss_latency::cpu.data 59174415500 # number of ReadReq miss cycles
-system.cpu.dcache.ReadReq_miss_latency::total 59174415500 # number of ReadReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::cpu.data 31292251995 # number of WriteReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::total 31292251995 # number of WriteReq miss cycles
-system.cpu.dcache.demand_miss_latency::cpu.data 90466667495 # number of demand (read+write) miss cycles
-system.cpu.dcache.demand_miss_latency::total 90466667495 # number of demand (read+write) miss cycles
-system.cpu.dcache.overall_miss_latency::cpu.data 90466667495 # number of overall miss cycles
-system.cpu.dcache.overall_miss_latency::total 90466667495 # number of overall miss cycles
-system.cpu.dcache.ReadReq_accesses::cpu.data 235986654 # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.ReadReq_accesses::total 235986654 # number of ReadReq accesses(hits+misses)
+system.cpu.dcache.tags.tag_accesses 772716551 # Number of tag accesses
+system.cpu.dcache.tags.data_accesses 772716551 # Number of data accesses
+system.cpu.dcache.ReadReq_hits::cpu.data 233156746 # number of ReadReq hits
+system.cpu.dcache.ReadReq_hits::total 233156746 # number of ReadReq hits
+system.cpu.dcache.WriteReq_hits::cpu.data 148174671 # number of WriteReq hits
+system.cpu.dcache.WriteReq_hits::total 148174671 # number of WriteReq hits
+system.cpu.dcache.demand_hits::cpu.data 381331417 # number of demand (read+write) hits
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-system.cpu.dcache.writebacks::total 2330532 # number of writebacks
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system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
-system.cpu.l2cache.writebacks::writebacks 295163 # number of writebacks
-system.cpu.l2cache.writebacks::total 295163 # number of writebacks
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system.cpu.l2cache.ReadCleanReq_mshr_hits::cpu.inst 1 # number of ReadCleanReq MSHR hits
system.cpu.l2cache.ReadCleanReq_mshr_hits::total 1 # number of ReadCleanReq MSHR hits
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system.cpu.l2cache.overall_mshr_hits::total 1 # number of overall MSHR hits
system.cpu.l2cache.CleanEvict_mshr_misses::writebacks 8 # number of CleanEvict MSHR misses
system.cpu.l2cache.CleanEvict_mshr_misses::total 8 # number of CleanEvict MSHR misses
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system.cpu.l2cache.CleanEvict_mshr_miss_rate::writebacks inf # mshr miss rate for CleanEvict accesses
system.cpu.l2cache.CleanEvict_mshr_miss_rate::total inf # mshr miss rate for CleanEvict accesses
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system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.toL2Bus.snoop_filter.tot_requests 5474858 # Total number of requests made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_requests 2731062 # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests 212394 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.snoop_filter.tot_snoops 3599 # Total number of snoops made to the snoop filter.
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops 3599 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
+system.cpu.toL2Bus.snoop_filter.tot_requests 5473107 # Total number of requests made to the snoop filter.
+system.cpu.toL2Bus.snoop_filter.hit_single_requests 2730253 # Number of requests hitting in the snoop filter with a single holder of the requested data.
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+system.cpu.toL2Bus.snoop_filter.tot_snoops 3590 # Total number of snoops made to the snoop filter.
+system.cpu.toL2Bus.snoop_filter.hit_single_snoops 3590 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.cpu.toL2Bus.trans_dist::ReadResp 1969834 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackDirty 2625695 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WritebackClean 6263 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::CleanEvict 249937 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeReq 196875 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeResp 196875 # Transaction distribution
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+system.cpu.toL2Bus.trans_dist::CleanEvict 249873 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeReq 196028 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeResp 196028 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 770497 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 770497 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadCleanReq 205240 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadSharedReq 1764596 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 219739 # Packet count per connected master and slave (bytes)
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-system.cpu.toL2Bus.pkt_count::total 8203969 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 927936 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 311400000 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total 312327936 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops 552340 # Total snoops (count)
-system.cpu.toL2Bus.snoop_fanout::samples 3292546 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::mean 0.124310 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::stdev 0.329935 # Request fanout histogram
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+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7982402 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 8201329 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 928768 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 311397504 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size::total 312326272 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.snoops 551458 # Total snoops (count)
+system.cpu.toL2Bus.snoop_fanout::samples 3290793 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::mean 0.123868 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::stdev 0.329431 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::0 2883249 87.57% 87.57% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::1 409297 12.43% 100.00% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::0 2883170 87.61% 87.61% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::1 407623 12.39% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total 3292546 # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy 5102581952 # Layer occupancy (ticks)
+system.cpu.toL2Bus.snoop_fanout::total 3290793 # Request fanout histogram
+system.cpu.toL2Bus.reqLayer0.occupancy 5101790823 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 1.3 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy 307865483 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.occupancy 306628981 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy 3901080066 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.occupancy 3900587569 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.0 # Layer utilization (%)
-system.membus.trans_dist::ReadResp 179198 # Transaction distribution
-system.membus.trans_dist::WritebackDirty 295163 # Transaction distribution
-system.membus.trans_dist::CleanEvict 56643 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 195085 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 195085 # Transaction distribution
-system.membus.trans_dist::ReadExReq 206880 # Transaction distribution
-system.membus.trans_dist::ReadExResp 206880 # Transaction distribution
-system.membus.trans_dist::ReadSharedReq 179199 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1514133 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1514133 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 1514133 # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43599424 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43599424 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 43599424 # Cumulative packet size per connected master and slave (bytes)
+system.membus.trans_dist::ReadResp 179170 # Transaction distribution
+system.membus.trans_dist::WritebackDirty 295143 # Transaction distribution
+system.membus.trans_dist::CleanEvict 56638 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 194233 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 194233 # Transaction distribution
+system.membus.trans_dist::ReadExReq 206874 # Transaction distribution
+system.membus.trans_dist::ReadExResp 206874 # Transaction distribution
+system.membus.trans_dist::ReadSharedReq 179171 # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1512336 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1512336 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 1512336 # Packet count per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43595968 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43595968 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 43595968 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
-system.membus.snoop_fanout::samples 932970 # Request fanout histogram
+system.membus.snoop_fanout::samples 932059 # Request fanout histogram
system.membus.snoop_fanout::mean 0 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::0 932970 100.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::0 932059 100.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
-system.membus.snoop_fanout::total 932970 # Request fanout histogram
-system.membus.reqLayer0.occupancy 2244779968 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 932059 # Request fanout histogram
+system.membus.reqLayer0.occupancy 2243503595 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.6 # Layer utilization (%)
-system.membus.respLayer1.occupancy 2432276830 # Layer occupancy (ticks)
+system.membus.respLayer1.occupancy 2430366430 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.6 # Layer utilization (%)
---------- End Simulation Statistics ----------
mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[29]
mem_side=system.membus.slave[2]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.tsunami]
type=Tsunami
children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+Redirecting stdout to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:41
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:25
+gem5 executing on ribera.cs.wisc.edu, pid 29050
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/binaries/vmlinux
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
info: Launching CPU 1 @ 97861500
-Exiting @ tick 1870335522500 because m5_exit instruction encountered
+Exiting @ tick 1869358498000 because m5_exit instruction encountered
sim_ticks 1869358498000 # Number of ticks simulated
final_tick 1869358498000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2198730 # Simulator instruction rate (inst/s)
-host_op_rate 2198729 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 63233555824 # Simulator tick rate (ticks/s)
-host_mem_usage 377528 # Number of bytes of host memory used
-host_seconds 29.56 # Real time elapsed on the host
+host_inst_rate 1547194 # Simulator instruction rate (inst/s)
+host_op_rate 1547193 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 44495947902 # Simulator tick rate (ticks/s)
+host_mem_usage 371328 # Number of bytes of host memory used
+host_seconds 42.01 # Real time elapsed on the host
sim_insts 65000470 # Number of instructions simulated
sim_ops 65000470 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[29]
mem_side=system.membus.slave[2]
+Redirecting stdout to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:41
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:58
+gem5 executing on ribera.cs.wisc.edu, pid 29091
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/binaries/vmlinux
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 1829332258000 because m5_exit instruction encountered
+Exiting @ tick 1829332273500 because m5_exit instruction encountered
sim_ticks 1829332273500 # Number of ticks simulated
final_tick 1829332273500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2238603 # Simulator instruction rate (inst/s)
-host_op_rate 2238602 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 68208828665 # Simulator tick rate (ticks/s)
-host_mem_usage 373932 # Number of bytes of host memory used
-host_seconds 26.82 # Real time elapsed on the host
+host_inst_rate 1568783 # Simulator instruction rate (inst/s)
+host_op_rate 1568783 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 47799849374 # Simulator tick rate (ticks/s)
+host_mem_usage 368252 # Number of bytes of host memory used
+host_seconds 38.27 # Real time elapsed on the host
sim_insts 60038341 # Number of instructions simulated
sim_ops 60038341 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[29]
mem_side=system.membus.slave[2]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.tsunami]
type=Tsunami
children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+Redirecting stdout to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 29 2014 09:12:51
-gem5 started Oct 29 2014 09:20:02
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:24
+gem5 executing on ribera.cs.wisc.edu, pid 29049
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/binaries/vmlinux
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
-info: Launching CPU 1 @ 690168000
-Exiting @ tick 1961826628500 because m5_exit instruction encountered
+info: Launching CPU 1 @ 881785000
+Exiting @ tick 1977709274000 because m5_exit instruction encountered
sim_ticks 1977709274000 # Number of ticks simulated
final_tick 1977709274000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1549555 # Simulator instruction rate (inst/s)
-host_op_rate 1549555 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 51561372502 # Simulator tick rate (ticks/s)
-host_mem_usage 334884 # Number of bytes of host memory used
-host_seconds 38.36 # Real time elapsed on the host
+host_inst_rate 813213 # Simulator instruction rate (inst/s)
+host_op_rate 813212 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 27059617080 # Simulator tick rate (ticks/s)
+host_mem_usage 371328 # Number of bytes of host memory used
+host_seconds 73.09 # Real time elapsed on the host
sim_insts 59435338 # Number of instructions simulated
sim_ops 59435338 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
\rmemcluster 1, usage 0, start 392, end 16384
\rfreeing pages 1069:16384
\rreserving pages 1069:1070
-\r4096K Bcache detected; load hit latency 38 cycles, load miss latency 160 cycles
+\r4096K Bcache detected; load hit latency 38 cycles, load miss latency 263 cycles
\rSMP: 2 CPUs probed -- cpu_present_mask = 3
\rBuilt 1 zonelists
\rKernel command line: root=/dev/hda1 console=ttyS0
mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[29]
mem_side=system.membus.slave[2]
+Redirecting stdout to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 29 2014 09:12:51
-gem5 started Oct 29 2014 09:20:00
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:48
+gem5 executing on ribera.cs.wisc.edu, pid 29118
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/binaries/vmlinux
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 1919439025000 because m5_exit instruction encountered
+Exiting @ tick 1941275996000 because m5_exit instruction encountered
sim_ticks 1941275996000 # Number of ticks simulated
final_tick 1941275996000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1519860 # Simulator instruction rate (inst/s)
-host_op_rate 1519860 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 52515485940 # Simulator tick rate (ticks/s)
-host_mem_usage 331552 # Number of bytes of host memory used
-host_seconds 36.97 # Real time elapsed on the host
+host_inst_rate 815122 # Simulator instruction rate (inst/s)
+host_op_rate 815122 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 28164805778 # Simulator tick rate (ticks/s)
+host_mem_usage 368252 # Number of bytes of host memory used
+host_seconds 68.93 # Real time elapsed on the host
sim_insts 56182743 # Number of instructions simulated
sim_ops 56182743 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
\rmemcluster 1, usage 0, start 392, end 16384
\rfreeing pages 1069:16384
\rreserving pages 1069:1070
-\r4096K Bcache detected; load hit latency 38 cycles, load miss latency 160 cycles
+\r4096K Bcache detected; load hit latency 38 cycles, load miss latency 263 cycles
\rSMP: 1 CPUs probed -- cpu_present_mask = 1
\rBuilt 1 zonelists
\rKernel command line: root=/dev/hda1 console=ttyS0
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
"early_kernel_symbols": false,
"panic_on_oops": true,
"dtb_filename": "/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb",
+ "panic_on_panic": true,
"enable_context_switch_stats_dump": false,
"work_begin_ckpt_count": 0,
"clk_domain": {
"MSIXCAPNextCapability": 0,
"PXCAPLinkCtrl": 0,
"Revision": 0,
- "hardware_address": "<m5.params.EthernetAddr object at 0x488d6d0>",
+ "hardware_address": "<m5.params.EthernetAddr object at 0x4626a90>",
"LegacyIOBase": 0,
"pio_latency": 30000,
"platform": "system.realview",
"use_default_range": false,
"frontend_latency": 3
},
- "panic_on_panic": true,
+ "multi_thread": false,
"eventq_index": 0,
"iocache": {
"cpu_side": {
"peer": "system.iobus.master[27]",
"role": "SLAVE"
},
+ "clusivity": "mostly_incl",
"prefetcher": null,
"clk_domain": "system.clk_domain",
"write_buffers": 8,
"peer": "system.membus.slave[3]",
"role": "MASTER"
},
- "mshrs": 20,
+ "type": "Cache",
"forward_snoops": false,
+ "writeback_clean": false,
"hit_latency": 50,
- "demand_mshr_reserve": 1,
"tgts_per_mshr": 12,
+ "demand_mshr_reserve": 1,
"addr_ranges": [
"2147483648:2415919103"
],
"prefetch_on_access": false,
"path": "system.iocache",
"name": "iocache",
- "type": "Cache",
+ "mshrs": 20,
"sequential_access": false,
"assoc": 8
},
"role": "SLAVE"
},
"name": "toL2Bus",
- "snoop_filter": null,
+ "snoop_filter": {
+ "name": "snoop_filter",
+ "system": "system",
+ "max_capacity": 8388608,
+ "eventq_index": 0,
+ "cxx_class": "SnoopFilter",
+ "path": "system.cpu.toL2Bus.snoop_filter",
+ "type": "SnoopFilter",
+ "lookup_latency": 0
+ },
"forward_latency": 0,
"clk_domain": "system.cpu_clk_domain",
"system": "system",
"peer": "system.cpu.icache_port",
"role": "SLAVE"
},
+ "clusivity": "mostly_incl",
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"peer": "system.cpu.toL2Bus.slave[0]",
"role": "MASTER"
},
- "mshrs": 4,
+ "type": "Cache",
"forward_snoops": true,
+ "writeback_clean": true,
"hit_latency": 2,
- "demand_mshr_reserve": 1,
"tgts_per_mshr": 20,
+ "demand_mshr_reserve": 1,
"addr_ranges": [
"0:18446744073709551615"
],
"prefetch_on_access": false,
"path": "system.cpu.icache",
"name": "icache",
- "type": "Cache",
+ "mshrs": 4,
"sequential_access": false,
"assoc": 1
},
- "interrupts": {
- "eventq_index": 0,
- "path": "system.cpu.interrupts",
- "type": "ArmInterrupts",
- "name": "interrupts",
- "cxx_class": "ArmISA::Interrupts"
- },
+ "interrupts": [
+ {
+ "eventq_index": 0,
+ "path": "system.cpu.interrupts",
+ "type": "ArmInterrupts",
+ "name": "interrupts",
+ "cxx_class": "ArmISA::Interrupts"
+ }
+ ],
"dcache_port": {
"peer": "system.cpu.dcache.cpu_side",
"role": "MASTER"
"peer": "system.cpu.toL2Bus.master[0]",
"role": "SLAVE"
},
+ "clusivity": "mostly_incl",
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"peer": "system.membus.slave[2]",
"role": "MASTER"
},
- "mshrs": 20,
+ "type": "Cache",
"forward_snoops": true,
+ "writeback_clean": false,
"hit_latency": 20,
- "demand_mshr_reserve": 1,
"tgts_per_mshr": 12,
+ "demand_mshr_reserve": 1,
"addr_ranges": [
"0:18446744073709551615"
],
"prefetch_on_access": false,
"path": "system.cpu.l2cache",
"name": "l2cache",
- "type": "Cache",
+ "mshrs": 20,
"sequential_access": false,
"assoc": 8
},
"peer": "system.cpu.dcache_port",
"role": "SLAVE"
},
+ "clusivity": "mostly_incl",
"prefetcher": null,
"clk_domain": "system.cpu_clk_domain",
"write_buffers": 8,
"peer": "system.cpu.toL2Bus.slave[1]",
"role": "MASTER"
},
- "mshrs": 4,
+ "type": "Cache",
"forward_snoops": true,
+ "writeback_clean": false,
"hit_latency": 2,
- "demand_mshr_reserve": 1,
"tgts_per_mshr": 20,
+ "demand_mshr_reserve": 1,
"addr_ranges": [
"0:18446744073709551615"
],
"prefetch_on_access": false,
"path": "system.cpu.dcache",
"name": "dcache",
- "type": "Cache",
+ "mshrs": 4,
"sequential_access": false,
"assoc": 4
},
"id_aa64dfr0_el1": 1052678,
"path": "system.cpu.isa",
"id_aa64isar0_el1": 0,
+ "decoderFlavour": "Generic",
"name": "isa",
"midr": 1091551472,
"id_aa64afr0_el1": 0,
sim_ticks 2783867052000 # Number of ticks simulated
final_tick 2783867052000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1280554 # Simulator instruction rate (inst/s)
-host_op_rate 1558869 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 24968967598 # Simulator tick rate (ticks/s)
-host_mem_usage 628580 # Number of bytes of host memory used
-host_seconds 111.49 # Real time elapsed on the host
+host_inst_rate 930781 # Simulator instruction rate (inst/s)
+host_op_rate 1133077 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 18148903353 # Simulator tick rate (ticks/s)
+host_mem_usage 620884 # Number of bytes of host memory used
+host_seconds 153.39 # Real time elapsed on the host
sim_insts 142772879 # Number of instructions simulated
sim_ops 173803124 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=8
write_buffers=16
+writeback_clean=true
cpu_side=system.cpu0.dcache_port
mem_side=system.cpu0.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu0.icache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.cpu0.toL2Bus.slave[0]
[system.cpu0.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+clusivity=mostly_excl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.l2cache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.toL2Bus.master[0]
mem_side=system.toL2Bus.slave[0]
[system.cpu0.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu0.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu0.l2cache.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
+[system.cpu0.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu0.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=8
write_buffers=16
+writeback_clean=true
cpu_side=system.cpu1.dcache_port
mem_side=system.cpu1.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu1.icache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.cpu1.toL2Bus.slave[0]
[system.cpu1.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+clusivity=mostly_excl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.l2cache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.toL2Bus.master[0]
mem_side=system.toL2Bus.slave[1]
[system.cpu1.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu1.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu1.l2cache.cpu_side
slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
+[system.cpu1.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu1.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.vncserver]
type=VncServer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:13:40
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11029
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic-dual
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
-info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
+info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
sim_ticks 2802894699500 # Number of ticks simulated
final_tick 2802894699500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1249421 # Simulator instruction rate (inst/s)
-host_op_rate 1522401 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 23850961642 # Simulator tick rate (ticks/s)
-host_mem_usage 637428 # Number of bytes of host memory used
-host_seconds 117.52 # Real time elapsed on the host
+host_inst_rate 842767 # Simulator instruction rate (inst/s)
+host_op_rate 1026899 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 16088096135 # Simulator tick rate (ticks/s)
+host_mem_usage 630892 # Number of bytes of host memory used
+host_seconds 174.22 # Real time elapsed on the host
sim_insts 146828240 # Number of instructions simulated
sim_ops 178908039 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:13:29
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11030
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
-info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
+info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
sim_ticks 2783867052000 # Number of ticks simulated
final_tick 2783867052000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1269873 # Simulator instruction rate (inst/s)
-host_op_rate 1545867 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 24760705808 # Simulator tick rate (ticks/s)
-host_mem_usage 624348 # Number of bytes of host memory used
-host_seconds 112.43 # Real time elapsed on the host
+host_inst_rate 866228 # Simulator instruction rate (inst/s)
+host_op_rate 1054494 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 16890212334 # Simulator tick rate (ticks/s)
+host_mem_usage 616684 # Number of bytes of host memory used
+host_seconds 164.82 # Real time elapsed on the host
sim_insts 142772879 # Number of instructions simulated
sim_ops 173803124 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=8
write_buffers=16
+writeback_clean=true
cpu_side=system.cpu0.dcache_port
mem_side=system.cpu0.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu0.icache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.cpu0.toL2Bus.slave[0]
[system.cpu0.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+clusivity=mostly_excl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.l2cache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.toL2Bus.master[0]
mem_side=system.toL2Bus.slave[0]
[system.cpu0.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu0.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu0.l2cache.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
+[system.cpu0.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu0.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=8
write_buffers=16
+writeback_clean=true
cpu_side=system.cpu1.dcache_port
mem_side=system.cpu1.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu1.icache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.cpu1.toL2Bus.slave[0]
[system.cpu1.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+clusivity=mostly_excl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.l2cache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.toL2Bus.master[0]
mem_side=system.toL2Bus.slave[1]
[system.cpu1.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu1.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu1.l2cache.cpu_side
slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
+[system.cpu1.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu1.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.vncserver]
type=VncServer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:13:30
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:29
+gem5 executing on ribera.cs.wisc.edu, pid 11176
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
-info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
+info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
-Exiting @ tick 2868748596000 because m5_exit instruction encountered
+Exiting @ tick 2871819744000 because m5_exit instruction encountered
sim_ticks 2871819744000 # Number of ticks simulated
final_tick 2871819744000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 897166 # Simulator instruction rate (inst/s)
-host_op_rate 1085198 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 19602639675 # Simulator tick rate (ticks/s)
-host_mem_usage 617092 # Number of bytes of host memory used
-host_seconds 146.50 # Real time elapsed on the host
+host_inst_rate 515898 # Simulator instruction rate (inst/s)
+host_op_rate 624021 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 11272108590 # Simulator tick rate (ticks/s)
+host_mem_usage 651632 # Number of bytes of host memory used
+host_seconds 254.77 # Real time elapsed on the host
sim_insts 131436334 # Number of instructions simulated
sim_ops 158983282 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:15:48
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11026
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x80008000
-info: Loading DTB file: /work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
+info: Loading DTB file: /scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb at address 0x88000000
info: Entering event queue @ 0. Starting simulation...
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
-Exiting @ tick 2903467553500 because m5_exit instruction encountered
+Exiting @ tick 2909603958500 because m5_exit instruction encountered
sim_ticks 2909603958500 # Number of ticks simulated
final_tick 2909603958500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 894735 # Simulator instruction rate (inst/s)
-host_op_rate 1078768 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 23149732072 # Simulator tick rate (ticks/s)
-host_mem_usage 579968 # Number of bytes of host memory used
-host_seconds 125.69 # Real time elapsed on the host
+host_inst_rate 491347 # Simulator instruction rate (inst/s)
+host_op_rate 592409 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 12712752157 # Simulator tick rate (ticks/s)
+host_mem_usage 616676 # Number of bytes of host memory used
+host_seconds 228.87 # Real time elapsed on the host
sim_insts 112455934 # Number of instructions simulated
sim_ops 135586369 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
[system.cpu0.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
fastmem=false
function_trace=false
function_trace_start=0
-interrupts=Null
+interrupts=
isa=system.cpu1.isa
istage2_mmu=system.cpu1.istage2_mmu
itb=system.cpu1.itb
[system.cpu1.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.vncserver]
type=VncServer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:14:37
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:30
+gem5 executing on ribera.cs.wisc.edu, pid 11126
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic
Global frequency set at 1000000000000 ticks per second
sim_ticks 2783867052000 # Number of ticks simulated
final_tick 2783867052000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1268879 # Simulator instruction rate (inst/s)
-host_op_rate 1544656 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 24741311872 # Simulator tick rate (ticks/s)
-host_mem_usage 623824 # Number of bytes of host memory used
-host_seconds 112.52 # Real time elapsed on the host
+host_inst_rate 895317 # Simulator instruction rate (inst/s)
+host_op_rate 1089905 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 17457402345 # Simulator tick rate (ticks/s)
+host_mem_usage 617704 # Number of bytes of host memory used
+host_seconds 159.47 # Real time elapsed on the host
sim_insts 142772879 # Number of instructions simulated
sim_ops 173803124 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
memories=system.physmem system.realview.nvmem system.realview.vram
mmap_using_noreserve=false
multi_proc=true
+multi_thread=false
num_work_ids=16
panic_on_oops=true
panic_on_panic=true
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
[system.cpu0.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
eventq_index=0
function_trace=false
function_trace_start=0
-interrupts=Null
+interrupts=
isa=system.cpu1.isa
istage2_mmu=system.cpu1.istage2_mmu
itb=system.cpu1.itb
[system.cpu1.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[27]
mem_side=system.membus.slave[3]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.vncserver]
type=VncServer
eventq_index=0
warn: User mode does not have SPSR
warn: User mode does not have SPSR
warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
-warn: User mode does not have SPSR
+Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 7 2015 10:13:08
-gem5 started Aug 7 2015 10:13:41
-gem5 executing on e104799-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11032
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing
Global frequency set at 1000000000000 ticks per second
sim_ticks 2909653700500 # Number of ticks simulated
final_tick 2909653700500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 811232 # Simulator instruction rate (inst/s)
-host_op_rate 978087 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 20990567196 # Simulator tick rate (ticks/s)
-host_mem_usage 580224 # Number of bytes of host memory used
-host_seconds 138.62 # Real time elapsed on the host
+host_inst_rate 503686 # Simulator instruction rate (inst/s)
+host_op_rate 607284 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 13032832598 # Simulator tick rate (ticks/s)
+host_mem_usage 617700 # Number of bytes of host memory used
+host_seconds 223.26 # Real time elapsed on the host
sim_insts 112450652 # Number of instructions simulated
sim_ops 135579653 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:134217727
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
smbios_table=system.smbios_table
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu.dtb_walker_cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dtb.walker.port
mem_side=system.cpu.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu.itb_walker_cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.itb.walker.port
mem_side=system.cpu.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[19]
mem_side=system.membus.slave[4]
+Redirecting stdout to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simout
+Redirecting stderr to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 6 2015 22:19:56
-gem5 started Jan 6 2015 22:27:08
-gem5 executing on gabeblackz620.mtv.corp.google.com
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic -re /usr/local/google/home/gabeblack/gem5/hg/gem5/tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:27
+gem5 executing on ribera.cs.wisc.edu, pid 9888
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 5112152263500 because m5_exit instruction encountered
+Exiting @ tick 5112152301500 because m5_exit instruction encountered
sim_ticks 5112152301500 # Number of ticks simulated
final_tick 5112152301500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1265336 # Simulator instruction rate (inst/s)
-host_op_rate 2590419 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 32332152611 # Simulator tick rate (ticks/s)
-host_mem_usage 659496 # Number of bytes of host memory used
-host_seconds 158.11 # Real time elapsed on the host
+host_inst_rate 934572 # Simulator instruction rate (inst/s)
+host_op_rate 1913274 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 23880410274 # Simulator tick rate (ticks/s)
+host_mem_usage 654088 # Number of bytes of host memory used
+host_seconds 214.07 # Real time elapsed on the host
sim_insts 200066731 # Number of instructions simulated
sim_ops 409580371 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
init_param=0
intel_mp_pointer=system.intel_mp_pointer
intel_mp_table=system.intel_mp_table
-kernel=/home/joel/research/gem5/full_system_files/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
kernel_addr_check=true
load_addr_mask=18446744073709551615
load_offset=0
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
-readfile=/home/joel/research/gem5/gem5/tests/halt.sh
+readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
smbios_table=system.smbios_table
symbolfile=
work_begin_ckpt_count=0
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu.dtb_walker_cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dtb.walker.port
mem_side=system.cpu.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu.itb_walker_cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.itb.walker.port
mem_side=system.cpu.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[2]
addr_ranges=0:134217727
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.iocache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.iobus.master[19]
mem_side=system.membus.slave[4]
[system.pc.south_bridge.ide.disks0.image.child]
type=RawDiskImage
eventq_index=0
-image_file=/home/joel/research/gem5/full_system_files/disks/linux-x86.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
read_only=true
[system.pc.south_bridge.ide.disks1]
[system.pc.south_bridge.ide.disks1.image.child]
type=RawDiskImage
eventq_index=0
-image_file=/home/joel/research/gem5/full_system_files/disks/linux-bigswap2.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
read_only=true
[system.pc.south_bridge.int_lines0]
+Redirecting stdout to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing/simout
+Redirecting stderr to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 1 2015 04:53:13
-gem5 started Oct 1 2015 04:53:52
-gem5 executing on artery
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re /home/joel/research/gem5/gem5/tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:25
+gem5 executing on ribera.cs.wisc.edu, pid 9883
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /home/joel/research/gem5/full_system_files/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 5194921252500 because m5_exit instruction encountered
+Exiting @ tick 5194978362500 because m5_exit instruction encountered
sim_ticks 5194978362500 # Number of ticks simulated
final_tick 5194978362500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1008714 # Simulator instruction rate (inst/s)
-host_op_rate 1944281 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 40800285815 # Simulator tick rate (ticks/s)
-host_mem_usage 616472 # Number of bytes of host memory used
-host_seconds 127.33 # Real time elapsed on the host
+host_inst_rate 576808 # Simulator instruction rate (inst/s)
+host_op_rate 1111789 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 23330637170 # Simulator tick rate (ticks/s)
+host_mem_usage 654084 # Number of bytes of host memory used
+host_seconds 222.67 # Real time elapsed on the host
sim_insts 128436556 # Number of instructions simulated
sim_ops 247559471 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:134217727
memories=drivesys.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/configs/boot/netperf-server.rcS
mem_ranges=0:134217727
memories=testsys.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
readfile=/scratch/nilay/GEM5/gem5/configs/boot/netperf-stream-client.rcS
\reth0: ns83820.c: 0x22c: 00000000, subsystem: 0000:0000
\reth0: enabling optical transceiver
\reth0: using 64 bit addressing.
-\reth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:02 io=0x09000000 irq=30 f=h,sg
+\reth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:01 io=0x09000000 irq=30 f=h,sg
\rtun: Universal TUN/TAP device driver, 1.6
\rtun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
\rUniform Multi-Platform E-IDE driver Revision: 7.00alpha2
+Redirecting stdout to build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:25:12
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:50
+gem5 executing on ribera.cs.wisc.edu, pid 29123
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
+
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/binaries/vmlinux
- 0: testsys.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
-info: kernel located at: /dist/binaries/vmlinux
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
0: drivesys.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
+ 0: testsys.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 4321621592000 because checkpoint
+Exiting @ tick 4321620817500 because checkpoint
\reth0: ns83820.c: 0x22c: 00000000, subsystem: 0000:0000
\reth0: enabling optical transceiver
\reth0: using 64 bit addressing.
-\reth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:01 io=0x09000000 irq=30 f=h,sg
+\reth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:02 io=0x09000000 irq=30 f=h,sg
\rtun: Universal TUN/TAP device driver, 1.6
\rtun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
\rUniform Multi-Platform E-IDE driver Revision: 7.00alpha2
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 7 2014 10:41:53
-gem5 started May 7 2014 10:42:15
-gem5 executing on cz3212c2d7
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:24
+gem5 executing on ribera.cs.wisc.edu, pid 29048
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 35190500 because target called exit()
+Exiting @ tick 37553000 because target called exit()
sim_ticks 37553000 # Number of ticks simulated
final_tick 37553000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 161315 # Simulator instruction rate (inst/s)
-host_op_rate 161262 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 945919395 # Simulator tick rate (ticks/s)
-host_mem_usage 296228 # Number of bytes of host memory used
-host_seconds 0.04 # Real time elapsed on the host
+host_inst_rate 55108 # Simulator instruction rate (inst/s)
+host_op_rate 55099 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 323251479 # Simulator tick rate (ticks/s)
+host_mem_usage 290176 # Number of bytes of host memory used
+host_seconds 0.12 # Real time elapsed on the host
sim_insts 6400 # Number of instructions simulated
sim_ops 6400 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 14 2015 20:54:01
-gem5 started Sep 14 2015 21:14:59
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:08
+gem5 executing on ribera.cs.wisc.edu, pid 29145
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
sim_ticks 21900500 # Number of ticks simulated
final_tick 21900500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 101932 # Simulator instruction rate (inst/s)
-host_op_rate 101910 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 350189482 # Simulator tick rate (ticks/s)
-host_mem_usage 296592 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 59160 # Simulator instruction rate (inst/s)
+host_op_rate 59150 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 203265202 # Simulator tick rate (ticks/s)
+host_mem_usage 292228 # Number of bytes of host memory used
+host_seconds 0.11 # Real time elapsed on the host
sim_insts 6372 # Number of instructions simulated
sim_ops 6372 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:08
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:47
+gem5 executing on ribera.cs.wisc.edu, pid 29075
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
-random_seed=1234
randomization=false
[system.ruby.clk_domain]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.unblockToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level/simout
+Redirecting stderr to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:16:05
-gem5 started Aug 13 2015 20:15:31
-gem5 executing on artery
-command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level
+gem5 compiled Nov 15 2015 14:41:13
+gem5 started Nov 15 2015 14:41:38
+gem5 executing on ribera.cs.wisc.edu, pid 32149
+command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 121460 # Number of ticks simulated
final_tick 121460 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 22637 # Simulator instruction rate (inst/s)
-host_op_rate 22636 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 430242 # Simulator tick rate (ticks/s)
-host_mem_usage 402016 # Number of bytes of host memory used
-host_seconds 0.28 # Real time elapsed on the host
+host_inst_rate 24898 # Simulator instruction rate (inst/s)
+host_op_rate 24896 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 473190 # Simulator tick rate (ticks/s)
+host_mem_usage 448380 # Number of bytes of host memory used
+host_seconds 0.26 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
-random_seed=1234
randomization=false
[system.ruby.clk_domain]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l2_cntrl0]
type=L2Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0.GlobalRequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.memctrl_clk_domain]
type=DerivedClockDomain
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:22:33
-gem5 started Aug 13 2015 20:16:04
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory
+gem5 compiled Nov 15 2015 14:46:21
+gem5 started Nov 15 2015 14:46:44
+gem5 executing on ribera.cs.wisc.edu, pid 1174
+command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 108694 # Number of ticks simulated
final_tick 108694 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 31686 # Simulator instruction rate (inst/s)
-host_op_rate 31684 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 538927 # Simulator tick rate (ticks/s)
-host_mem_usage 405952 # Number of bytes of host memory used
-host_seconds 0.20 # Real time elapsed on the host
+host_inst_rate 34181 # Simulator instruction rate (inst/s)
+host_op_rate 34178 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 581310 # Simulator tick rate (ticks/s)
+host_mem_usage 451520 # Number of bytes of host memory used
+host_seconds 0.19 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:28:58
-gem5 started Aug 13 2015 20:16:36
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token
+gem5 compiled Nov 15 2015 14:51:28
+gem5 started Nov 15 2015 14:51:58
+gem5 executing on ribera.cs.wisc.edu, pid 2899
+command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 108259 because target called exit()
+Exiting @ tick 108253 because target called exit()
sim_ticks 108253 # Number of ticks simulated
final_tick 108253 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 35849 # Simulator instruction rate (inst/s)
-host_op_rate 35846 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 607200 # Simulator tick rate (ticks/s)
-host_mem_usage 446936 # Number of bytes of host memory used
+host_inst_rate 35277 # Simulator instruction rate (inst/s)
+host_op_rate 35272 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 597494 # Simulator tick rate (ticks/s)
+host_mem_usage 449432 # Number of bytes of host memory used
host_seconds 0.18 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.probeFilter]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.unblockToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.unblockFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=6
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14 system.ruby.network.routers0.port_buffers15 system.ruby.network.routers0.port_buffers16 system.ruby.network.routers0.port_buffers17
-recycle_latency=0
router_id=0
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14 system.ruby.network.routers1.port_buffers15 system.ruby.network.routers1.port_buffers16 system.ruby.network.routers1.port_buffers17
-recycle_latency=0
router_id=1
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19 system.ruby.network.routers2.port_buffers20 system.ruby.network.routers2.port_buffers21 system.ruby.network.routers2.port_buffers22 system.ruby.network.routers2.port_buffers23
-recycle_latency=0
router_id=2
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:09:46
-gem5 started Aug 13 2015 20:15:17
-gem5 executing on artery
-command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
+gem5 compiled Nov 15 2015 14:35:53
+gem5 started Nov 15 2015 14:36:15
+gem5 executing on ribera.cs.wisc.edu, pid 30620
+command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 86673 # Number of ticks simulated
final_tick 86673 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 41119 # Simulator instruction rate (inst/s)
-host_op_rate 41116 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 557651 # Simulator tick rate (ticks/s)
-host_mem_usage 401992 # Number of bytes of host memory used
-host_seconds 0.16 # Real time elapsed on the host
+host_inst_rate 33775 # Simulator instruction rate (inst/s)
+host_op_rate 33772 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 458039 # Simulator tick rate (ticks/s)
+host_mem_usage 448324 # Number of bytes of host memory used
+host_seconds 0.19 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:05:56
-gem5 started Aug 13 2015 20:14:39
-gem5 executing on artery
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:20
+gem5 executing on ribera.cs.wisc.edu, pid 29152
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 107210 # Number of ticks simulated
final_tick 107210 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 29183 # Simulator instruction rate (inst/s)
-host_op_rate 29181 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 489574 # Simulator tick rate (ticks/s)
-host_mem_usage 401792 # Number of bytes of host memory used
-host_seconds 0.22 # Real time elapsed on the host
+host_inst_rate 51155 # Simulator instruction rate (inst/s)
+host_op_rate 51148 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 858029 # Simulator tick rate (ticks/s)
+host_mem_usage 447104 # Number of bytes of host memory used
+host_seconds 0.13 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:16
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:46
+gem5 executing on ribera.cs.wisc.edu, pid 29113
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 32544000 because target called exit()
+Exiting @ tick 35667500 because target called exit()
sim_ticks 35667500 # Number of ticks simulated
final_tick 35667500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 607241 # Simulator instruction rate (inst/s)
-host_op_rate 606492 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3381446720 # Simulator tick rate (ticks/s)
-host_mem_usage 294520 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 123464 # Simulator instruction rate (inst/s)
+host_op_rate 123421 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 688686311 # Simulator tick rate (ticks/s)
+host_mem_usage 290180 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
warn: ignoring syscall sigprocmask(1, ...)
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 7 2014 10:41:53
-gem5 started May 7 2014 15:04:23
-gem5 executing on cz3212c2d7
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:19
+gem5 executing on ribera.cs.wisc.edu, pid 29096
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 18715000 because target called exit()
+Exiting @ tick 20075000 because target called exit()
sim_ticks 20075000 # Number of ticks simulated
final_tick 20075000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 131673 # Simulator instruction rate (inst/s)
-host_op_rate 131586 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1021264689 # Simulator tick rate (ticks/s)
-host_mem_usage 295944 # Number of bytes of host memory used
-host_seconds 0.02 # Real time elapsed on the host
+host_inst_rate 43924 # Simulator instruction rate (inst/s)
+host_op_rate 43910 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 340901575 # Simulator tick rate (ticks/s)
+host_mem_usage 289896 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 2585 # Number of instructions simulated
sim_ops 2585 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 07:55:25
-gem5 started Apr 22 2015 08:43:58
-gem5 executing on phenom
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:33
+gem5 executing on ribera.cs.wisc.edu, pid 29168
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 12774000 because target called exit()
+Exiting @ tick 12363500 because target called exit()
sim_ticks 12363500 # Number of ticks simulated
final_tick 12363500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 83593 # Simulator instruction rate (inst/s)
-host_op_rate 83552 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 432562452 # Simulator tick rate (ticks/s)
-host_mem_usage 295260 # Number of bytes of host memory used
-host_seconds 0.03 # Real time elapsed on the host
+host_inst_rate 30943 # Simulator instruction rate (inst/s)
+host_op_rate 30935 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 160195252 # Simulator tick rate (ticks/s)
+host_mem_usage 290920 # Number of bytes of host memory used
+host_seconds 0.08 # Real time elapsed on the host
sim_insts 2387 # Number of instructions simulated
sim_ops 2387 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:20
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:24
+gem5 executing on ribera.cs.wisc.edu, pid 29046
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
randomization=false
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.unblockToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simout
+Redirecting stderr to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:16:05
-gem5 started Aug 13 2015 20:15:42
-gem5 executing on artery
-command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level
+gem5 compiled Nov 15 2015 14:41:13
+gem5 started Nov 15 2015 14:41:38
+gem5 executing on ribera.cs.wisc.edu, pid 32151
+command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 45733 # Number of ticks simulated
final_tick 45733 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 17774 # Simulator instruction rate (inst/s)
-host_op_rate 17773 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 315387 # Simulator tick rate (ticks/s)
-host_mem_usage 401732 # Number of bytes of host memory used
-host_seconds 0.15 # Real time elapsed on the host
+host_inst_rate 14502 # Simulator instruction rate (inst/s)
+host_op_rate 14500 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 257305 # Simulator tick rate (ticks/s)
+host_mem_usage 447076 # Number of bytes of host memory used
+host_seconds 0.18 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
randomization=false
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l2_cntrl0]
type=L2Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0.GlobalRequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.memctrl_clk_domain]
type=DerivedClockDomain
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:22:33
-gem5 started Aug 13 2015 20:16:13
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory
+gem5 compiled Nov 15 2015 14:46:21
+gem5 started Nov 15 2015 14:46:44
+gem5 executing on ribera.cs.wisc.edu, pid 1172
+command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 41712 # Number of ticks simulated
final_tick 41712 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 24481 # Simulator instruction rate (inst/s)
-host_op_rate 24478 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 396175 # Simulator tick rate (ticks/s)
-host_mem_usage 403616 # Number of bytes of host memory used
-host_seconds 0.11 # Real time elapsed on the host
+host_inst_rate 17217 # Simulator instruction rate (inst/s)
+host_op_rate 17215 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 278615 # Simulator tick rate (ticks/s)
+host_mem_usage 449188 # Number of bytes of host memory used
+host_seconds 0.15 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:28:58
-gem5 started Aug 13 2015 20:16:47
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
+gem5 compiled Nov 15 2015 14:51:28
+gem5 started Nov 15 2015 14:51:55
+gem5 executing on ribera.cs.wisc.edu, pid 2889
+command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 40524 because target called exit()
+Exiting @ tick 40527 because target called exit()
sim_ticks 40527 # Number of ticks simulated
final_tick 40527 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 34093 # Simulator instruction rate (inst/s)
-host_op_rate 34084 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 535893 # Simulator tick rate (ticks/s)
-host_mem_usage 445624 # Number of bytes of host memory used
-host_seconds 0.08 # Real time elapsed on the host
+host_inst_rate 24433 # Simulator instruction rate (inst/s)
+host_op_rate 24429 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 384119 # Simulator tick rate (ticks/s)
+host_mem_usage 448124 # Number of bytes of host memory used
+host_seconds 0.11 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.probeFilter]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.unblockToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.unblockFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=6
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14 system.ruby.network.routers0.port_buffers15 system.ruby.network.routers0.port_buffers16 system.ruby.network.routers0.port_buffers17
-recycle_latency=0
router_id=0
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14 system.ruby.network.routers1.port_buffers15 system.ruby.network.routers1.port_buffers16 system.ruby.network.routers1.port_buffers17
-recycle_latency=0
router_id=1
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19 system.ruby.network.routers2.port_buffers20 system.ruby.network.routers2.port_buffers21 system.ruby.network.routers2.port_buffers22 system.ruby.network.routers2.port_buffers23
-recycle_latency=0
router_id=2
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:09:46
-gem5 started Aug 13 2015 20:15:17
-gem5 executing on artery
-command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
+gem5 compiled Nov 15 2015 14:35:53
+gem5 started Nov 15 2015 14:36:14
+gem5 executing on ribera.cs.wisc.edu, pid 30619
+command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 32936 # Number of ticks simulated
final_tick 32936 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 21294 # Simulator instruction rate (inst/s)
-host_op_rate 21292 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 272103 # Simulator tick rate (ticks/s)
-host_mem_usage 401708 # Number of bytes of host memory used
-host_seconds 0.12 # Real time elapsed on the host
+host_inst_rate 24441 # Simulator instruction rate (inst/s)
+host_op_rate 24437 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 312277 # Simulator tick rate (ticks/s)
+host_mem_usage 448040 # Number of bytes of host memory used
+host_seconds 0.11 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:05:56
-gem5 started Aug 13 2015 20:14:52
-gem5 executing on artery
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:22
+gem5 executing on ribera.cs.wisc.edu, pid 29157
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 41659 # Number of ticks simulated
final_tick 41659 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 30850 # Simulator instruction rate (inst/s)
-host_op_rate 30846 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 498580 # Simulator tick rate (ticks/s)
-host_mem_usage 399460 # Number of bytes of host memory used
+host_inst_rate 33721 # Simulator instruction rate (inst/s)
+host_op_rate 33714 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 544888 # Simulator tick rate (ticks/s)
+host_mem_usage 445796 # Number of bytes of host memory used
host_seconds 0.08 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:26
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:57
+gem5 executing on ribera.cs.wisc.edu, pid 29136
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 16524000 because target called exit()
+Exiting @ tick 18239500 because target called exit()
sim_ticks 18239500 # Number of ticks simulated
final_tick 18239500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 407753 # Simulator instruction rate (inst/s)
-host_op_rate 406852 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2874172707 # Simulator tick rate (ticks/s)
-host_mem_usage 293212 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 60500 # Simulator instruction rate (inst/s)
+host_op_rate 60473 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 427843204 # Simulator tick rate (ticks/s)
+host_mem_usage 288876 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 7 2014 10:57:46
-gem5 started May 7 2014 13:43:16
-gem5 executing on cz3211bhr8
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:19
+gem5 executing on ribera.cs.wisc.edu, pid 11166
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x6c0c360
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 28041000 because target called exit()
+Exiting @ tick 29949500 because target called exit()
sim_ticks 29949500 # Number of ticks simulated
final_tick 29949500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 117235 # Simulator instruction rate (inst/s)
-host_op_rate 137200 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 761957462 # Simulator tick rate (ticks/s)
-host_mem_usage 313960 # Number of bytes of host memory used
-host_seconds 0.04 # Real time elapsed on the host
+host_inst_rate 53802 # Simulator instruction rate (inst/s)
+host_op_rate 62972 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 349767389 # Simulator tick rate (ticks/s)
+host_mem_usage 307220 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
sim_insts 4605 # Number of instructions simulated
sim_ops 5391 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
exitOnError=false
function_trace=false
function_trace_start=0
-interrupts=Null
+interrupts=
isa=system.cpu.checker.isa
istage2_mmu=system.cpu.checker.istage2_mmu
itb=system.cpu.checker.itb
[system.cpu.checker.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 14 2015 23:29:19
-gem5 started Sep 14 2015 23:30:05
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:13
+gem5 executing on ribera.cs.wisc.edu, pid 11155
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 17163000 because target called exit()
+Exiting @ tick 17170000 because target called exit()
sim_ticks 17170000 # Number of ticks simulated
final_tick 17170000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 54905 # Simulator instruction rate (inst/s)
-host_op_rate 64292 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 205230571 # Simulator tick rate (ticks/s)
-host_mem_usage 313448 # Number of bytes of host memory used
-host_seconds 0.08 # Real time elapsed on the host
+host_inst_rate 30630 # Simulator instruction rate (inst/s)
+host_op_rate 35868 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 114456188 # Simulator tick rate (ticks/s)
+host_mem_usage 308252 # Number of bytes of host memory used
+host_seconds 0.15 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=8
write_buffers=16
+writeback_clean=true
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=false
tags=system.cpu.icache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+clusivity=mostly_excl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=8
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 10:58:25
-gem5 started Apr 22 2015 11:26:41
-gem5 executing on phenom
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11031
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x4144ba0
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 17911000 because target called exit()
+Exiting @ tick 18741000 because target called exit()
sim_ticks 18741000 # Number of ticks simulated
final_tick 18741000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 59386 # Simulator instruction rate (inst/s)
-host_op_rate 69540 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 242288300 # Simulator tick rate (ticks/s)
-host_mem_usage 309720 # Number of bytes of host memory used
-host_seconds 0.08 # Real time elapsed on the host
+host_inst_rate 9085 # Simulator instruction rate (inst/s)
+host_op_rate 10640 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 37077299 # Simulator tick rate (ticks/s)
+host_mem_usage 304792 # Number of bytes of host memory used
+host_seconds 0.51 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
exitOnError=false
function_trace=false
function_trace_start=0
-interrupts=Null
+interrupts=
isa=system.cpu.checker.isa
istage2_mmu=system.cpu.checker.istage2_mmu
itb=system.cpu.checker.itb
[system.cpu.checker.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 17:06:13
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:19
+gem5 executing on ribera.cs.wisc.edu, pid 11113
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic-dummychecker
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.checker.isa: ISA system set to: 0 0x4499a00
- 0: system.cpu.isa: ISA system set to: 0 0x4499a00
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 2870500 because target called exit()
+Exiting @ tick 2695000 because target called exit()
sim_ticks 2695000 # Number of ticks simulated
final_tick 2695000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 803078 # Simulator instruction rate (inst/s)
-host_op_rate 938405 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 469266934 # Simulator tick rate (ticks/s)
-host_mem_usage 299548 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 30690 # Simulator instruction rate (inst/s)
+host_op_rate 35938 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 18006429 # Simulator tick rate (ticks/s)
+host_mem_usage 296212 # Number of bytes of host memory used
+host_seconds 0.15 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 17:06:03
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:18
+gem5 executing on ribera.cs.wisc.edu, pid 11161
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5df7a00
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 2870500 because target called exit()
+Exiting @ tick 2695000 because target called exit()
sim_ticks 2695000 # Number of ticks simulated
final_tick 2695000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 829930 # Simulator instruction rate (inst/s)
-host_op_rate 969708 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 484799424 # Simulator tick rate (ticks/s)
-host_mem_usage 298800 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 95191 # Simulator instruction rate (inst/s)
+host_op_rate 111442 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 55823840 # Simulator tick rate (ticks/s)
+host_mem_usage 296212 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 4592 # Number of instructions simulated
sim_ops 5378 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 17:06:24
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:09
+gem5 executing on ribera.cs.wisc.edu, pid 11108
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5fe9040
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 25969000 because target called exit()
+Exiting @ tick 28298500 because target called exit()
sim_ticks 28298500 # Number of ticks simulated
final_tick 28298500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 321731 # Simulator instruction rate (inst/s)
-host_op_rate 375194 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1990329160 # Simulator tick rate (ticks/s)
-host_mem_usage 311896 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 102105 # Simulator instruction rate (inst/s)
+host_op_rate 119142 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 632323230 # Simulator tick rate (ticks/s)
+host_mem_usage 306200 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 4566 # Number of instructions simulated
sim_ops 5330 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 07:56:24
-gem5 started Apr 22 2015 08:02:17
-gem5 executing on phenom
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:33
+gem5 executing on ribera.cs.wisc.edu, pid 4270
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello World!
-Exiting @ tick 22762000 because target called exit()
+Exiting @ tick 22454000 because target called exit()
sim_ticks 22454000 # Number of ticks simulated
final_tick 22454000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 82798 # Simulator instruction rate (inst/s)
-host_op_rate 82780 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 372464129 # Simulator tick rate (ticks/s)
-host_mem_usage 294232 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 46477 # Simulator instruction rate (inst/s)
+host_op_rate 46469 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 209234861 # Simulator tick rate (ticks/s)
+host_mem_usage 289428 # Number of bytes of host memory used
+host_seconds 0.11 # Real time elapsed on the host
sim_insts 4986 # Number of instructions simulated
sim_ops 4986 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
warn: Sockets disabled, not accepting gdb connections
+warn: mmap failing: arguments not page-aligned: start 0x0 offset 0x7efefeff
+Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:53:01
-gem5 started Jan 22 2014 17:28:13
-gem5 executing on u200540-lin
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic -re tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:34
+gem5 executing on ribera.cs.wisc.edu, pid 4273
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello World!
-Exiting @ tick 2907000 because target called exit()
+Exiting @ tick 2812000 because target called exit()
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
warn: mmap failing: arguments not page-aligned: start 0x0 offset 0x7efefeff
+Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:34:57
-gem5 started Aug 13 2015 20:18:18
-gem5 executing on artery
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:33
+gem5 executing on ribera.cs.wisc.edu, pid 4271
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 100307 # Number of ticks simulated
final_tick 100307 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 40999 # Simulator instruction rate (inst/s)
-host_op_rate 40995 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 731101 # Simulator tick rate (ticks/s)
-host_mem_usage 399732 # Number of bytes of host memory used
+host_inst_rate 40822 # Simulator instruction rate (inst/s)
+host_op_rate 40816 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 727880 # Simulator tick rate (ticks/s)
+host_mem_usage 445332 # Number of bytes of host memory used
host_seconds 0.14 # Real time elapsed on the host
sim_insts 5624 # Number of instructions simulated
sim_ops 5624 # Number of ops (including micro ops) simulated
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
warn: Sockets disabled, not accepting gdb connections
+warn: mmap failing: arguments not page-aligned: start 0x0 offset 0x7efefeff
+Redirecting stdout to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:53:01
-gem5 started Jan 22 2014 17:28:24
-gem5 executing on u200540-lin
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing -re tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:35
+gem5 executing on ribera.cs.wisc.edu, pid 4274
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello World!
-Exiting @ tick 31633000 because target called exit()
+Exiting @ tick 33912500 because target called exit()
sim_ticks 33912500 # Number of ticks simulated
final_tick 33912500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 492168 # Simulator instruction rate (inst/s)
-host_op_rate 491565 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2961014581 # Simulator tick rate (ticks/s)
-host_mem_usage 292188 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 143778 # Simulator instruction rate (inst/s)
+host_op_rate 143707 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 866170043 # Simulator tick rate (ticks/s)
+host_mem_usage 287376 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 5624 # Number of instructions simulated
sim_ops 5624 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simout
+Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 08:07:28
-gem5 started Apr 22 2015 08:13:52
-gem5 executing on phenom
-command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing
+gem5 compiled Nov 15 2015 15:02:54
+gem5 started Nov 15 2015 15:03:14
+gem5 executing on ribera.cs.wisc.edu, pid 6374
+command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 20101000 because target called exit()
+Exiting @ tick 19923000 because target called exit()
sim_ticks 19923000 # Number of ticks simulated
final_tick 19923000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 101947 # Simulator instruction rate (inst/s)
-host_op_rate 101922 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 350504038 # Simulator tick rate (ticks/s)
-host_mem_usage 292056 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 49730 # Simulator instruction rate (inst/s)
+host_op_rate 49722 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 171002739 # Simulator tick rate (ticks/s)
+host_mem_usage 287488 # Number of bytes of host memory used
+host_seconds 0.12 # Real time elapsed on the host
sim_insts 5792 # Number of instructions simulated
sim_ops 5792 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simout
+Redirecting stderr to build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:58:44
-gem5 started Jan 22 2014 17:29:13
-gem5 executing on u200540-lin
-command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic -re tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:02:54
+gem5 started Nov 15 2015 15:03:14
+gem5 executing on ribera.cs.wisc.edu, pid 6373
+command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 15 2014 16:11:41
-gem5 started Feb 15 2014 16:12:32
-gem5 executing on ribera.cs.wisc.edu
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:09
+gem5 executing on ribera.cs.wisc.edu, pid 7745
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello World!Exiting @ tick 2694500 because target called exit()
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:50:15
-gem5 started Aug 13 2015 20:18:47
-gem5 executing on artery
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:11
+gem5 executing on ribera.cs.wisc.edu, pid 7749
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 81703 # Number of ticks simulated
final_tick 81703 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 27632 # Simulator instruction rate (inst/s)
-host_op_rate 27631 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 423765 # Simulator tick rate (ticks/s)
-host_mem_usage 400152 # Number of bytes of host memory used
-host_seconds 0.19 # Real time elapsed on the host
+host_inst_rate 20108 # Simulator instruction rate (inst/s)
+host_op_rate 20107 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 308374 # Simulator tick rate (ticks/s)
+host_mem_usage 445712 # Number of bytes of host memory used
+host_seconds 0.27 # Real time elapsed on the host
sim_insts 5327 # Number of instructions simulated
sim_ops 5327 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 15 2014 16:11:41
-gem5 started Feb 15 2014 16:11:56
-gem5 executing on ribera.cs.wisc.edu
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:47
+gem5 executing on ribera.cs.wisc.edu, pid 7821
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Hello World!Exiting @ tick 27800000 because target called exit()
+Hello World!Exiting @ tick 30526500 because target called exit()
sim_ticks 30526500 # Number of ticks simulated
final_tick 30526500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 511867 # Simulator instruction rate (inst/s)
-host_op_rate 511179 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2925956101 # Simulator tick rate (ticks/s)
-host_mem_usage 292840 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 113634 # Simulator instruction rate (inst/s)
+host_op_rate 113590 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 650686714 # Simulator tick rate (ticks/s)
+host_mem_usage 287764 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 5327 # Number of instructions simulated
sim_ops 5327 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 08:10:29
-gem5 started Apr 22 2015 09:21:48
-gem5 executing on phenom
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:38
+gem5 executing on ribera.cs.wisc.edu, pid 9899
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 21143500 because target called exit()
+Exiting @ tick 20818000 because target called exit()
sim_ticks 20818000 # Number of ticks simulated
final_tick 20818000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 50154 # Simulator instruction rate (inst/s)
-host_op_rate 90851 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 194020392 # Simulator tick rate (ticks/s)
-host_mem_usage 314048 # Number of bytes of host memory used
-host_seconds 0.11 # Real time elapsed on the host
+host_inst_rate 30520 # Simulator instruction rate (inst/s)
+host_op_rate 55287 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 118073605 # Simulator tick rate (ticks/s)
+host_mem_usage 307952 # Number of bytes of host memory used
+host_seconds 0.18 # Real time elapsed on the host
sim_insts 5380 # Number of instructions simulated
sim_ops 9747 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:10:34
-gem5 started Jan 22 2014 17:30:08
-gem5 executing on u200540-lin
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:25
+gem5 executing on ribera.cs.wisc.edu, pid 9884
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
sim_ticks 5615000 # Number of ticks simulated
final_tick 5615000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 96804 # Simulator instruction rate (inst/s)
-host_op_rate 175298 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 100934348 # Simulator tick rate (ticks/s)
-host_mem_usage 242164 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 64313 # Simulator instruction rate (inst/s)
+host_op_rate 116481 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 67080627 # Simulator tick rate (ticks/s)
+host_mem_usage 295912 # Number of bytes of host memory used
+host_seconds 0.08 # Real time elapsed on the host
sim_insts 5381 # Number of instructions simulated
sim_ops 9748 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:59:06
-gem5 started Aug 13 2015 20:18:58
-gem5 executing on artery
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:48
+gem5 executing on ribera.cs.wisc.edu, pid 9909
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 87948 # Number of ticks simulated
final_tick 87948 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 39587 # Simulator instruction rate (inst/s)
-host_op_rate 71707 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 646904 # Simulator tick rate (ticks/s)
-host_mem_usage 417864 # Number of bytes of host memory used
-host_seconds 0.14 # Real time elapsed on the host
+host_inst_rate 42645 # Simulator instruction rate (inst/s)
+host_op_rate 77244 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 696812 # Simulator tick rate (ticks/s)
+host_mem_usage 463856 # Number of bytes of host memory used
+host_seconds 0.13 # Real time elapsed on the host
sim_insts 5381 # Number of instructions simulated
sim_ops 9748 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 15 2014 16:30:59
-gem5 started Feb 15 2014 16:31:13
-gem5 executing on ribera.cs.wisc.edu
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:36
+gem5 executing on ribera.cs.wisc.edu, pid 9893
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
-Exiting @ tick 28358000 because target called exit()
+Exiting @ tick 30886500 because target called exit()
sim_ticks 30886500 # Number of ticks simulated
final_tick 30886500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 150745 # Simulator instruction rate (inst/s)
-host_op_rate 272977 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 864611035 # Simulator tick rate (ticks/s)
-host_mem_usage 310988 # Number of bytes of host memory used
-host_seconds 0.04 # Real time elapsed on the host
+host_inst_rate 96344 # Simulator instruction rate (inst/s)
+host_op_rate 174473 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 552644692 # Simulator tick rate (ticks/s)
+host_mem_usage 305908 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 5381 # Number of instructions simulated
sim_ops 9748 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=true
num_work_ids=16
readfile=
symbolfile=
[system.cpu]
type=DerivO3CPU
-children=branchPred dcache dtb fuPool icache interrupts isa0 isa1 itb l2cache toL2Bus tracer workload0 workload1
+children=branchPred dcache dtb fuPool icache interrupts0 interrupts1 isa0 isa1 itb l2cache toL2Bus tracer workload0 workload1
LFSTSize=1024
LQEntries=32
LSQCheckLoads=true
iewToDecodeDelay=1
iewToFetchDelay=1
iewToRenameDelay=1
-interrupts=system.cpu.interrupts
+interrupts=system.cpu.interrupts0 system.cpu.interrupts1
isa=system.cpu.isa0 system.cpu.isa1
issueToExecuteDelay=1
issueWidth=8
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
sequential_access=false
size=131072
-[system.cpu.interrupts]
+[system.cpu.interrupts0]
+type=AlphaInterrupts
+eventq_index=0
+
+[system.cpu.interrupts1]
type=AlphaInterrupts
eventq_index=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 07:55:25
-gem5 started Apr 22 2015 08:18:53
-gem5 executing on phenom
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:33
+gem5 executing on ribera.cs.wisc.edu, pid 29163
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
Hello world!
-Exiting @ tick 25499500 because target called exit()
+Exiting @ tick 24832500 because target called exit()
sim_ticks 24832500 # Number of ticks simulated
final_tick 24832500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 76523 # Simulator instruction rate (inst/s)
-host_op_rate 76517 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 149086837 # Simulator tick rate (ticks/s)
-host_mem_usage 297164 # Number of bytes of host memory used
-host_seconds 0.17 # Real time elapsed on the host
+host_inst_rate 44040 # Simulator instruction rate (inst/s)
+host_op_rate 44038 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 85804643 # Simulator tick rate (ticks/s)
+host_mem_usage 292816 # Number of bytes of host memory used
+host_seconds 0.29 # Real time elapsed on the host
sim_insts 12744 # Number of instructions simulated
sim_ops 12744 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Apr 22 2015 08:08:31
-gem5 started Apr 22 2015 08:14:03
-gem5 executing on phenom
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:27
+gem5 executing on ribera.cs.wisc.edu, pid 7788
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
LDTW: Passed
STTW: Passed
Done
-Exiting @ tick 27482500 because target called exit()
+Exiting @ tick 26944000 because target called exit()
sim_ticks 26944000 # Number of ticks simulated
final_tick 26944000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 77815 # Simulator instruction rate (inst/s)
-host_op_rate 77809 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 145216229 # Simulator tick rate (ticks/s)
-host_mem_usage 294808 # Number of bytes of host memory used
-host_seconds 0.19 # Real time elapsed on the host
+host_inst_rate 19173 # Simulator instruction rate (inst/s)
+host_op_rate 19172 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 35783272 # Simulator tick rate (ticks/s)
+host_mem_usage 289736 # Number of bytes of host memory used
+host_seconds 0.75 # Real time elapsed on the host
sim_insts 14436 # Number of instructions simulated
sim_ops 14436 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 17:29:44
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:23
+gem5 executing on ribera.cs.wisc.edu, pid 7778
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 17:29:44
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:11
+gem5 executing on ribera.cs.wisc.edu, pid 7750
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
LDTW: Passed
STTW: Passed
Done
-Exiting @ tick 41368000 because target called exit()
+Exiting @ tick 44282500 because target called exit()
sim_ticks 44282500 # Number of ticks simulated
final_tick 44282500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 498046 # Simulator instruction rate (inst/s)
-host_op_rate 497817 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1453362434 # Simulator tick rate (ticks/s)
-host_mem_usage 292760 # Number of bytes of host memory used
-host_seconds 0.03 # Real time elapsed on the host
+host_inst_rate 18923 # Simulator instruction rate (inst/s)
+host_op_rate 18923 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 55265287 # Simulator tick rate (ticks/s)
+host_mem_usage 287684 # Number of bytes of host memory used
+host_seconds 0.80 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:45:30
-gem5 started Jul 8 2015 14:46:17
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:36
+gem5 executing on ribera.cs.wisc.edu, pid 29061
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 405501000 # Number of ticks simulated
final_tick 405501000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 137975 # Simulator instruction rate (inst/s)
-host_op_rate 137943 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 8683882570 # Simulator tick rate (ticks/s)
-host_mem_usage 670464 # Number of bytes of host memory used
-host_seconds 0.05 # Real time elapsed on the host
+host_inst_rate 75076 # Simulator instruction rate (inst/s)
+host_op_rate 75060 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 4725264699 # Simulator tick rate (ticks/s)
+host_mem_usage 672256 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
sim_insts 6440 # Number of instructions simulated
sim_ops 6440 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.l2bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.icache_port
mem_side=system.l2bus.slave[0]
[system.l2bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.l2bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.l2bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.l2cache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.l2bus.master[0]
mem_side=system.membus.slave[0]
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:45:30
-gem5 started Jul 8 2015 14:46:17
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:24
+gem5 executing on ribera.cs.wisc.edu, pid 29047
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 61608000 because target called exit()
+Exiting @ tick 61610000 because target called exit()
sim_ticks 61610000 # Number of ticks simulated
final_tick 61610000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 589960 # Simulator instruction rate (inst/s)
-host_op_rate 589258 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 5631112330 # Simulator tick rate (ticks/s)
-host_mem_usage 681568 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 49684 # Simulator instruction rate (inst/s)
+host_op_rate 49677 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 475179877 # Simulator tick rate (ticks/s)
+host_mem_usage 677504 # Number of bytes of host memory used
+host_seconds 0.13 # Real time elapsed on the host
sim_insts 6440 # Number of instructions simulated
sim_ops 6440 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:23:26
-gem5 started Jul 8 2015 14:24:31
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:21
+gem5 executing on ribera.cs.wisc.edu, pid 11118
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 325849000 # Number of ticks simulated
final_tick 325849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 60983 # Simulator instruction rate (inst/s)
-host_op_rate 70534 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3982742967 # Simulator tick rate (ticks/s)
-host_mem_usage 686060 # Number of bytes of host memory used
-host_seconds 0.08 # Real time elapsed on the host
+host_inst_rate 72040 # Simulator instruction rate (inst/s)
+host_op_rate 83312 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 4703708270 # Simulator tick rate (ticks/s)
+host_mem_usage 689424 # Number of bytes of host memory used
+host_seconds 0.07 # Real time elapsed on the host
sim_insts 4988 # Number of instructions simulated
sim_ops 5770 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.l2bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.icache_port
mem_side=system.l2bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
[system.l2bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.l2bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.l2bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.l2cache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.l2bus.master[0]
mem_side=system.membus.slave[0]
+Redirecting stdout to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:23:26
-gem5 started Jul 8 2015 14:24:31
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:08
+gem5 executing on ribera.cs.wisc.edu, pid 11149
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 49855000 # Number of ticks simulated
final_tick 49855000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 371629 # Simulator instruction rate (inst/s)
-host_op_rate 429475 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3707242713 # Simulator tick rate (ticks/s)
-host_mem_usage 698952 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 95959 # Simulator instruction rate (inst/s)
+host_op_rate 110965 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 958463106 # Simulator tick rate (ticks/s)
+host_mem_usage 693524 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 4988 # Number of instructions simulated
sim_ops 5770 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:37:59
-gem5 started Jul 8 2015 14:38:43
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:35
+gem5 executing on ribera.cs.wisc.edu, pid 4275
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 367783000 # Number of ticks simulated
final_tick 367783000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 231595 # Simulator instruction rate (inst/s)
-host_op_rate 231486 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 15131443313 # Simulator tick rate (ticks/s)
-host_mem_usage 668760 # Number of bytes of host memory used
-host_seconds 0.02 # Real time elapsed on the host
+host_inst_rate 59583 # Simulator instruction rate (inst/s)
+host_op_rate 59571 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 3894944488 # Simulator tick rate (ticks/s)
+host_mem_usage 670484 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
sim_insts 5624 # Number of instructions simulated
sim_ops 5624 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.l2bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.icache_port
mem_side=system.l2bus.slave[0]
[system.l2bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.l2bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.l2bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.l2cache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.l2bus.master[0]
mem_side=system.membus.slave[0]
+Redirecting stdout to build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level/simout
+Redirecting stderr to build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:37:59
-gem5 started Jul 8 2015 14:38:43
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level
+gem5 compiled Nov 15 2015 14:56:12
+gem5 started Nov 15 2015 14:56:33
+gem5 executing on ribera.cs.wisc.edu, pid 4272
+command line: build/MIPS/gem5.opt -d build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level -re /scratch/nilay/GEM5/gem5/tests/run.py build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 58892000 # Number of ticks simulated
final_tick 58892000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 477419 # Simulator instruction rate (inst/s)
-host_op_rate 476853 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 4988311028 # Simulator tick rate (ticks/s)
-host_mem_usage 679248 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 114712 # Simulator instruction rate (inst/s)
+host_op_rate 114668 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1200321738 # Simulator tick rate (ticks/s)
+host_mem_usage 675732 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 5624 # Number of instructions simulated
sim_ops 5624 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:30:34
-gem5 started Jul 8 2015 14:31:17
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:36
+gem5 executing on ribera.cs.wisc.edu, pid 7807
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 333033000 # Number of ticks simulated
final_tick 333033000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 184694 # Simulator instruction rate (inst/s)
-host_op_rate 184612 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 11077653777 # Simulator tick rate (ticks/s)
-host_mem_usage 669088 # Number of bytes of host memory used
-host_seconds 0.03 # Real time elapsed on the host
+host_inst_rate 87961 # Simulator instruction rate (inst/s)
+host_op_rate 87937 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 5277232874 # Simulator tick rate (ticks/s)
+host_mem_usage 670864 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 5548 # Number of instructions simulated
sim_ops 5548 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.l2bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.icache_port
mem_side=system.l2bus.slave[0]
[system.l2bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.l2bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.l2bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.l2cache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.l2bus.master[0]
mem_side=system.membus.slave[0]
+Redirecting stdout to build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2015 14:30:34
-gem5 started Jul 8 2015 14:31:17
-gem5 executing on galapagos-15.cs.wisc.edu
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:10
+gem5 executing on ribera.cs.wisc.edu, pid 7746
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
info: Entering event queue @ 0. Starting simulation...
-Hello World!Exiting @ tick 53332000 because target called exit()
+Hello World!Exiting @ tick 53334000 because target called exit()
sim_ticks 53334000 # Number of ticks simulated
final_tick 53334000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 408572 # Simulator instruction rate (inst/s)
-host_op_rate 408151 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3919888285 # Simulator tick rate (ticks/s)
-host_mem_usage 679628 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 107436 # Simulator instruction rate (inst/s)
+host_op_rate 107401 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1032139873 # Simulator tick rate (ticks/s)
+host_mem_usage 676112 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 5548 # Number of instructions simulated
sim_ops 5548 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 6 2015 10:35:34
-gem5 started Jul 6 2015 10:39:43
-gem5 executing on mustardseed.cs.wisc.edu
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:25
+gem5 executing on ribera.cs.wisc.edu, pid 9885
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 445082000 # Number of ticks simulated
final_tick 445082000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 82045 # Simulator instruction rate (inst/s)
-host_op_rate 148084 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 6387011035 # Simulator tick rate (ticks/s)
-host_mem_usage 689252 # Number of bytes of host memory used
-host_seconds 0.07 # Real time elapsed on the host
+host_inst_rate 74510 # Simulator instruction rate (inst/s)
+host_op_rate 134510 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 5803230709 # Simulator tick rate (ticks/s)
+host_mem_usage 689132 # Number of bytes of host memory used
+host_seconds 0.08 # Real time elapsed on the host
sim_insts 5712 # Number of instructions simulated
sim_ops 10314 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:536870911
memories=system.mem_ctrl
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.l2bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.icache_port
mem_side=system.l2bus.slave[0]
[system.l2bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.l2bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.l2bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.l2cache]
type=Cache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.l2bus.master[0]
mem_side=system.membus.slave[0]
+Redirecting stdout to build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 6 2015 10:35:34
-gem5 started Jul 6 2015 14:40:25
-gem5 executing on mustardseed.cs.wisc.edu
-command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level -re /afs/cs.wisc.edu/p/multifacet/users/powerjg/gem5-tutorial/gem5/tests/run.py build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:37
+gem5 executing on ribera.cs.wisc.edu, pid 9898
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level
Global frequency set at 1000000000000 ticks per second
Beginning simulation!
sim_ticks 55844000 # Number of ticks simulated
final_tick 55844000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 304186 # Simulator instruction rate (inst/s)
-host_op_rate 548880 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2969793661 # Simulator tick rate (ticks/s)
-host_mem_usage 698284 # Number of bytes of host memory used
-host_seconds 0.02 # Real time elapsed on the host
+host_inst_rate 94366 # Simulator instruction rate (inst/s)
+host_op_rate 170344 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 922046609 # Simulator tick rate (ticks/s)
+host_mem_usage 693228 # Number of bytes of host memory used
+host_seconds 0.06 # Real time elapsed on the host
sim_insts 5712 # Number of instructions simulated
sim_ops 10314 # Number of ops (including micro ops) simulated
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 17:11:38
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:32
+gem5 executing on ribera.cs.wisc.edu, pid 11134
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x63b66c0
info: Entering event queue @ 0. Starting simulation...
MCF SPEC version 1.6.I
flow value : 3080014995
checksum : 68389
optimal
-Exiting @ tick 54240661000 because target called exit()
+Exiting @ tick 54141000500 because target called exit()
sim_ticks 54141000500 # Number of ticks simulated
final_tick 54141000500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1892320 # Simulator instruction rate (inst/s)
-host_op_rate 1901744 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1130787212 # Simulator tick rate (ticks/s)
-host_mem_usage 435148 # Number of bytes of host memory used
-host_seconds 47.88 # Real time elapsed on the host
+host_inst_rate 1253669 # Simulator instruction rate (inst/s)
+host_op_rate 1259913 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 749150887 # Simulator tick rate (ticks/s)
+host_mem_usage 433332 # Number of bytes of host memory used
+host_seconds 72.27 # Real time elapsed on the host
sim_insts 90602408 # Number of instructions simulated
sim_ops 91053639 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 17:12:31
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:28:05
+gem5 executing on ribera.cs.wisc.edu, pid 11103
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5565040
info: Entering event queue @ 0. Starting simulation...
MCF SPEC version 1.6.I
flow value : 3080014995
checksum : 68389
optimal
-Exiting @ tick 147135976000 because target called exit()
+Exiting @ tick 147148719500 because target called exit()
sim_ticks 147148719500 # Number of ticks simulated
final_tick 147148719500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 921343 # Simulator instruction rate (inst/s)
-host_op_rate 925922 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1496788671 # Simulator tick rate (ticks/s)
-host_mem_usage 449288 # Number of bytes of host memory used
-host_seconds 98.31 # Real time elapsed on the host
+host_inst_rate 682988 # Simulator instruction rate (inst/s)
+host_op_rate 686382 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1109563613 # Simulator tick rate (ticks/s)
+host_mem_usage 443324 # Number of bytes of host memory used
+host_seconds 132.62 # Real time elapsed on the host
sim_insts 90576862 # Number of instructions simulated
sim_ops 91026991 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:41:52
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/long/se/10.mcf/sparc/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:39
+gem5 executing on ribera.cs.wisc.edu, pid 7812
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:10:34
-gem5 started Jan 22 2014 20:16:46
-gem5 executing on u200540-lin
-command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/long/se/10.mcf/x86/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:27
+gem5 executing on ribera.cs.wisc.edu, pid 9887
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 168950040000 # Number of ticks simulated
final_tick 168950040000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1204419 # Simulator instruction rate (inst/s)
-host_op_rate 2120788 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1287982979 # Simulator tick rate (ticks/s)
-host_mem_usage 383444 # Number of bytes of host memory used
-host_seconds 131.17 # Real time elapsed on the host
+host_inst_rate 883218 # Simulator instruction rate (inst/s)
+host_op_rate 1555205 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 944496615 # Simulator tick rate (ticks/s)
+host_mem_usage 440276 # Number of bytes of host memory used
+host_seconds 178.88 # Real time elapsed on the host
sim_insts 157988548 # Number of instructions simulated
sim_ops 278192465 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
-warn: Sockets disabled, not accepting gdb connections
-warn: Prefetch instructions in Alpha do not do anything
-warn: Prefetch instructions in Alpha do not do anything
-
-gzip: stdout: Broken pipe
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 1 2015 18:05:22
-gem5 started Oct 1 2015 18:06:58
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:36
+gem5 executing on ribera.cs.wisc.edu, pid 29067
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-atomic
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-main dictionary has 1245 entries
-49508 bytes wasted
->Exiting @ tick 250015500 because a thread reached the max instruction count
+Skipping test: Test requires the 'EioProcess' SimObject.
sim_ticks 250015500 # Number of ticks simulated
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 811683 # Simulator instruction rate (inst/s)
-host_op_rate 811655 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 405835892 # Simulator tick rate (ticks/s)
-host_mem_usage 218708 # Number of bytes of host memory used
-host_seconds 0.62 # Real time elapsed on the host
+host_inst_rate 1967280 # Simulator instruction rate (inst/s)
+host_op_rate 1967137 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 983561172 # Simulator tick rate (ticks/s)
+host_mem_usage 278544 # Number of bytes of host memory used
+host_seconds 0.25 # Real time elapsed on the host
sim_insts 500001 # Number of instructions simulated
sim_ops 500001 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
-warn: Sockets disabled, not accepting gdb connections
-warn: Prefetch instructions in Alpha do not do anything
-warn: Prefetch instructions in Alpha do not do anything
-
-gzip: stdout: Broken pipe
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 1 2015 18:05:22
-gem5 started Oct 1 2015 18:06:58
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:32
+gem5 executing on ribera.cs.wisc.edu, pid 29162
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-main dictionary has 1245 entries
-49508 bytes wasted
->Exiting @ tick 727072500 because a thread reached the max instruction count
+Skipping test: Test requires the 'EioProcess' SimObject.
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000727 # Number of seconds simulated
-sim_ticks 727072500 # Number of ticks simulated
-final_tick 727072500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.000733 # Number of seconds simulated
+sim_ticks 733071500 # Number of ticks simulated
+final_tick 733071500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 694338 # Simulator instruction rate (inst/s)
-host_op_rate 694315 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1009601044 # Simulator tick rate (ticks/s)
-host_mem_usage 228824 # Number of bytes of host memory used
-host_seconds 0.72 # Real time elapsed on the host
+host_inst_rate 1060991 # Simulator instruction rate (inst/s)
+host_op_rate 1060952 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1555451807 # Simulator tick rate (ticks/s)
+host_mem_usage 288660 # Number of bytes of host memory used
+host_seconds 0.47 # Real time elapsed on the host
sim_insts 500001 # Number of instructions simulated
sim_ops 500001 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.physmem.num_reads::cpu.inst 403 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 454 # Number of read requests responded to by this memory
system.physmem.num_reads::total 857 # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst 35473766 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 39963002 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 75436769 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 35473766 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 35473766 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 35473766 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 39963002 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 75436769 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 35183471 # Total read bandwidth from this memory (bytes/s)
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system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 403 # number of ReadCleanReq accesses(hits+misses)
system.cpu.l2cache.overall_miss_rate::cpu.inst 1 # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::cpu.data 1 # miss rate for overall accesses
system.cpu.l2cache.overall_miss_rate::total 1 # miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 52500 # average ReadExReq miss latency
-system.cpu.l2cache.ReadExReq_avg_miss_latency::total 52500 # average ReadExReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 52501.240695 # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 52501.240695 # average ReadCleanReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 52500 # average ReadSharedReq miss latency
-system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 52500 # average ReadSharedReq miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 52501.240695 # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::cpu.data 52500 # average overall miss latency
-system.cpu.l2cache.demand_avg_miss_latency::total 52500.583431 # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 52501.240695 # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 52500 # average overall miss latency
-system.cpu.l2cache.overall_avg_miss_latency::total 52500.583431 # average overall miss latency
+system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 59500 # average ReadExReq miss latency
+system.cpu.l2cache.ReadExReq_avg_miss_latency::total 59500 # average ReadExReq miss latency
+system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 59501.240695 # average ReadCleanReq miss latency
+system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 59501.240695 # average ReadCleanReq miss latency
+system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 59500 # average ReadSharedReq miss latency
+system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 59500 # average ReadSharedReq miss latency
+system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 59501.240695 # average overall miss latency
+system.cpu.l2cache.demand_avg_miss_latency::cpu.data 59500 # average overall miss latency
+system.cpu.l2cache.demand_avg_miss_latency::total 59500.583431 # average overall miss latency
+system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 59501.240695 # average overall miss latency
+system.cpu.l2cache.overall_avg_miss_latency::cpu.data 59500 # average overall miss latency
+system.cpu.l2cache.overall_avg_miss_latency::total 59500.583431 # average overall miss latency
system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.overall_mshr_misses::cpu.inst 403 # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::cpu.data 454 # number of overall MSHR misses
system.cpu.l2cache.overall_mshr_misses::total 857 # number of overall MSHR misses
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 5907500 # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 5907500 # number of ReadExReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 17128000 # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 17128000 # number of ReadCleanReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 13387500 # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 13387500 # number of ReadSharedReq MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 17128000 # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 19295000 # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.demand_mshr_miss_latency::total 36423000 # number of demand (read+write) MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 17128000 # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 19295000 # number of overall MSHR miss cycles
-system.cpu.l2cache.overall_mshr_miss_latency::total 36423000 # number of overall MSHR miss cycles
+system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 6880500 # number of ReadExReq MSHR miss cycles
+system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 6880500 # number of ReadExReq MSHR miss cycles
+system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 19949000 # number of ReadCleanReq MSHR miss cycles
+system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 19949000 # number of ReadCleanReq MSHR miss cycles
+system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 15592500 # number of ReadSharedReq MSHR miss cycles
+system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 15592500 # number of ReadSharedReq MSHR miss cycles
+system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 19949000 # number of demand (read+write) MSHR miss cycles
+system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 22473000 # number of demand (read+write) MSHR miss cycles
+system.cpu.l2cache.demand_mshr_miss_latency::total 42422000 # number of demand (read+write) MSHR miss cycles
+system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 19949000 # number of overall MSHR miss cycles
+system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 22473000 # number of overall MSHR miss cycles
+system.cpu.l2cache.overall_mshr_miss_latency::total 42422000 # number of overall MSHR miss cycles
system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 1 # mshr miss rate for ReadCleanReq accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 1 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 # mshr miss rate for overall accesses
system.cpu.l2cache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 42500 # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 42500 # average ReadExReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 42501.240695 # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 42501.240695 # average ReadCleanReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 42500 # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 42500 # average ReadSharedReq mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 42501.240695 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 42500 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 42500.583431 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 42501.240695 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 42500 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 42500.583431 # average overall mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 49500 # average ReadExReq mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 49500 # average ReadExReq mshr miss latency
+system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 49501.240695 # average ReadCleanReq mshr miss latency
+system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 49501.240695 # average ReadCleanReq mshr miss latency
+system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 49500 # average ReadSharedReq mshr miss latency
+system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 49500 # average ReadSharedReq mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 49501.240695 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 49500 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::total 49500.583431 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 49501.240695 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 49500 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::total 49500.583431 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.toL2Bus.snoop_filter.tot_requests 857 # Total number of requests made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.membus.snoop_fanout::total 857 # Request fanout histogram
system.membus.reqLayer0.occupancy 857500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
-system.membus.respLayer1.occupancy 4285500 # Layer occupancy (ticks)
+system.membus.respLayer1.occupancy 4285000 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.6 # Layer utilization (%)
---------- End Simulation Statistics ----------
-warn: Sockets disabled, not accepting gdb connections
-warn: Prefetch instructions in Alpha do not do anything
-warn: Prefetch instructions in Alpha do not do anything
-
-gzip: stdout: Broken pipe
-stdout: Broken pipe
-
-gzip: stdout: Broken pipe
-
-gzip: stdout: Broken pipe
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 1 2015 18:05:22
-gem5 started Oct 1 2015 18:06:58
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:26
+gem5 executing on ribera.cs.wisc.edu, pid 29051
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-atomic-mp
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-49508 bytes wasted
-49508 bytes wasted
-49508 bytes wasted
-49508 bytes wasted
->>>>Exiting @ tick 250015500 because a thread reached the max instruction count
+Skipping test: Test requires the 'EioProcess' SimObject.
sim_ticks 250015500 # Number of ticks simulated
final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1088528 # Simulator instruction rate (inst/s)
-host_op_rate 1088500 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 136068763 # Simulator tick rate (ticks/s)
-host_mem_usage 242992 # Number of bytes of host memory used
-host_seconds 1.84 # Real time elapsed on the host
+host_inst_rate 1830318 # Simulator instruction rate (inst/s)
+host_op_rate 1830286 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 228795713 # Simulator tick rate (ticks/s)
+host_mem_usage 302752 # Number of bytes of host memory used
+host_seconds 1.09 # Real time elapsed on the host
sim_insts 2000004 # Number of instructions simulated
sim_ops 2000004 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu0.icache.fast_writes 0 # number of fast writes performed
system.cpu0.icache.cache_copies 0 # number of cache copies performed
+system.cpu0.icache.writebacks::writebacks 152 # number of writebacks
+system.cpu0.icache.writebacks::total 152 # number of writebacks
system.cpu0.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu1.dtb.fetch_hits 0 # ITB hits
system.cpu1.dtb.fetch_misses 0 # ITB misses
system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu1.icache.fast_writes 0 # number of fast writes performed
system.cpu1.icache.cache_copies 0 # number of cache copies performed
+system.cpu1.icache.writebacks::writebacks 152 # number of writebacks
+system.cpu1.icache.writebacks::total 152 # number of writebacks
system.cpu1.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu2.dtb.fetch_hits 0 # ITB hits
system.cpu2.dtb.fetch_misses 0 # ITB misses
system.cpu2.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu2.icache.fast_writes 0 # number of fast writes performed
system.cpu2.icache.cache_copies 0 # number of cache copies performed
+system.cpu2.icache.writebacks::writebacks 152 # number of writebacks
+system.cpu2.icache.writebacks::total 152 # number of writebacks
system.cpu2.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu3.dtb.fetch_hits 0 # ITB hits
system.cpu3.dtb.fetch_misses 0 # ITB misses
system.cpu3.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu3.icache.fast_writes 0 # number of fast writes performed
system.cpu3.icache.cache_copies 0 # number of cache copies performed
+system.cpu3.icache.writebacks::writebacks 152 # number of writebacks
+system.cpu3.icache.writebacks::total 152 # number of writebacks
system.cpu3.icache.no_allocate_misses 0 # Number of misses that were no-allocate
system.l2c.tags.replacements 0 # number of replacements
system.l2c.tags.tagsinuse 1962.780232 # Cycle average of tags in use
system.l2c.tags.occ_task_id_percent::1024 0.044739 # Percentage of cache occupancy per task id
system.l2c.tags.tag_accesses 39936 # Number of tag accesses
system.l2c.tags.data_accesses 39936 # Number of data accesses
-system.l2c.Writeback_hits::writebacks 116 # number of Writeback hits
-system.l2c.Writeback_hits::total 116 # number of Writeback hits
+system.l2c.WritebackDirty_hits::writebacks 116 # number of WritebackDirty hits
+system.l2c.WritebackDirty_hits::total 116 # number of WritebackDirty hits
+system.l2c.WritebackClean_hits::writebacks 608 # number of WritebackClean hits
+system.l2c.WritebackClean_hits::total 608 # number of WritebackClean hits
system.l2c.ReadCleanReq_hits::cpu0.inst 60 # number of ReadCleanReq hits
system.l2c.ReadCleanReq_hits::cpu1.inst 60 # number of ReadCleanReq hits
system.l2c.ReadCleanReq_hits::cpu2.inst 60 # number of ReadCleanReq hits
system.l2c.overall_misses::cpu3.inst 403 # number of overall misses
system.l2c.overall_misses::cpu3.data 454 # number of overall misses
system.l2c.overall_misses::total 3428 # number of overall misses
-system.l2c.Writeback_accesses::writebacks 116 # number of Writeback accesses(hits+misses)
-system.l2c.Writeback_accesses::total 116 # number of Writeback accesses(hits+misses)
+system.l2c.WritebackDirty_accesses::writebacks 116 # number of WritebackDirty accesses(hits+misses)
+system.l2c.WritebackDirty_accesses::total 116 # number of WritebackDirty accesses(hits+misses)
+system.l2c.WritebackClean_accesses::writebacks 608 # number of WritebackClean accesses(hits+misses)
+system.l2c.WritebackClean_accesses::total 608 # number of WritebackClean accesses(hits+misses)
system.l2c.ReadExReq_accesses::cpu0.data 139 # number of ReadExReq accesses(hits+misses)
system.l2c.ReadExReq_accesses::cpu1.data 139 # number of ReadExReq accesses(hits+misses)
system.l2c.ReadExReq_accesses::cpu2.data 139 # number of ReadExReq accesses(hits+misses)
system.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.toL2Bus.trans_dist::ReadResp 3148 # Transaction distribution
-system.toL2Bus.trans_dist::Writeback 116 # Transaction distribution
-system.toL2Bus.trans_dist::CleanEvict 736 # Transaction distribution
+system.toL2Bus.trans_dist::WritebackDirty 116 # Transaction distribution
+system.toL2Bus.trans_dist::WritebackClean 608 # Transaction distribution
+system.toL2Bus.trans_dist::CleanEvict 128 # Transaction distribution
system.toL2Bus.trans_dist::ReadExReq 556 # Transaction distribution
system.toL2Bus.trans_dist::ReadExResp 556 # Transaction distribution
system.toL2Bus.trans_dist::ReadCleanReq 1852 # Transaction distribution
system.toL2Bus.pkt_count_system.cpu3.icache.mem_side::system.l2c.cpu_side 1078 # Packet count per connected master and slave (bytes)
system.toL2Bus.pkt_count_system.cpu3.dcache.mem_side::system.l2c.cpu_side 987 # Packet count per connected master and slave (bytes)
system.toL2Bus.pkt_count::total 8260 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 39360 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 39360 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu2.icache.mem_side::system.l2c.cpu_side 39360 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.pkt_size_system.cpu2.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 29632 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu3.icache.mem_side::system.l2c.cpu_side 39360 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size::total 244480 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size::total 283392 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.snoops 0 # Total snoops (count)
system.toL2Bus.snoop_fanout::samples 4556 # Request fanout histogram
system.toL2Bus.snoop_fanout::mean 0 # Request fanout histogram
-warn: Sockets disabled, not accepting gdb connections
-warn: Prefetch instructions in Alpha do not do anything
-warn: Prefetch instructions in Alpha do not do anything
-
-gzip: stdout: Broken pipe
-
-gzip: stdout: Broken pipe
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 1 2015 18:05:22
-gem5 started Oct 1 2015 18:06:57
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp -re /z/stever/hg/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:20
+gem5 executing on ribera.cs.wisc.edu, pid 29151
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio/simple-timing-mp
-Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-main dictionary has 1245 entries
-49508 bytes wasted
-49508 bytes wasted
-49508 bytes wasted
-49508 bytes wasted
->>>>Exiting @ tick 727902500 because a thread reached the max instruction count
+Skipping test: Test requires the 'EioProcess' SimObject.
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000728 # Number of seconds simulated
-sim_ticks 727902500 # Number of ticks simulated
-final_tick 727902500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.000734 # Number of seconds simulated
+sim_ticks 733914500 # Number of ticks simulated
+final_tick 733914500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 608748 # Simulator instruction rate (inst/s)
-host_op_rate 608744 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 221554150 # Simulator tick rate (ticks/s)
-host_mem_usage 243036 # Number of bytes of host memory used
-host_seconds 3.29 # Real time elapsed on the host
-sim_insts 1999978 # Number of instructions simulated
-sim_ops 1999978 # Number of ops (including micro ops) simulated
+host_inst_rate 992162 # Simulator instruction rate (inst/s)
+host_op_rate 992153 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 364079839 # Simulator tick rate (ticks/s)
+host_mem_usage 302744 # Number of bytes of host memory used
+host_seconds 2.02 # Real time elapsed on the host
+sim_insts 1999973 # Number of instructions simulated
+sim_ops 1999973 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu0.inst 25792 # Number of bytes read from this memory
system.physmem.num_reads::cpu3.inst 403 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu3.data 454 # Number of read requests responded to by this memory
system.physmem.num_reads::total 3428 # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu0.inst 35433317 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.data 39917434 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.inst 35433317 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.data 39917434 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.inst 35433317 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.data 39917434 # Total read bandwidth from this memory (bytes/s)
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system.cpu1.icache.ReadReq_mshr_miss_rate::cpu1.inst 0.000926 # mshr miss rate for ReadReq accesses
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+system.cpu1.icache.overall_avg_mshr_miss_latency::cpu1.inst 54686.825054 # average overall mshr miss latency
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system.cpu2.dtb.fetch_misses 0 # ITB misses
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system.cpu2.op_class::MemWrite 56349 11.27% 100.00% # Class of executed instruction
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system.cpu2.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
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system.cpu2.icache.ReadReq_mshr_miss_rate::cpu2.inst 0.000926 # mshr miss rate for ReadReq accesses
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system.cpu3.dtb.fetch_misses 0 # ITB misses
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system.cpu3.dtb.data_acv 0 # DTB access violations
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system.cpu3.itb.fetch_misses 13 # ITB misses
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system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started
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system.cpu3.num_fp_register_writes 16 # number of times the floating registers were written
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system.cpu3.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu3.idle_fraction 0 # Percentage of idle cycles
system.cpu3.Branches 59022 # Number of branches fetched
system.cpu3.op_class::No_OpClass 18814 3.76% 3.76% # Class of executed instruction
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system.cpu3.op_class::IntMult 10 0.00% 63.84% # Class of executed instruction
system.cpu3.op_class::IntDiv 0 0.00% 63.84% # Class of executed instruction
system.cpu3.op_class::FloatAdd 10 0.00% 63.84% # Class of executed instruction
system.cpu3.op_class::MemWrite 56349 11.27% 100.00% # Class of executed instruction
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system.toL2Bus.pkt_size_system.cpu3.dcache.mem_side::system.l2c.cpu_side 31488 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size::total 244480 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size::total 283392 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.snoops 0 # Total snoops (count)
-system.toL2Bus.snoop_fanout::samples 4556 # Request fanout histogram
+system.toL2Bus.snoop_fanout::samples 3704 # Request fanout histogram
system.toL2Bus.snoop_fanout::mean 0 # Request fanout histogram
system.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.toL2Bus.snoop_fanout::0 4556 100.00% 100.00% # Request fanout histogram
+system.toL2Bus.snoop_fanout::0 3704 100.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.toL2Bus.snoop_fanout::max_value 0 # Request fanout histogram
-system.toL2Bus.snoop_fanout::total 4556 # Request fanout histogram
-system.toL2Bus.reqLayer0.occupancy 2394000 # Layer occupancy (ticks)
-system.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%)
+system.toL2Bus.snoop_fanout::total 3704 # Request fanout histogram
+system.toL2Bus.reqLayer0.occupancy 3002000 # Layer occupancy (ticks)
+system.toL2Bus.reqLayer0.utilization 0.4 # Layer utilization (%)
system.toL2Bus.respLayer0.occupancy 694500 # Layer occupancy (ticks)
system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
system.toL2Bus.respLayer1.occupancy 694500 # Layer occupancy (ticks)
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/30.eon/alpha/tru64/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/30.eon/alpha/tru64/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:48:27
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:24
+gem5 executing on ribera.cs.wisc.edu, pid 29045
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/30.eon/alpha/tru64/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/30.eon/alpha/tru64/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu2.dcache_port
mem_side=system.toL2Bus.slave[5]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu2.icache_port
mem_side=system.toL2Bus.slave[4]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu3.dcache_port
mem_side=system.toL2Bus.slave[7]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu3.icache_port
mem_side=system.toL2Bus.slave[6]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 14 2015 22:05:26
-gem5 started Sep 14 2015 22:09:42
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:21
+gem5 executing on ribera.cs.wisc.edu, pid 7757
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp
Global frequency set at 1000000000000 ticks per second
[Iteration 1, Thread 2] Got lock
[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
Iteration 1 completed
+[Iteration 2, Thread 3] Got lock
+[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=0, now next=1
+[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 2, Thread 2] Got lock
[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=2, now next=3
Iteration 2 completed
+[Iteration 3, Thread 1] Got lock
+[Iteration 3, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=0, now next=3
+[Iteration 3, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 3, Thread 2] Got lock
[Iteration 3, Thread 2] Critical section done, previously next=3, now next=2
-[Iteration 3, Thread 1] Got lock
-[Iteration 3, Thread 1] Critical section done, previously next=2, now next=1
Iteration 3 completed
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 4, Thread 2] Got lock
-[Iteration 4, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
+[Iteration 4, Thread 3] Got lock
+[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1
Iteration 4 completed
[Iteration 5, Thread 3] Got lock
[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
Iteration 5 completed
+[Iteration 6, Thread 2] Got lock
+[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=0, now next=3
+[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
[Iteration 6, Thread 1] Got lock
[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=1, now next=2
Iteration 6 completed
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 7, Thread 2] Critical section done, previously next=0, now next=2
+[Iteration 7, Thread 1] Got lock
+[Iteration 7, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 7, Thread 3] Got lock
+[Iteration 7, Thread 3] Critical section done, previously next=1, now next=3
Iteration 7 completed
[Iteration 8, Thread 2] Got lock
[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 8, Thread 3] Got lock
[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3
Iteration 8 completed
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 9, Thread 1] Got lock
-[Iteration 9, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
+[Iteration 9, Thread 3] Got lock
+[Iteration 9, Thread 3] Critical section done, previously next=1, now next=3
[Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 9, Thread 2] Critical section done, previously next=3, now next=2
Iteration 9 completed
[Iteration 10, Thread 3] Got lock
[Iteration 10, Thread 3] Critical section done, previously next=0, now next=3
-[Iteration 10, Thread 2] Got lock
-[Iteration 10, Thread 2] Critical section done, previously next=3, now next=2
[Iteration 10, Thread 1] Got lock
-[Iteration 10, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 10, Thread 2] Got lock
+[Iteration 10, Thread 2] Critical section done, previously next=1, now next=2
Iteration 10 completed
PASSED :-)
-Exiting @ tick 107049000 because target called exit()
+Exiting @ tick 107836000 because target called exit()
sim_ticks 107836000 # Number of ticks simulated
final_tick 107836000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 166566 # Simulator instruction rate (inst/s)
-host_op_rate 166565 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 18067031 # Simulator tick rate (ticks/s)
-host_mem_usage 311540 # Number of bytes of host memory used
-host_seconds 5.97 # Real time elapsed on the host
+host_inst_rate 71421 # Simulator instruction rate (inst/s)
+host_op_rate 71421 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 7746922 # Simulator tick rate (ticks/s)
+host_mem_usage 306188 # Number of bytes of host memory used
+host_seconds 13.92 # Real time elapsed on the host
sim_insts 994171 # Number of instructions simulated
sim_ops 994171 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu2.dcache_port
mem_side=system.toL2Bus.slave[5]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu2.icache_port
mem_side=system.toL2Bus.slave[4]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu3.dcache_port
mem_side=system.toL2Bus.slave[7]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu3.icache_port
mem_side=system.toL2Bus.slave[6]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 11 2014 05:01:31
-gem5 started Oct 11 2014 05:01:48
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:11
+gem5 executing on ribera.cs.wisc.edu, pid 7751
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Init done
sim_ticks 87707000 # Number of ticks simulated
final_tick 87707000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1763094 # Simulator instruction rate (inst/s)
-host_op_rate 1763034 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 228285342 # Simulator tick rate (ticks/s)
-host_mem_usage 306164 # Number of bytes of host memory used
-host_seconds 0.38 # Real time elapsed on the host
+host_inst_rate 158878 # Simulator instruction rate (inst/s)
+host_op_rate 158877 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 20572695 # Simulator tick rate (ticks/s)
+host_mem_usage 302096 # Number of bytes of host memory used
+host_seconds 4.26 # Real time elapsed on the host
sim_insts 677333 # Number of instructions simulated
sim_ops 677333 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.dcache_port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu0.icache_port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.dcache_port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu1.icache_port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu2.dcache_port
mem_side=system.toL2Bus.slave[5]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu2.icache_port
mem_side=system.toL2Bus.slave[4]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu3.dcache_port
mem_side=system.toL2Bus.slave[7]
addr_ranges=0:18446744073709551615
assoc=1
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu3.icache_port
mem_side=system.toL2Bus.slave[6]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 15 2014 16:11:41
-gem5 started Feb 15 2014 16:12:55
-gem5 executing on ribera.cs.wisc.edu
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:11
+gem5 executing on ribera.cs.wisc.edu, pid 7748
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Init done
-[Iteration 1, Thread 1] Got lock
-[Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 1, Thread 2] Critical section done, previously next=0, now next=2
+[Iteration 1, Thread 1] Got lock
+[Iteration 1, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3
+[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
Iteration 1 completed
-[Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 2, Thread 1] Got lock
-[Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=1, now next=3
+[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
+[Iteration 2, Thread 1] Got lock
+[Iteration 2, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 2, Thread 2] Got lock
+[Iteration 2, Thread 2] Critical section done, previously next=1, now next=2
Iteration 2 completed
[Iteration 3, Thread 1] Got lock
[Iteration 3, Thread 1] Critical section done, previously next=0, now next=1
Iteration 3 completed
[Iteration 4, Thread 2] Got lock
[Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
+[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
+[Iteration 4, Thread 1] Got lock
+[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1
Iteration 4 completed
+[Iteration 5, Thread 3] Got lock
+[Iteration 5, Thread 3] Critical section done, previously next=0, now next=3
[Iteration 5, Thread 1] Got lock
-[Iteration 5, Thread 1] Critical section done, previously next=0, now next=1
+[Iteration 5, Thread 1] Critical section done, previously next=3, now next=1
[Iteration 5, Thread 2] Got lock
[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3
Iteration 5 completed
-[Iteration 6, Thread 2] Got lock
-[Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 6, Thread 1] Critical section done, previously next=0, now next=1
+[Iteration 6, Thread 2] Got lock
+[Iteration 6, Thread 2] Critical section done, previously next=1, now next=2
[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3
+[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
Iteration 6 completed
-[Iteration 7, Thread 1] Got lock
-[Iteration 7, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 7, Thread 2] Critical section done, previously next=0, now next=2
[Iteration 7, Thread 3] Got lock
[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
+[Iteration 7, Thread 1] Got lock
+[Iteration 7, Thread 1] Critical section done, previously next=3, now next=1
Iteration 7 completed
-[Iteration 8, Thread 2] Got lock
-[Iteration 8, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3
+[Iteration 8, Thread 3] Critical section done, previously next=0, now next=3
+[Iteration 8, Thread 1] Got lock
+[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 8, Thread 2] Got lock
+[Iteration 8, Thread 2] Critical section done, previously next=1, now next=2
Iteration 8 completed
[Iteration 9, Thread 1] Got lock
[Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
[Iteration 10, Thread 1] Critical section done, previously next=3, now next=1
Iteration 10 completed
PASSED :-)
-Exiting @ tick 262794500 because target called exit()
+Exiting @ tick 264840500 because target called exit()
sim_ticks 264840500 # Number of ticks simulated
final_tick 264840500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1022675 # Simulator instruction rate (inst/s)
-host_op_rate 1022653 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 408888728 # Simulator tick rate (ticks/s)
-host_mem_usage 306160 # Number of bytes of host memory used
-host_seconds 0.65 # Real time elapsed on the host
+host_inst_rate 154084 # Simulator instruction rate (inst/s)
+host_op_rate 154083 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 61608375 # Simulator tick rate (ticks/s)
+host_mem_usage 302100 # Number of bytes of host memory used
+host_seconds 4.30 # Real time elapsed on the host
sim_insts 662366 # Number of instructions simulated
sim_ops 662366 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=8
+number_of_virtual_networks=3
phys_mem=Null
randomization=false
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[19]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[27]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[20]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l1_cntrl1]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl1.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl1.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l1_cntrl1.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl1.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l1_cntrl1.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l1_cntrl1.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.l1_cntrl2]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl2.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl2.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.l1_cntrl2.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l1_cntrl2.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[7]
[system.ruby.l1_cntrl2.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.l1_cntrl2.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[8]
[system.ruby.l1_cntrl3]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl3.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl3.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[9]
[system.ruby.l1_cntrl3.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl3.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[10]
[system.ruby.l1_cntrl3.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[7]
[system.ruby.l1_cntrl3.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[11]
[system.ruby.l1_cntrl4]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl4.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl4.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[12]
[system.ruby.l1_cntrl4.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[8]
[system.ruby.l1_cntrl4.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[13]
[system.ruby.l1_cntrl4.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[9]
[system.ruby.l1_cntrl4.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[14]
[system.ruby.l1_cntrl5]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl5.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl5.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[15]
[system.ruby.l1_cntrl5.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[10]
[system.ruby.l1_cntrl5.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[16]
[system.ruby.l1_cntrl5.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[11]
[system.ruby.l1_cntrl5.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[17]
[system.ruby.l1_cntrl6]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl6.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl6.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[18]
[system.ruby.l1_cntrl6.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[12]
[system.ruby.l1_cntrl6.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[19]
[system.ruby.l1_cntrl6.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[13]
[system.ruby.l1_cntrl6.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[20]
[system.ruby.l1_cntrl7]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl7.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl7.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[21]
[system.ruby.l1_cntrl7.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[14]
[system.ruby.l1_cntrl7.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[22]
[system.ruby.l1_cntrl7.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[15]
[system.ruby.l1_cntrl7.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[23]
[system.ruby.l2_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[24]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[25]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[17]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[26]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[18]
[system.ruby.l2_cntrl0.unblockToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[16]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3 system.ruby.network.int_links4 system.ruby.network.int_links5 system.ruby.network.int_links6 system.ruby.network.int_links7 system.ruby.network.int_links8 system.ruby.network.int_links9
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers00 system.ruby.network.routers01 system.ruby.network.routers02 system.ruby.network.routers03 system.ruby.network.routers04 system.ruby.network.routers05 system.ruby.network.routers06 system.ruby.network.routers07 system.ruby.network.routers08 system.ruby.network.routers09 system.ruby.network.routers10
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
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[system.ruby.network.routers09.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers24]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers25]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers26]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers27]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers28]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers29]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers30]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers31]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers09.port_buffers32]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers10.port_buffers00 system.ruby.network.routers10.port_buffers01 system.ruby.network.routers10.port_buffers02 system.ruby.network.routers10.port_buffers03 system.ruby.network.routers10.port_buffers04 system.ruby.network.routers10.port_buffers05 system.ruby.network.routers10.port_buffers06 system.ruby.network.routers10.port_buffers07 system.ruby.network.routers10.port_buffers08 system.ruby.network.routers10.port_buffers09 system.ruby.network.routers10.port_buffers10 system.ruby.network.routers10.port_buffers11 system.ruby.network.routers10.port_buffers12 system.ruby.network.routers10.port_buffers13 system.ruby.network.routers10.port_buffers14 system.ruby.network.routers10.port_buffers15 system.ruby.network.routers10.port_buffers16 system.ruby.network.routers10.port_buffers17 system.ruby.network.routers10.port_buffers18 system.ruby.network.routers10.port_buffers19 system.ruby.network.routers10.port_buffers20 system.ruby.network.routers10.port_buffers21 system.ruby.network.routers10.port_buffers22 system.ruby.network.routers10.port_buffers23 system.ruby.network.routers10.port_buffers24 system.ruby.network.routers10.port_buffers25 system.ruby.network.routers10.port_buffers26 system.ruby.network.routers10.port_buffers27 system.ruby.network.routers10.port_buffers28 system.ruby.network.routers10.port_buffers29 system.ruby.network.routers10.port_buffers30 system.ruby.network.routers10.port_buffers31 system.ruby.network.routers10.port_buffers32 system.ruby.network.routers10.port_buffers33 system.ruby.network.routers10.port_buffers34 system.ruby.network.routers10.port_buffers35 system.ruby.network.routers10.port_buffers36 system.ruby.network.routers10.port_buffers37 system.ruby.network.routers10.port_buffers38 system.ruby.network.routers10.port_buffers39 system.ruby.network.routers10.port_buffers40 system.ruby.network.routers10.port_buffers41 system.ruby.network.routers10.port_buffers42 system.ruby.network.routers10.port_buffers43 system.ruby.network.routers10.port_buffers44 system.ruby.network.routers10.port_buffers45 system.ruby.network.routers10.port_buffers46 system.ruby.network.routers10.port_buffers47 system.ruby.network.routers10.port_buffers48 system.ruby.network.routers10.port_buffers49 system.ruby.network.routers10.port_buffers50 system.ruby.network.routers10.port_buffers51 system.ruby.network.routers10.port_buffers52 system.ruby.network.routers10.port_buffers53 system.ruby.network.routers10.port_buffers54 system.ruby.network.routers10.port_buffers55 system.ruby.network.routers10.port_buffers56 system.ruby.network.routers10.port_buffers57 system.ruby.network.routers10.port_buffers58 system.ruby.network.routers10.port_buffers59
-recycle_latency=0
router_id=10
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers24]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers25]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers26]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers27]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers28]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers29]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers30]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers31]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers32]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers33]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers34]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers35]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers36]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers37]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers38]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers39]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers40]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers41]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers42]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers43]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers44]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers45]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers46]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers47]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers48]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers49]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers50]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers51]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers52]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers53]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers54]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers55]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers56]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers57]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers58]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers59]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-system.cpu0: completed 10000 read, 5465 write accesses @998393
-system.cpu1: completed 10000 read, 5568 write accesses @998560
-system.cpu6: completed 10000 read, 5642 write accesses @998656
-system.cpu2: completed 10000 read, 5573 write accesses @1004841
-system.cpu3: completed 10000 read, 5476 write accesses @1010347
-system.cpu4: completed 10000 read, 5603 write accesses @1011379
-system.cpu5: completed 10000 read, 5505 write accesses @1015197
-system.cpu7: completed 10000 read, 5844 write accesses @1020892
-system.cpu5: completed 20000 read, 10826 write accesses @1988283
-system.cpu0: completed 20000 read, 10919 write accesses @1991296
-system.cpu2: completed 20000 read, 11214 write accesses @2016414
-system.cpu4: completed 20000 read, 11078 write accesses @2020999
-system.cpu3: completed 20000 read, 10973 write accesses @2024874
-system.cpu7: completed 20000 read, 11506 write accesses @2025376
-system.cpu1: completed 20000 read, 11280 write accesses @2034256
-system.cpu6: completed 20000 read, 11147 write accesses @2037670
-system.cpu0: completed 30000 read, 16492 write accesses @3003033
-system.cpu5: completed 30000 read, 16298 write accesses @3011465
-system.cpu2: completed 30000 read, 16727 write accesses @3021562
-system.cpu7: completed 30000 read, 17173 write accesses @3033070
-system.cpu4: completed 30000 read, 16630 write accesses @3037868
-system.cpu6: completed 30000 read, 16672 write accesses @3038113
-system.cpu1: completed 30000 read, 16762 write accesses @3039811
-system.cpu3: completed 30000 read, 16588 write accesses @3051868
-system.cpu0: completed 40000 read, 21857 write accesses @4007879
-system.cpu2: completed 40000 read, 22234 write accesses @4028507
-system.cpu5: completed 40000 read, 21876 write accesses @4029649
-system.cpu6: completed 40000 read, 22097 write accesses @4032969
-system.cpu7: completed 40000 read, 22955 write accesses @4041622
-system.cpu1: completed 40000 read, 22471 write accesses @4049342
-system.cpu4: completed 40000 read, 22226 write accesses @4049383
-system.cpu3: completed 40000 read, 22078 write accesses @4062017
-system.cpu0: completed 50000 read, 27390 write accesses @5007193
-system.cpu7: completed 50000 read, 28594 write accesses @5029095
-system.cpu6: completed 50000 read, 27699 write accesses @5034544
-system.cpu5: completed 50000 read, 27508 write accesses @5037357
-system.cpu2: completed 50000 read, 27805 write accesses @5056032
-system.cpu1: completed 50000 read, 27932 write accesses @5062407
-system.cpu4: completed 50000 read, 27727 write accesses @5066868
-system.cpu3: completed 50000 read, 27598 write accesses @5095158
-system.cpu0: completed 60000 read, 33008 write accesses @6027788
-system.cpu7: completed 60000 read, 34229 write accesses @6038886
-system.cpu2: completed 60000 read, 33270 write accesses @6041019
-system.cpu5: completed 60000 read, 33038 write accesses @6044214
-system.cpu6: completed 60000 read, 33158 write accesses @6056522
-system.cpu1: completed 60000 read, 33437 write accesses @6060012
-system.cpu4: completed 60000 read, 33093 write accesses @6067283
-system.cpu3: completed 60000 read, 33046 write accesses @6099437
-system.cpu5: completed 70000 read, 38476 write accesses @7038412
-system.cpu0: completed 70000 read, 38672 write accesses @7049839
-system.cpu1: completed 70000 read, 38910 write accesses @7056694
-system.cpu2: completed 70000 read, 38729 write accesses @7056805
-system.cpu7: completed 70000 read, 39799 write accesses @7060220
-system.cpu4: completed 70000 read, 38525 write accesses @7063727
-system.cpu6: completed 70000 read, 38777 write accesses @7087878
-system.cpu3: completed 70000 read, 38653 write accesses @7104531
-system.cpu1: completed 80000 read, 44180 write accesses @8052473
-system.cpu4: completed 80000 read, 44107 write accesses @8058206
-system.cpu5: completed 80000 read, 44043 write accesses @8061949
-system.cpu2: completed 80000 read, 44449 write accesses @8062064
-system.cpu0: completed 80000 read, 44315 write accesses @8063955
-system.cpu7: completed 80000 read, 45316 write accesses @8089150
-system.cpu6: completed 80000 read, 44501 write accesses @8102611
-system.cpu3: completed 80000 read, 44234 write accesses @8131712
-system.cpu0: completed 90000 read, 49836 write accesses @9060237
-system.cpu1: completed 90000 read, 49611 write accesses @9070183
-system.cpu5: completed 90000 read, 49612 write accesses @9081515
-system.cpu4: completed 90000 read, 49785 write accesses @9092029
-system.cpu2: completed 90000 read, 50012 write accesses @9093129
-system.cpu6: completed 90000 read, 50151 write accesses @9110021
-system.cpu7: completed 90000 read, 50786 write accesses @9110647
-system.cpu3: completed 90000 read, 49787 write accesses @9134229
-system.cpu0: completed 100000 read, 55281 write accesses @10063247
+system.cpu1: completed 10000 read, 5477 write accesses @993312
+system.cpu2: completed 10000 read, 5544 write accesses @996128
+system.cpu0: completed 10000 read, 5458 write accesses @996536
+system.cpu3: completed 10000 read, 5546 write accesses @998087
+system.cpu4: completed 10000 read, 5425 write accesses @1001440
+system.cpu7: completed 10000 read, 5725 write accesses @1002290
+system.cpu5: completed 10000 read, 5563 write accesses @1012962
+system.cpu6: completed 10000 read, 5626 write accesses @1026878
+system.cpu2: completed 20000 read, 11014 write accesses @1990757
+system.cpu7: completed 20000 read, 11213 write accesses @1998586
+system.cpu4: completed 20000 read, 10862 write accesses @2006179
+system.cpu1: completed 20000 read, 11109 write accesses @2009839
+system.cpu0: completed 20000 read, 11055 write accesses @2010590
+system.cpu3: completed 20000 read, 11147 write accesses @2011164
+system.cpu6: completed 20000 read, 11117 write accesses @2017946
+system.cpu5: completed 20000 read, 11249 write accesses @2044887
+system.cpu2: completed 30000 read, 16622 write accesses @2998924
+system.cpu7: completed 30000 read, 16766 write accesses @3010333
+system.cpu6: completed 30000 read, 16539 write accesses @3010945
+system.cpu0: completed 30000 read, 16681 write accesses @3021428
+system.cpu3: completed 30000 read, 16672 write accesses @3029534
+system.cpu1: completed 30000 read, 16667 write accesses @3029754
+system.cpu4: completed 30000 read, 16456 write accesses @3042339
+system.cpu5: completed 30000 read, 16900 write accesses @3057264
+system.cpu2: completed 40000 read, 22183 write accesses @4005170
+system.cpu0: completed 40000 read, 22112 write accesses @4017560
+system.cpu4: completed 40000 read, 21876 write accesses @4020474
+system.cpu7: completed 40000 read, 22317 write accesses @4024853
+system.cpu1: completed 40000 read, 22148 write accesses @4025120
+system.cpu3: completed 40000 read, 22291 write accesses @4025351
+system.cpu6: completed 40000 read, 22140 write accesses @4027478
+system.cpu5: completed 40000 read, 22522 write accesses @4053741
+system.cpu0: completed 50000 read, 27630 write accesses @5009643
+system.cpu3: completed 50000 read, 27709 write accesses @5018121
+system.cpu4: completed 50000 read, 27303 write accesses @5018876
+system.cpu2: completed 50000 read, 27685 write accesses @5024854
+system.cpu6: completed 50000 read, 27549 write accesses @5033153
+system.cpu7: completed 50000 read, 27925 write accesses @5035089
+system.cpu1: completed 50000 read, 27578 write accesses @5049644
+system.cpu5: completed 50000 read, 28161 write accesses @5067105
+system.cpu2: completed 60000 read, 33061 write accesses @6010104
+system.cpu3: completed 60000 read, 33252 write accesses @6011525
+system.cpu0: completed 60000 read, 33086 write accesses @6024049
+system.cpu7: completed 60000 read, 33494 write accesses @6044846
+system.cpu5: completed 60000 read, 33651 write accesses @6053289
+system.cpu4: completed 60000 read, 33094 write accesses @6056073
+system.cpu6: completed 60000 read, 33179 write accesses @6057027
+system.cpu1: completed 60000 read, 33046 write accesses @6072711
+system.cpu3: completed 70000 read, 38860 write accesses @7016441
+system.cpu2: completed 70000 read, 38631 write accesses @7032041
+system.cpu0: completed 70000 read, 38682 write accesses @7034544
+system.cpu5: completed 70000 read, 39256 write accesses @7040358
+system.cpu4: completed 70000 read, 38757 write accesses @7060040
+system.cpu6: completed 70000 read, 38734 write accesses @7064210
+system.cpu1: completed 70000 read, 38475 write accesses @7072466
+system.cpu7: completed 70000 read, 39003 write accesses @7074119
+system.cpu2: completed 80000 read, 44130 write accesses @8023565
+system.cpu3: completed 80000 read, 44287 write accesses @8037401
+system.cpu0: completed 80000 read, 44183 write accesses @8039617
+system.cpu7: completed 80000 read, 44442 write accesses @8065674
+system.cpu6: completed 80000 read, 44372 write accesses @8065734
+system.cpu4: completed 80000 read, 44321 write accesses @8067105
+system.cpu5: completed 80000 read, 45042 write accesses @8083622
+system.cpu1: completed 80000 read, 43978 write accesses @8094612
+system.cpu2: completed 90000 read, 49635 write accesses @9035560
+system.cpu0: completed 90000 read, 49823 write accesses @9061621
+system.cpu6: completed 90000 read, 50006 write accesses @9066745
+system.cpu3: completed 90000 read, 49847 write accesses @9070290
+system.cpu7: completed 90000 read, 49983 write accesses @9079579
+system.cpu4: completed 90000 read, 49962 write accesses @9089553
+system.cpu5: completed 90000 read, 50588 write accesses @9109500
+system.cpu1: completed 90000 read, 49692 write accesses @9124269
+system.cpu2: completed 100000 read, 55115 write accesses @10021833
+Redirecting stdout to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level/simout
+Redirecting stderr to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:16:05
-gem5 started Aug 13 2015 20:15:43
-gem5 executing on artery
-command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level
+gem5 compiled Nov 15 2015 14:41:13
+gem5 started Nov 15 2015 14:41:38
+gem5 executing on ribera.cs.wisc.edu, pid 32150
+command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 9995319 because maximum number of loads reached
+Exiting @ tick 10021833 because maximum number of loads reached
sim_ticks 10021833 # Number of ticks simulated
final_tick 10021833 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 186642 # Simulator tick rate (ticks/s)
-host_mem_usage 462200 # Number of bytes of host memory used
-host_seconds 53.70 # Real time elapsed on the host
+host_tick_rate 133555 # Simulator tick rate (ticks/s)
+host_mem_usage 453936 # Number of bytes of host memory used
+host_seconds 75.04 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 39622272 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=8
+number_of_virtual_networks=3
phys_mem=Null
randomization=false
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[20]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[19]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[19]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[20]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl1]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl1.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l1_cntrl1.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl1.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l1_cntrl1.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l1_cntrl1.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl2]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl2.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l1_cntrl2.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l1_cntrl2.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.l1_cntrl2.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.l1_cntrl2.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl3]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl3.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.l1_cntrl3.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl3.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[7]
[system.ruby.l1_cntrl3.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[7]
[system.ruby.l1_cntrl3.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl4]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl4.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[8]
[system.ruby.l1_cntrl4.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[8]
[system.ruby.l1_cntrl4.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[9]
[system.ruby.l1_cntrl4.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[9]
[system.ruby.l1_cntrl4.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl5]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl5.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[10]
[system.ruby.l1_cntrl5.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[10]
[system.ruby.l1_cntrl5.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[11]
[system.ruby.l1_cntrl5.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[11]
[system.ruby.l1_cntrl5.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl6]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl6.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[12]
[system.ruby.l1_cntrl6.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[12]
[system.ruby.l1_cntrl6.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[13]
[system.ruby.l1_cntrl6.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[13]
[system.ruby.l1_cntrl6.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl7]
type=L1Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl7.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[14]
[system.ruby.l1_cntrl7.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[14]
[system.ruby.l1_cntrl7.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[15]
[system.ruby.l1_cntrl7.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[15]
[system.ruby.l1_cntrl7.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l2_cntrl0]
type=L2Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[16]
[system.ruby.l2_cntrl0.GlobalRequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[16]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[17]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[17]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[18]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[18]
[system.ruby.l2_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.memctrl_clk_domain]
type=DerivedClockDomain
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3 system.ruby.network.int_links4 system.ruby.network.int_links5 system.ruby.network.int_links6 system.ruby.network.int_links7 system.ruby.network.int_links8 system.ruby.network.int_links9
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers00 system.ruby.network.routers01 system.ruby.network.routers02 system.ruby.network.routers03 system.ruby.network.routers04 system.ruby.network.routers05 system.ruby.network.routers06 system.ruby.network.routers07 system.ruby.network.routers08 system.ruby.network.routers09 system.ruby.network.routers10
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers24]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers25]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers26]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers27]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers28]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers29]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers30]
type=MessageBuffer
eventq_index=0
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-recycle_latency=0
[system.ruby.network.int_link_buffers31]
type=MessageBuffer
eventq_index=0
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randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers32]
type=MessageBuffer
eventq_index=0
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-recycle_latency=0
[system.ruby.network.int_link_buffers33]
type=MessageBuffer
eventq_index=0
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[system.ruby.network.int_link_buffers34]
type=MessageBuffer
eventq_index=0
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randomization=false
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[system.ruby.network.int_link_buffers35]
type=MessageBuffer
eventq_index=0
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randomization=false
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eventq_index=0
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[system.ruby.network.int_link_buffers42]
type=MessageBuffer
eventq_index=0
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[system.ruby.network.int_link_buffers43]
type=MessageBuffer
eventq_index=0
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randomization=false
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eventq_index=0
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[system.ruby.network.int_link_buffers45]
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eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers24]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers25]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers26]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers27]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers28]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers29]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers30]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers31]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers32]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers33]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers34]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers35]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers36]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers37]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers38]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers39]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers40]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers41]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers42]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers43]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers44]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers45]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers46]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers47]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers48]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers49]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers50]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers51]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers52]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers53]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers54]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers55]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers56]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers57]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers58]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers10.port_buffers59]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-system.cpu7: completed 10000 read, 5629 write accesses @741490
-system.cpu2: completed 10000 read, 5483 write accesses @742929
-system.cpu5: completed 10000 read, 5467 write accesses @745712
-system.cpu6: completed 10000 read, 5704 write accesses @746130
-system.cpu1: completed 10000 read, 5548 write accesses @750324
-system.cpu3: completed 10000 read, 5605 write accesses @759134
-system.cpu4: completed 10000 read, 5617 write accesses @761737
-system.cpu0: completed 10000 read, 5610 write accesses @763525
-system.cpu6: completed 20000 read, 11106 write accesses @1481450
-system.cpu1: completed 20000 read, 11101 write accesses @1481864
-system.cpu2: completed 20000 read, 11175 write accesses @1493928
-system.cpu5: completed 20000 read, 11075 write accesses @1494219
-system.cpu7: completed 20000 read, 11191 write accesses @1494602
-system.cpu3: completed 20000 read, 11025 write accesses @1510005
-system.cpu4: completed 20000 read, 11155 write accesses @1515394
-system.cpu0: completed 20000 read, 11262 write accesses @1521161
-system.cpu1: completed 30000 read, 16596 write accesses @2213794
-system.cpu7: completed 30000 read, 16886 write accesses @2238208
-system.cpu2: completed 30000 read, 16749 write accesses @2249468
-system.cpu6: completed 30000 read, 16669 write accesses @2250299
-system.cpu5: completed 30000 read, 16592 write accesses @2250650
-system.cpu4: completed 30000 read, 16824 write accesses @2255563
-system.cpu3: completed 30000 read, 16603 write accesses @2258409
-system.cpu0: completed 30000 read, 16741 write accesses @2271167
-system.cpu1: completed 40000 read, 22131 write accesses @2952037
-system.cpu7: completed 40000 read, 22258 write accesses @2971365
-system.cpu4: completed 40000 read, 22385 write accesses @2992340
-system.cpu6: completed 40000 read, 22195 write accesses @2994415
-system.cpu2: completed 40000 read, 22365 write accesses @2995127
-system.cpu5: completed 40000 read, 22189 write accesses @2998059
-system.cpu0: completed 40000 read, 22190 write accesses @3008067
-system.cpu3: completed 40000 read, 22193 write accesses @3026200
-system.cpu1: completed 50000 read, 27565 write accesses @3685675
-system.cpu7: completed 50000 read, 27746 write accesses @3722444
-system.cpu4: completed 50000 read, 27966 write accesses @3737210
-system.cpu6: completed 50000 read, 27651 write accesses @3741340
-system.cpu2: completed 50000 read, 28025 write accesses @3751350
-system.cpu5: completed 50000 read, 27824 write accesses @3753408
-system.cpu0: completed 50000 read, 27788 write accesses @3764354
-system.cpu3: completed 50000 read, 27801 write accesses @3780460
-system.cpu1: completed 60000 read, 33120 write accesses @4430711
-system.cpu7: completed 60000 read, 33190 write accesses @4467208
-system.cpu4: completed 60000 read, 33493 write accesses @4471542
-system.cpu6: completed 60000 read, 33060 write accesses @4489453
-system.cpu0: completed 60000 read, 33163 write accesses @4498105
-system.cpu2: completed 60000 read, 33785 write accesses @4501427
-system.cpu5: completed 60000 read, 33616 write accesses @4507211
-system.cpu3: completed 60000 read, 33449 write accesses @4535522
-system.cpu1: completed 70000 read, 38615 write accesses @5182293
-system.cpu4: completed 70000 read, 39172 write accesses @5218522
-system.cpu7: completed 70000 read, 38708 write accesses @5235601
-system.cpu0: completed 70000 read, 38698 write accesses @5238798
-system.cpu6: completed 70000 read, 38663 write accesses @5239196
-system.cpu2: completed 70000 read, 39373 write accesses @5249164
-system.cpu5: completed 70000 read, 39147 write accesses @5262073
-system.cpu3: completed 70000 read, 38967 write accesses @5264376
-system.cpu1: completed 80000 read, 44079 write accesses @5932822
-system.cpu4: completed 80000 read, 44608 write accesses @5965802
-system.cpu0: completed 80000 read, 44082 write accesses @5973833
-system.cpu6: completed 80000 read, 44113 write accesses @5993004
-system.cpu7: completed 80000 read, 44313 write accesses @5994643
-system.cpu2: completed 80000 read, 44913 write accesses @5996066
-system.cpu5: completed 80000 read, 44640 write accesses @6007836
-system.cpu3: completed 80000 read, 44574 write accesses @6019565
-system.cpu1: completed 90000 read, 49658 write accesses @6686890
-system.cpu4: completed 90000 read, 50184 write accesses @6709227
-system.cpu0: completed 90000 read, 49596 write accesses @6710987
-system.cpu7: completed 90000 read, 49959 write accesses @6740828
-system.cpu2: completed 90000 read, 50425 write accesses @6744606
-system.cpu6: completed 90000 read, 49767 write accesses @6747581
-system.cpu3: completed 90000 read, 49994 write accesses @6761894
-system.cpu5: completed 90000 read, 50371 write accesses @6774603
-system.cpu4: completed 100000 read, 55545 write accesses @7450335
+system.cpu0: completed 10000 read, 5508 write accesses @738866
+system.cpu3: completed 10000 read, 5629 write accesses @739336
+system.cpu1: completed 10000 read, 5566 write accesses @740014
+system.cpu2: completed 10000 read, 5452 write accesses @740145
+system.cpu7: completed 10000 read, 5492 write accesses @749235
+system.cpu6: completed 10000 read, 5560 write accesses @753933
+system.cpu4: completed 10000 read, 5642 write accesses @754605
+system.cpu5: completed 10000 read, 5631 write accesses @755018
+system.cpu0: completed 20000 read, 11092 write accesses @1475405
+system.cpu3: completed 20000 read, 11222 write accesses @1487700
+system.cpu7: completed 20000 read, 11015 write accesses @1488166
+system.cpu5: completed 20000 read, 11145 write accesses @1493697
+system.cpu1: completed 20000 read, 11221 write accesses @1496331
+system.cpu2: completed 20000 read, 11098 write accesses @1497419
+system.cpu4: completed 20000 read, 11227 write accesses @1505460
+system.cpu6: completed 20000 read, 11297 write accesses @1522234
+system.cpu2: completed 30000 read, 16610 write accesses @2227880
+system.cpu5: completed 30000 read, 16694 write accesses @2227884
+system.cpu7: completed 30000 read, 16430 write accesses @2229017
+system.cpu0: completed 30000 read, 16662 write accesses @2230891
+system.cpu3: completed 30000 read, 16917 write accesses @2234709
+system.cpu1: completed 30000 read, 16703 write accesses @2243507
+system.cpu4: completed 30000 read, 16821 write accesses @2245691
+system.cpu6: completed 30000 read, 16865 write accesses @2274986
+system.cpu2: completed 40000 read, 22186 write accesses @2969541
+system.cpu7: completed 40000 read, 21963 write accesses @2976706
+system.cpu5: completed 40000 read, 22081 write accesses @2977360
+system.cpu0: completed 40000 read, 22245 write accesses @2983600
+system.cpu4: completed 40000 read, 22353 write accesses @2983927
+system.cpu3: completed 40000 read, 22562 write accesses @2989463
+system.cpu1: completed 40000 read, 22203 write accesses @2993172
+system.cpu6: completed 40000 read, 22494 write accesses @3024614
+system.cpu5: completed 50000 read, 27602 write accesses @3707212
+system.cpu2: completed 50000 read, 27827 write accesses @3709656
+system.cpu0: completed 50000 read, 27788 write accesses @3720088
+system.cpu7: completed 50000 read, 27585 write accesses @3729952
+system.cpu3: completed 50000 read, 28225 write accesses @3741336
+system.cpu1: completed 50000 read, 27693 write accesses @3741643
+system.cpu4: completed 50000 read, 28024 write accesses @3746153
+system.cpu6: completed 50000 read, 27944 write accesses @3769575
+system.cpu2: completed 60000 read, 33396 write accesses @4457825
+system.cpu7: completed 60000 read, 33181 write accesses @4461083
+system.cpu0: completed 60000 read, 33524 write accesses @4471000
+system.cpu5: completed 60000 read, 33268 write accesses @4471818
+system.cpu3: completed 60000 read, 33936 write accesses @4490069
+system.cpu1: completed 60000 read, 33523 write accesses @4502736
+system.cpu4: completed 60000 read, 33611 write accesses @4508744
+system.cpu6: completed 60000 read, 33455 write accesses @4516682
+system.cpu2: completed 70000 read, 39052 write accesses @5195824
+system.cpu7: completed 70000 read, 38804 write accesses @5216520
+system.cpu0: completed 70000 read, 39132 write accesses @5221104
+system.cpu5: completed 70000 read, 38946 write accesses @5224763
+system.cpu3: completed 70000 read, 39374 write accesses @5234775
+system.cpu1: completed 70000 read, 39108 write accesses @5247582
+system.cpu4: completed 70000 read, 39073 write accesses @5249170
+system.cpu6: completed 70000 read, 38942 write accesses @5256670
+system.cpu2: completed 80000 read, 44560 write accesses @5927724
+system.cpu5: completed 80000 read, 44421 write accesses @5949764
+system.cpu3: completed 80000 read, 44834 write accesses @5973715
+system.cpu0: completed 80000 read, 44677 write accesses @5979429
+system.cpu7: completed 80000 read, 44408 write accesses @5979747
+system.cpu1: completed 80000 read, 44732 write accesses @5992417
+system.cpu4: completed 80000 read, 44550 write accesses @5998783
+system.cpu6: completed 80000 read, 44539 write accesses @6005684
+system.cpu2: completed 90000 read, 50191 write accesses @6684061
+system.cpu5: completed 90000 read, 50073 write accesses @6691954
+system.cpu3: completed 90000 read, 50398 write accesses @6725412
+system.cpu1: completed 90000 read, 50260 write accesses @6729032
+system.cpu7: completed 90000 read, 49856 write accesses @6729292
+system.cpu0: completed 90000 read, 50333 write accesses @6730369
+system.cpu4: completed 90000 read, 50097 write accesses @6738499
+system.cpu6: completed 90000 read, 50144 write accesses @6754135
+system.cpu5: completed 100000 read, 55687 write accesses @7436579
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:22:33
-gem5 started Aug 13 2015 20:16:16
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
+gem5 compiled Nov 15 2015 14:46:21
+gem5 started Nov 15 2015 14:46:44
+gem5 executing on ribera.cs.wisc.edu, pid 1171
+command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 7477743 because maximum number of loads reached
+Exiting @ tick 7436579 because maximum number of loads reached
sim_ticks 7436579 # Number of ticks simulated
final_tick 7436579 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 78938 # Simulator tick rate (ticks/s)
-host_mem_usage 462744 # Number of bytes of host memory used
-host_seconds 94.21 # Real time elapsed on the host
+host_tick_rate 57999 # Simulator tick rate (ticks/s)
+host_mem_usage 456048 # Number of bytes of host memory used
+host_seconds 128.22 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 39411840 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=8
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-system.cpu2: completed 10000 read, 5534 write accesses @569178
-system.cpu4: completed 10000 read, 5465 write accesses @574915
-system.cpu3: completed 10000 read, 5497 write accesses @574937
-system.cpu0: completed 10000 read, 5565 write accesses @574960
-system.cpu5: completed 10000 read, 5652 write accesses @581034
-system.cpu1: completed 10000 read, 5555 write accesses @582035
-system.cpu6: completed 10000 read, 5449 write accesses @585160
-system.cpu7: completed 10000 read, 5566 write accesses @590115
-system.cpu2: completed 20000 read, 11022 write accesses @1126531
-system.cpu4: completed 20000 read, 10939 write accesses @1142499
-system.cpu0: completed 20000 read, 11310 write accesses @1159134
-system.cpu1: completed 20000 read, 11166 write accesses @1161343
-system.cpu6: completed 20000 read, 10890 write accesses @1161677
-system.cpu5: completed 20000 read, 11181 write accesses @1166462
-system.cpu3: completed 20000 read, 11040 write accesses @1167366
-system.cpu7: completed 20000 read, 11027 write accesses @1170049
-system.cpu2: completed 30000 read, 16703 write accesses @1710014
-system.cpu4: completed 30000 read, 16637 write accesses @1736174
-system.cpu6: completed 30000 read, 16254 write accesses @1736781
-system.cpu0: completed 30000 read, 16824 write accesses @1741663
-system.cpu1: completed 30000 read, 16729 write accesses @1746318
-system.cpu3: completed 30000 read, 16380 write accesses @1746864
-system.cpu5: completed 30000 read, 16699 write accesses @1749543
-system.cpu7: completed 30000 read, 16593 write accesses @1755317
-system.cpu2: completed 40000 read, 22220 write accesses @2299827
-system.cpu4: completed 40000 read, 22137 write accesses @2310891
-system.cpu0: completed 40000 read, 22226 write accesses @2313874
-system.cpu3: completed 40000 read, 21851 write accesses @2325087
-system.cpu1: completed 40000 read, 22363 write accesses @2328426
-system.cpu6: completed 40000 read, 21890 write accesses @2332432
-system.cpu5: completed 40000 read, 22240 write accesses @2338721
-system.cpu7: completed 40000 read, 22061 write accesses @2344897
-system.cpu2: completed 50000 read, 27819 write accesses @2881934
-system.cpu4: completed 50000 read, 27895 write accesses @2900734
-system.cpu0: completed 50000 read, 27815 write accesses @2900790
-system.cpu3: completed 50000 read, 27422 write accesses @2903532
-system.cpu6: completed 50000 read, 27382 write accesses @2918034
-system.cpu1: completed 50000 read, 27840 write accesses @2920513
-system.cpu5: completed 50000 read, 27748 write accesses @2927060
-system.cpu7: completed 50000 read, 27652 write accesses @2929759
-system.cpu2: completed 60000 read, 33490 write accesses @3464091
-system.cpu0: completed 60000 read, 33375 write accesses @3480817
-system.cpu4: completed 60000 read, 33517 write accesses @3486603
-system.cpu3: completed 60000 read, 33057 write accesses @3493116
-system.cpu6: completed 60000 read, 33095 write accesses @3508756
-system.cpu1: completed 60000 read, 33334 write accesses @3509528
-system.cpu5: completed 60000 read, 33334 write accesses @3510074
-system.cpu7: completed 60000 read, 33249 write accesses @3510130
-system.cpu2: completed 70000 read, 38895 write accesses @4051519
-system.cpu0: completed 70000 read, 39000 write accesses @4061632
-system.cpu4: completed 70000 read, 39030 write accesses @4069905
-system.cpu3: completed 70000 read, 38509 write accesses @4083701
-system.cpu1: completed 70000 read, 38918 write accesses @4095424
-system.cpu7: completed 70000 read, 38836 write accesses @4097039
-system.cpu5: completed 70000 read, 38933 write accesses @4099052
-system.cpu6: completed 70000 read, 38530 write accesses @4100439
-system.cpu2: completed 80000 read, 44484 write accesses @4637728
-system.cpu0: completed 80000 read, 44611 write accesses @4638049
-system.cpu4: completed 80000 read, 44541 write accesses @4643818
-system.cpu3: completed 80000 read, 44193 write accesses @4673647
-system.cpu5: completed 80000 read, 44336 write accesses @4673863
-system.cpu7: completed 80000 read, 44217 write accesses @4679114
-system.cpu1: completed 80000 read, 44372 write accesses @4685942
-system.cpu6: completed 80000 read, 44195 write accesses @4694933
-system.cpu2: completed 90000 read, 50176 write accesses @5226302
-system.cpu4: completed 90000 read, 50158 write accesses @5229556
-system.cpu0: completed 90000 read, 50290 write accesses @5238793
-system.cpu5: completed 90000 read, 49829 write accesses @5251555
-system.cpu3: completed 90000 read, 49657 write accesses @5262428
-system.cpu1: completed 90000 read, 49892 write accesses @5268645
-system.cpu7: completed 90000 read, 49892 write accesses @5270670
-system.cpu6: completed 90000 read, 49840 write accesses @5284950
-system.cpu4: completed 100000 read, 55681 write accesses @5804619
+system.cpu6: completed 10000 read, 5414 write accesses @600125
+system.cpu3: completed 10000 read, 5553 write accesses @601190
+system.cpu5: completed 10000 read, 5522 write accesses @610184
+system.cpu2: completed 10000 read, 5553 write accesses @610543
+system.cpu1: completed 10000 read, 5553 write accesses @610637
+system.cpu7: completed 10000 read, 5548 write accesses @613961
+system.cpu4: completed 10000 read, 5672 write accesses @625096
+system.cpu0: completed 10000 read, 5578 write accesses @625819
+system.cpu3: completed 20000 read, 11222 write accesses @1210787
+system.cpu2: completed 20000 read, 11113 write accesses @1216356
+system.cpu6: completed 20000 read, 11010 write accesses @1217399
+system.cpu7: completed 20000 read, 10915 write accesses @1224868
+system.cpu1: completed 20000 read, 11109 write accesses @1227113
+system.cpu5: completed 20000 read, 11172 write accesses @1228690
+system.cpu0: completed 20000 read, 11076 write accesses @1241151
+system.cpu4: completed 20000 read, 11317 write accesses @1252011
+system.cpu3: completed 30000 read, 16793 write accesses @1808510
+system.cpu2: completed 30000 read, 16719 write accesses @1811663
+system.cpu6: completed 30000 read, 16607 write accesses @1829544
+system.cpu1: completed 30000 read, 16700 write accesses @1832567
+system.cpu7: completed 30000 read, 16359 write accesses @1837933
+system.cpu5: completed 30000 read, 16722 write accesses @1842350
+system.cpu0: completed 30000 read, 16567 write accesses @1855038
+system.cpu4: completed 30000 read, 16806 write accesses @1868367
+system.cpu2: completed 40000 read, 22363 write accesses @2439233
+system.cpu3: completed 40000 read, 22637 write accesses @2443609
+system.cpu6: completed 40000 read, 22031 write accesses @2444868
+system.cpu1: completed 40000 read, 22136 write accesses @2454083
+system.cpu7: completed 40000 read, 22019 write accesses @2462426
+system.cpu0: completed 40000 read, 22102 write accesses @2464718
+system.cpu5: completed 40000 read, 22391 write accesses @2467086
+system.cpu4: completed 40000 read, 22274 write accesses @2476956
+system.cpu2: completed 50000 read, 27787 write accesses @3042124
+system.cpu6: completed 50000 read, 27603 write accesses @3052498
+system.cpu3: completed 50000 read, 28345 write accesses @3055004
+system.cpu1: completed 50000 read, 27635 write accesses @3062785
+system.cpu7: completed 50000 read, 27487 write accesses @3068425
+system.cpu0: completed 50000 read, 27611 write accesses @3068440
+system.cpu5: completed 50000 read, 27987 write accesses @3072420
+system.cpu4: completed 50000 read, 27913 write accesses @3101440
+system.cpu2: completed 60000 read, 33280 write accesses @3652049
+system.cpu3: completed 60000 read, 33864 write accesses @3668867
+system.cpu0: completed 60000 read, 33089 write accesses @3675395
+system.cpu7: completed 60000 read, 33087 write accesses @3676487
+system.cpu1: completed 60000 read, 33182 write accesses @3678705
+system.cpu6: completed 60000 read, 33377 write accesses @3680817
+system.cpu5: completed 60000 read, 33479 write accesses @3694370
+system.cpu4: completed 60000 read, 33302 write accesses @3701614
+system.cpu2: completed 70000 read, 38766 write accesses @4250473
+system.cpu0: completed 70000 read, 38578 write accesses @4284716
+system.cpu3: completed 70000 read, 39510 write accesses @4292337
+system.cpu1: completed 70000 read, 38741 write accesses @4292636
+system.cpu6: completed 70000 read, 39114 write accesses @4297860
+system.cpu7: completed 70000 read, 38662 write accesses @4300070
+system.cpu5: completed 70000 read, 38961 write accesses @4315101
+system.cpu4: completed 70000 read, 38876 write accesses @4320121
+system.cpu2: completed 80000 read, 44272 write accesses @4868351
+system.cpu3: completed 80000 read, 45140 write accesses @4896693
+system.cpu6: completed 80000 read, 44453 write accesses @4900088
+system.cpu0: completed 80000 read, 44159 write accesses @4900273
+system.cpu1: completed 80000 read, 44332 write accesses @4908589
+system.cpu7: completed 80000 read, 44332 write accesses @4918776
+system.cpu5: completed 80000 read, 44375 write accesses @4922197
+system.cpu4: completed 80000 read, 44529 write accesses @4935812
+system.cpu2: completed 90000 read, 49875 write accesses @5488123
+system.cpu3: completed 90000 read, 50614 write accesses @5502669
+system.cpu0: completed 90000 read, 49682 write accesses @5505213
+system.cpu6: completed 90000 read, 50248 write accesses @5520798
+system.cpu1: completed 90000 read, 49915 write accesses @5525318
+system.cpu7: completed 90000 read, 49900 write accesses @5530195
+system.cpu5: completed 90000 read, 50114 write accesses @5537728
+system.cpu4: completed 90000 read, 50125 write accesses @5550036
+system.cpu2: completed 100000 read, 55518 write accesses @6099346
+Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:28:58
-gem5 started Aug 13 2015 20:16:58
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token
+gem5 compiled Nov 15 2015 14:51:28
+gem5 started Nov 15 2015 14:51:57
+gem5 executing on ribera.cs.wisc.edu, pid 2898
+command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 5815635 because maximum number of loads reached
+Exiting @ tick 6099346 because maximum number of loads reached
sim_ticks 6099346 # Number of ticks simulated
final_tick 6099346 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 86189 # Simulator tick rate (ticks/s)
-host_mem_usage 466764 # Number of bytes of host memory used
-host_seconds 70.77 # Real time elapsed on the host
+host_tick_rate 63389 # Simulator tick rate (ticks/s)
+host_mem_usage 457160 # Number of bytes of host memory used
+host_seconds 96.22 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 39765376 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=8
+number_of_virtual_networks=6
phys_mem=Null
randomization=false
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-system.cpu0: completed 10000 read, 5501 write accesses @467078
-system.cpu7: completed 10000 read, 5585 write accesses @472925
-system.cpu6: completed 10000 read, 5702 write accesses @473859
-system.cpu2: completed 10000 read, 5570 write accesses @475598
-system.cpu5: completed 10000 read, 5606 write accesses @476119
-system.cpu1: completed 10000 read, 5578 write accesses @479229
-system.cpu4: completed 10000 read, 5573 write accesses @479674
-system.cpu3: completed 10000 read, 5640 write accesses @487499
-system.cpu0: completed 20000 read, 10981 write accesses @938964
-system.cpu7: completed 20000 read, 11056 write accesses @947871
-system.cpu6: completed 20000 read, 11411 write accesses @949459
-system.cpu2: completed 20000 read, 11228 write accesses @952214
-system.cpu1: completed 20000 read, 11065 write accesses @953211
-system.cpu3: completed 20000 read, 11304 write accesses @953777
-system.cpu4: completed 20000 read, 11256 write accesses @958238
-system.cpu5: completed 20000 read, 11225 write accesses @963838
-system.cpu0: completed 30000 read, 16484 write accesses @1401349
-system.cpu7: completed 30000 read, 16587 write accesses @1415642
-system.cpu6: completed 30000 read, 17110 write accesses @1421193
-system.cpu2: completed 30000 read, 16781 write accesses @1426752
-system.cpu4: completed 30000 read, 16747 write accesses @1427872
-system.cpu3: completed 30000 read, 16939 write accesses @1428046
-system.cpu5: completed 30000 read, 16611 write accesses @1429067
-system.cpu1: completed 30000 read, 16662 write accesses @1439258
-system.cpu0: completed 40000 read, 22150 write accesses @1869298
-system.cpu7: completed 40000 read, 22057 write accesses @1896002
-system.cpu5: completed 40000 read, 22232 write accesses @1898974
-system.cpu3: completed 40000 read, 22443 write accesses @1899719
-system.cpu4: completed 40000 read, 22301 write accesses @1902954
-system.cpu2: completed 40000 read, 22327 write accesses @1903835
-system.cpu6: completed 40000 read, 22829 write accesses @1906722
-system.cpu1: completed 40000 read, 22218 write accesses @1911204
-system.cpu0: completed 50000 read, 27765 write accesses @2351180
-system.cpu7: completed 50000 read, 27538 write accesses @2370464
-system.cpu5: completed 50000 read, 27786 write accesses @2373992
-system.cpu6: completed 50000 read, 28263 write accesses @2376222
-system.cpu4: completed 50000 read, 27975 write accesses @2380027
-system.cpu2: completed 50000 read, 28023 write accesses @2381328
-system.cpu3: completed 50000 read, 27880 write accesses @2381446
-system.cpu1: completed 50000 read, 27838 write accesses @2385886
-system.cpu0: completed 60000 read, 33279 write accesses @2819366
-system.cpu5: completed 60000 read, 33244 write accesses @2835967
-system.cpu7: completed 60000 read, 32998 write accesses @2836623
-system.cpu6: completed 60000 read, 33822 write accesses @2850173
-system.cpu4: completed 60000 read, 33518 write accesses @2855957
-system.cpu3: completed 60000 read, 33583 write accesses @2858859
-system.cpu2: completed 60000 read, 33714 write accesses @2861156
-system.cpu1: completed 60000 read, 33518 write accesses @2869518
-system.cpu0: completed 70000 read, 38798 write accesses @3293451
-system.cpu7: completed 70000 read, 38547 write accesses @3309641
-system.cpu5: completed 70000 read, 38890 write accesses @3314464
-system.cpu6: completed 70000 read, 39365 write accesses @3323971
-system.cpu3: completed 70000 read, 39171 write accesses @3326960
-system.cpu2: completed 70000 read, 39322 write accesses @3333015
-system.cpu4: completed 70000 read, 39148 write accesses @3335631
-system.cpu1: completed 70000 read, 39115 write accesses @3343424
-system.cpu0: completed 80000 read, 44502 write accesses @3773676
-system.cpu7: completed 80000 read, 44178 write accesses @3784689
-system.cpu5: completed 80000 read, 44522 write accesses @3798601
-system.cpu6: completed 80000 read, 45044 write accesses @3801812
-system.cpu2: completed 80000 read, 44852 write accesses @3805475
-system.cpu3: completed 80000 read, 44704 write accesses @3805485
-system.cpu4: completed 80000 read, 44724 write accesses @3811165
-system.cpu1: completed 80000 read, 44691 write accesses @3816230
-system.cpu0: completed 90000 read, 50144 write accesses @4257479
-system.cpu7: completed 90000 read, 49707 write accesses @4267140
-system.cpu3: completed 90000 read, 50073 write accesses @4274290
-system.cpu2: completed 90000 read, 50440 write accesses @4275160
-system.cpu6: completed 90000 read, 50729 write accesses @4275803
-system.cpu5: completed 90000 read, 50235 write accesses @4277870
-system.cpu4: completed 90000 read, 50337 write accesses @4285144
-system.cpu1: completed 90000 read, 50416 write accesses @4290707
-system.cpu0: completed 100000 read, 55755 write accesses @4723747
+system.cpu6: completed 10000 read, 5442 write accesses @464151
+system.cpu5: completed 10000 read, 5565 write accesses @467904
+system.cpu1: completed 10000 read, 5530 write accesses @472727
+system.cpu4: completed 10000 read, 5671 write accesses @474893
+system.cpu2: completed 10000 read, 5702 write accesses @475545
+system.cpu3: completed 10000 read, 5626 write accesses @475848
+system.cpu7: completed 10000 read, 5688 write accesses @476316
+system.cpu0: completed 10000 read, 5652 write accesses @477657
+system.cpu6: completed 20000 read, 11069 write accesses @933991
+system.cpu4: completed 20000 read, 11035 write accesses @941133
+system.cpu1: completed 20000 read, 11144 write accesses @942887
+system.cpu5: completed 20000 read, 11075 write accesses @943473
+system.cpu7: completed 20000 read, 11122 write accesses @946462
+system.cpu2: completed 20000 read, 11251 write accesses @952011
+system.cpu3: completed 20000 read, 11149 write accesses @953947
+system.cpu0: completed 20000 read, 11405 write accesses @958457
+system.cpu4: completed 30000 read, 16671 write accesses @1411581
+system.cpu5: completed 30000 read, 16602 write accesses @1411822
+system.cpu7: completed 30000 read, 16713 write accesses @1419018
+system.cpu6: completed 30000 read, 16615 write accesses @1420265
+system.cpu3: completed 30000 read, 16709 write accesses @1421765
+system.cpu1: completed 30000 read, 16889 write accesses @1427949
+system.cpu2: completed 30000 read, 16908 write accesses @1434738
+system.cpu0: completed 30000 read, 17031 write accesses @1444971
+system.cpu5: completed 40000 read, 22172 write accesses @1880249
+system.cpu3: completed 40000 read, 22160 write accesses @1893274
+system.cpu6: completed 40000 read, 22289 write accesses @1896273
+system.cpu1: completed 40000 read, 22624 write accesses @1896553
+system.cpu4: completed 40000 read, 22359 write accesses @1896744
+system.cpu7: completed 40000 read, 22432 write accesses @1900299
+system.cpu2: completed 40000 read, 22368 write accesses @1910277
+system.cpu0: completed 40000 read, 22621 write accesses @1917733
+system.cpu5: completed 50000 read, 27506 write accesses @2349190
+system.cpu6: completed 50000 read, 27893 write accesses @2366731
+system.cpu7: completed 50000 read, 27846 write accesses @2369147
+system.cpu3: completed 50000 read, 27646 write accesses @2369997
+system.cpu1: completed 50000 read, 27990 write accesses @2371485
+system.cpu2: completed 50000 read, 27913 write accesses @2374199
+system.cpu4: completed 50000 read, 27983 write accesses @2375243
+system.cpu0: completed 50000 read, 28279 write accesses @2400165
+system.cpu5: completed 60000 read, 33080 write accesses @2828614
+system.cpu3: completed 60000 read, 33257 write accesses @2839097
+system.cpu1: completed 60000 read, 33556 write accesses @2841959
+system.cpu6: completed 60000 read, 33572 write accesses @2843628
+system.cpu7: completed 60000 read, 33379 write accesses @2844087
+system.cpu2: completed 60000 read, 33471 write accesses @2846336
+system.cpu4: completed 60000 read, 33614 write accesses @2862059
+system.cpu0: completed 60000 read, 33892 write accesses @2874908
+system.cpu5: completed 70000 read, 38668 write accesses @3302644
+system.cpu3: completed 70000 read, 38773 write accesses @3312258
+system.cpu7: completed 70000 read, 38856 write accesses @3313701
+system.cpu1: completed 70000 read, 39110 write accesses @3314841
+system.cpu6: completed 70000 read, 39295 write accesses @3319370
+system.cpu2: completed 70000 read, 39264 write accesses @3327548
+system.cpu4: completed 70000 read, 39102 write accesses @3335340
+system.cpu0: completed 70000 read, 39326 write accesses @3351991
+system.cpu5: completed 80000 read, 44247 write accesses @3772436
+system.cpu3: completed 80000 read, 44360 write accesses @3783174
+system.cpu1: completed 80000 read, 44568 write accesses @3784069
+system.cpu6: completed 80000 read, 44689 write accesses @3792375
+system.cpu2: completed 80000 read, 44751 write accesses @3797997
+system.cpu7: completed 80000 read, 44339 write accesses @3798680
+system.cpu4: completed 80000 read, 44675 write accesses @3804996
+system.cpu0: completed 80000 read, 44775 write accesses @3826542
+system.cpu5: completed 90000 read, 49884 write accesses @4250135
+system.cpu3: completed 90000 read, 49904 write accesses @4252427
+system.cpu6: completed 90000 read, 50171 write accesses @4263343
+system.cpu1: completed 90000 read, 50197 write accesses @4265783
+system.cpu4: completed 90000 read, 50286 write accesses @4279784
+system.cpu7: completed 90000 read, 50179 write accesses @4284358
+system.cpu2: completed 90000 read, 50246 write accesses @4285069
+system.cpu0: completed 90000 read, 50200 write accesses @4290832
+system.cpu3: completed 100000 read, 55486 write accesses @4722948
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:09:46
-gem5 started Aug 13 2015 20:15:24
-gem5 executing on artery
-command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
+gem5 compiled Nov 15 2015 14:35:53
+gem5 started Nov 15 2015 14:36:14
+gem5 executing on ribera.cs.wisc.edu, pid 30618
+command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 4735173 because maximum number of loads reached
+Exiting @ tick 4722948 because maximum number of loads reached
sim_ticks 4722948 # Number of ticks simulated
final_tick 4722948 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 62228 # Simulator tick rate (ticks/s)
-host_mem_usage 467464 # Number of bytes of host memory used
-host_seconds 75.90 # Real time elapsed on the host
+host_tick_rate 44680 # Simulator tick rate (ticks/s)
+host_mem_usage 457072 # Number of bytes of host memory used
+host_seconds 105.71 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 38973248 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=8
+number_of_virtual_networks=5
phys_mem=Null
randomization=false
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[17]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[17]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[18]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[16]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[16]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl1.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl1.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l1_cntrl1.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l1_cntrl1.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
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slave=system.ruby.network.master[4]
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[system.ruby.l1_cntrl2.requestFromCache]
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master=system.ruby.network.slave[4]
[system.ruby.l1_cntrl2.responseFromCache]
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[system.ruby.l1_cntrl2.sequencer]
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[system.ruby.l1_cntrl3.mandatoryQueue]
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[system.ruby.l1_cntrl3.requestFromCache]
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master=system.ruby.network.slave[7]
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[system.ruby.l1_cntrl3.sequencer]
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[system.ruby.l1_cntrl4.mandatoryQueue]
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[system.ruby.l1_cntrl4.requestFromCache]
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slave=system.ruby.network.master[9]
[system.ruby.l1_cntrl4.sequencer]
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slave=system.ruby.network.master[10]
[system.ruby.l1_cntrl5.mandatoryQueue]
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[system.ruby.l1_cntrl5.requestFromCache]
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master=system.ruby.network.slave[11]
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[system.ruby.l1_cntrl5.sequencer]
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[system.ruby.l1_cntrl6.mandatoryQueue]
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[system.ruby.l1_cntrl6.requestFromCache]
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master=system.ruby.network.slave[12]
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master=system.ruby.network.slave[13]
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slave=system.ruby.network.master[13]
[system.ruby.l1_cntrl6.sequencer]
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[system.ruby.l1_cntrl7.requestFromCache]
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[system.ruby.l1_cntrl7.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3 system.ruby.network.int_links4 system.ruby.network.int_links5 system.ruby.network.int_links6 system.ruby.network.int_links7 system.ruby.network.int_links8
netifs=
number_of_virtual_networks=5
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randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers24]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers25]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers26]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers27]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers28]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers29]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers30]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers31]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers32]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers33]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers34]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers35]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers36]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers37]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers38]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers39]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers40]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers41]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers42]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers43]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers44]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers45]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers46]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers47]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers48]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers49]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers50]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers51]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers52]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers53]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers54]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers55]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers56]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers57]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers58]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers59]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers60]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers61]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers62]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers63]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers64]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers65]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers66]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers67]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers68]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers69]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers70]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers71]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers72]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers73]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers74]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers75]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers76]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers77]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers78]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers79]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers80]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers81]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers82]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers83]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers84]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers85]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers86]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers87]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers88]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers9.port_buffers89]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
-system.cpu0: completed 10000 read, 5584 write accesses @762508
-system.cpu4: completed 10000 read, 5574 write accesses @764238
-system.cpu2: completed 10000 read, 5499 write accesses @766606
-system.cpu3: completed 10000 read, 5407 write accesses @769966
-system.cpu6: completed 10000 read, 5627 write accesses @771429
-system.cpu7: completed 10000 read, 5581 write accesses @773439
-system.cpu5: completed 10000 read, 5758 write accesses @783372
-system.cpu1: completed 10000 read, 5719 write accesses @784929
-system.cpu0: completed 20000 read, 11047 write accesses @1530543
-system.cpu7: completed 20000 read, 11107 write accesses @1533180
-system.cpu3: completed 20000 read, 10950 write accesses @1534683
-system.cpu6: completed 20000 read, 11194 write accesses @1535502
-system.cpu2: completed 20000 read, 11001 write accesses @1542405
-system.cpu5: completed 20000 read, 11318 write accesses @1544896
-system.cpu4: completed 20000 read, 11200 write accesses @1550910
-system.cpu1: completed 20000 read, 11300 write accesses @1556665
-system.cpu3: completed 30000 read, 16397 write accesses @2295657
-system.cpu2: completed 30000 read, 16594 write accesses @2305853
-system.cpu6: completed 30000 read, 16817 write accesses @2307161
-system.cpu0: completed 30000 read, 16652 write accesses @2307391
-system.cpu4: completed 30000 read, 16735 write accesses @2311189
-system.cpu7: completed 30000 read, 16751 write accesses @2314182
-system.cpu5: completed 30000 read, 16940 write accesses @2314755
-system.cpu1: completed 30000 read, 16881 write accesses @2333727
-system.cpu3: completed 40000 read, 22068 write accesses @3066226
-system.cpu4: completed 40000 read, 22266 write accesses @3071105
-system.cpu2: completed 40000 read, 22243 write accesses @3071593
-system.cpu5: completed 40000 read, 22338 write accesses @3072991
-system.cpu0: completed 40000 read, 22234 write accesses @3074112
-system.cpu6: completed 40000 read, 22357 write accesses @3078814
-system.cpu7: completed 40000 read, 22306 write accesses @3082874
-system.cpu1: completed 40000 read, 22431 write accesses @3111031
-system.cpu6: completed 50000 read, 27886 write accesses @3834085
-system.cpu3: completed 50000 read, 27514 write accesses @3834389
-system.cpu4: completed 50000 read, 27846 write accesses @3838179
-system.cpu2: completed 50000 read, 27730 write accesses @3839105
-system.cpu7: completed 50000 read, 27761 write accesses @3841365
-system.cpu5: completed 50000 read, 28029 write accesses @3855011
-system.cpu0: completed 50000 read, 27884 write accesses @3855221
-system.cpu1: completed 50000 read, 28029 write accesses @3872616
-system.cpu3: completed 60000 read, 32929 write accesses @4596558
-system.cpu4: completed 60000 read, 33251 write accesses @4604359
-system.cpu2: completed 60000 read, 33251 write accesses @4609070
-system.cpu6: completed 60000 read, 33602 write accesses @4611658
-system.cpu5: completed 60000 read, 33552 write accesses @4623475
-system.cpu7: completed 60000 read, 33412 write accesses @4626557
-system.cpu0: completed 60000 read, 33422 write accesses @4628259
-system.cpu1: completed 60000 read, 33486 write accesses @4645474
-system.cpu4: completed 70000 read, 38743 write accesses @5365823
-system.cpu3: completed 70000 read, 38597 write accesses @5375393
-system.cpu2: completed 70000 read, 38711 write accesses @5386294
-system.cpu6: completed 70000 read, 39263 write accesses @5390216
-system.cpu5: completed 70000 read, 39043 write accesses @5395080
-system.cpu7: completed 70000 read, 38983 write accesses @5398310
-system.cpu0: completed 70000 read, 38989 write accesses @5399705
-system.cpu1: completed 70000 read, 39150 write accesses @5425218
-system.cpu4: completed 80000 read, 44094 write accesses @6130494
-system.cpu3: completed 80000 read, 44230 write accesses @6148777
-system.cpu6: completed 80000 read, 44684 write accesses @6157555
-system.cpu5: completed 80000 read, 44551 write accesses @6161202
-system.cpu2: completed 80000 read, 44139 write accesses @6164119
-system.cpu0: completed 80000 read, 44724 write accesses @6175294
-system.cpu7: completed 80000 read, 44671 write accesses @6179013
-system.cpu1: completed 80000 read, 44749 write accesses @6192724
-system.cpu4: completed 90000 read, 49488 write accesses @6869712
-system.cpu6: completed 90000 read, 50150 write accesses @6920477
-system.cpu2: completed 90000 read, 49757 write accesses @6931420
-system.cpu3: completed 90000 read, 50041 write accesses @6935428
-system.cpu0: completed 90000 read, 50304 write accesses @6951052
-system.cpu5: completed 90000 read, 50260 write accesses @6951232
-system.cpu7: completed 90000 read, 50274 write accesses @6961816
-system.cpu1: completed 90000 read, 50419 write accesses @6968220
-system.cpu4: completed 100000 read, 54873 write accesses @7628407
+system.cpu0: completed 10000 read, 5571 write accesses @752421
+system.cpu5: completed 10000 read, 5518 write accesses @761420
+system.cpu4: completed 10000 read, 5515 write accesses @761995
+system.cpu1: completed 10000 read, 5545 write accesses @770340
+system.cpu7: completed 10000 read, 5536 write accesses @773657
+system.cpu3: completed 10000 read, 5634 write accesses @778030
+system.cpu6: completed 10000 read, 5641 write accesses @782742
+system.cpu2: completed 10000 read, 5665 write accesses @783711
+system.cpu4: completed 20000 read, 10969 write accesses @1519216
+system.cpu1: completed 20000 read, 11064 write accesses @1534419
+system.cpu0: completed 20000 read, 11217 write accesses @1534668
+system.cpu5: completed 20000 read, 11140 write accesses @1535434
+system.cpu3: completed 20000 read, 11134 write accesses @1543210
+system.cpu7: completed 20000 read, 11062 write accesses @1544582
+system.cpu2: completed 20000 read, 11296 write accesses @1546737
+system.cpu6: completed 20000 read, 11124 write accesses @1559617
+system.cpu4: completed 30000 read, 16555 write accesses @2275552
+system.cpu0: completed 30000 read, 16802 write accesses @2300818
+system.cpu1: completed 30000 read, 16697 write accesses @2303774
+system.cpu7: completed 30000 read, 16517 write accesses @2305690
+system.cpu3: completed 30000 read, 16547 write accesses @2312240
+system.cpu2: completed 30000 read, 16835 write accesses @2313552
+system.cpu5: completed 30000 read, 16782 write accesses @2322286
+system.cpu6: completed 30000 read, 16591 write accesses @2331245
+system.cpu4: completed 40000 read, 22197 write accesses @3047291
+system.cpu1: completed 40000 read, 22254 write accesses @3080372
+system.cpu5: completed 40000 read, 22355 write accesses @3084185
+system.cpu2: completed 40000 read, 22372 write accesses @3086032
+system.cpu3: completed 40000 read, 22166 write accesses @3086541
+system.cpu7: completed 40000 read, 22080 write accesses @3086779
+system.cpu0: completed 40000 read, 22498 write accesses @3087817
+system.cpu6: completed 40000 read, 22224 write accesses @3104629
+system.cpu4: completed 50000 read, 27651 write accesses @3808654
+system.cpu3: completed 50000 read, 27619 write accesses @3840689
+system.cpu2: completed 50000 read, 27948 write accesses @3842577
+system.cpu5: completed 50000 read, 27826 write accesses @3846119
+system.cpu1: completed 50000 read, 27919 write accesses @3856612
+system.cpu0: completed 50000 read, 27967 write accesses @3862756
+system.cpu7: completed 50000 read, 27662 write accesses @3864061
+system.cpu6: completed 50000 read, 27847 write accesses @3874888
+system.cpu4: completed 60000 read, 33289 write accesses @4579441
+system.cpu5: completed 60000 read, 33335 write accesses @4610406
+system.cpu2: completed 60000 read, 33617 write accesses @4620490
+system.cpu3: completed 60000 read, 33206 write accesses @4625510
+system.cpu0: completed 60000 read, 33552 write accesses @4626939
+system.cpu1: completed 60000 read, 33496 write accesses @4630810
+system.cpu7: completed 60000 read, 33243 write accesses @4635014
+system.cpu6: completed 60000 read, 33291 write accesses @4642013
+system.cpu4: completed 70000 read, 39076 write accesses @5364272
+system.cpu5: completed 70000 read, 38991 write accesses @5366681
+system.cpu2: completed 70000 read, 39149 write accesses @5384888
+system.cpu7: completed 70000 read, 38759 write accesses @5402266
+system.cpu0: completed 70000 read, 39059 write accesses @5403051
+system.cpu3: completed 70000 read, 38849 write accesses @5406812
+system.cpu1: completed 70000 read, 39130 write accesses @5408848
+system.cpu6: completed 70000 read, 38893 write accesses @5418265
+system.cpu5: completed 80000 read, 44444 write accesses @6131768
+system.cpu4: completed 80000 read, 44664 write accesses @6143607
+system.cpu2: completed 80000 read, 44926 write accesses @6155809
+system.cpu7: completed 80000 read, 44252 write accesses @6163509
+system.cpu0: completed 80000 read, 44649 write accesses @6169693
+system.cpu1: completed 80000 read, 44753 write accesses @6180727
+system.cpu3: completed 80000 read, 44403 write accesses @6182843
+system.cpu6: completed 80000 read, 44456 write accesses @6189312
+system.cpu5: completed 90000 read, 50182 write accesses @6910395
+system.cpu7: completed 90000 read, 49674 write accesses @6913652
+system.cpu2: completed 90000 read, 50514 write accesses @6919272
+system.cpu0: completed 90000 read, 50099 write accesses @6923145
+system.cpu4: completed 90000 read, 50279 write accesses @6924731
+system.cpu1: completed 90000 read, 50283 write accesses @6951674
+system.cpu3: completed 90000 read, 50165 write accesses @6956300
+system.cpu6: completed 90000 read, 50051 write accesses @6959913
+system.cpu5: completed 100000 read, 55705 write accesses @7678882
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:05:56
-gem5 started Aug 13 2015 20:15:04
-gem5 executing on artery
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:38
+gem5 executing on ribera.cs.wisc.edu, pid 29108
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 7662866 because maximum number of loads reached
+Exiting @ tick 7678882 because maximum number of loads reached
sim_ticks 7678882 # Number of ticks simulated
final_tick 7678882 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 155896 # Simulator tick rate (ticks/s)
-host_mem_usage 461848 # Number of bytes of host memory used
-host_seconds 49.26 # Real time elapsed on the host
+host_tick_rate 112166 # Simulator tick rate (ticks/s)
+host_mem_usage 452656 # Number of bytes of host memory used
+host_seconds 68.46 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 39687936 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu2.port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu3.port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu4.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu4.port
mem_side=system.toL2Bus.slave[4]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu5.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu5.port
mem_side=system.toL2Bus.slave[5]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu6.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu6.port
mem_side=system.toL2Bus.slave[6]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu7.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu7.port
mem_side=system.toL2Bus.slave[7]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[0]
type=SnoopFilter
eventq_index=0
lookup_latency=1
+max_capacity=8388608
system=system
[system.physmem]
type=SnoopFilter
eventq_index=0
lookup_latency=1
+max_capacity=8388608
system=system
[system.voltage_domain]
-system.cpu4: completed 10000 read, 5317 write accesses @146612000
-system.cpu3: completed 10000 read, 5592 write accesses @148872500
-system.cpu7: completed 10000 read, 5446 write accesses @149754500
-system.cpu0: completed 10000 read, 5432 write accesses @150141500
-system.cpu1: completed 10000 read, 5693 write accesses @151929000
-system.cpu2: completed 10000 read, 5680 write accesses @152039000
-system.cpu6: completed 10000 read, 5624 write accesses @152462500
-system.cpu5: completed 10000 read, 5650 write accesses @153139000
-system.cpu4: completed 20000 read, 10841 write accesses @294897500
-system.cpu3: completed 20000 read, 11252 write accesses @295891500
-system.cpu0: completed 20000 read, 10771 write accesses @296321000
-system.cpu6: completed 20000 read, 11129 write accesses @300503000
-system.cpu1: completed 20000 read, 11154 write accesses @303003500
-system.cpu7: completed 20000 read, 11162 write accesses @303067000
-system.cpu5: completed 20000 read, 11275 write accesses @305007000
-system.cpu2: completed 20000 read, 11301 write accesses @305237000
-system.cpu4: completed 30000 read, 16293 write accesses @441647000
-system.cpu0: completed 30000 read, 16339 write accesses @446349998
-system.cpu6: completed 30000 read, 16630 write accesses @450155000
-system.cpu1: completed 30000 read, 16474 write accesses @451775000
-system.cpu3: completed 30000 read, 16954 write accesses @452288000
-system.cpu7: completed 30000 read, 16778 write accesses @453662000
-system.cpu5: completed 30000 read, 16839 write accesses @456398000
-system.cpu2: completed 30000 read, 16838 write accesses @457529500
-system.cpu4: completed 40000 read, 21515 write accesses @587133500
-system.cpu0: completed 40000 read, 21712 write accesses @594544000
-system.cpu6: completed 40000 read, 22199 write accesses @599911000
-system.cpu3: completed 40000 read, 22436 write accesses @600303500
-system.cpu1: completed 40000 read, 22001 write accesses @603916500
-system.cpu7: completed 40000 read, 22291 write accesses @604899500
-system.cpu5: completed 40000 read, 22433 write accesses @607477000
-system.cpu2: completed 40000 read, 22541 write accesses @610042000
-system.cpu4: completed 50000 read, 27094 write accesses @738435000
-system.cpu0: completed 50000 read, 27172 write accesses @744686500
-system.cpu3: completed 50000 read, 27887 write accesses @749000500
-system.cpu1: completed 50000 read, 27549 write accesses @751936500
-system.cpu6: completed 50000 read, 27775 write accesses @752183500
-system.cpu7: completed 50000 read, 27920 write accesses @756029000
-system.cpu5: completed 50000 read, 27984 write accesses @756496000
-system.cpu2: completed 50000 read, 27916 write accesses @758896000
-system.cpu4: completed 60000 read, 32601 write accesses @886900500
-system.cpu0: completed 60000 read, 32631 write accesses @892444000
-system.cpu1: completed 60000 read, 33102 write accesses @899938000
-system.cpu3: completed 60000 read, 33481 write accesses @900956500
-system.cpu6: completed 60000 read, 33392 write accesses @901773000
-system.cpu5: completed 60000 read, 33565 write accesses @904995500
-system.cpu2: completed 60000 read, 33466 write accesses @909744500
-system.cpu7: completed 60000 read, 33536 write accesses @910295999
-system.cpu4: completed 70000 read, 38175 write accesses @1036375499
-system.cpu0: completed 70000 read, 38106 write accesses @1040049000
-system.cpu6: completed 70000 read, 38841 write accesses @1048673000
-system.cpu1: completed 70000 read, 38668 write accesses @1049885000
-system.cpu3: completed 70000 read, 39114 write accesses @1053709500
-system.cpu5: completed 70000 read, 39200 write accesses @1055942500
-system.cpu2: completed 70000 read, 38856 write accesses @1057747499
-system.cpu7: completed 70000 read, 39064 write accesses @1059368500
-system.cpu4: completed 80000 read, 43619 write accesses @1185369000
-system.cpu0: completed 80000 read, 43549 write accesses @1189974500
-system.cpu6: completed 80000 read, 44374 write accesses @1198657499
-system.cpu1: completed 80000 read, 43973 write accesses @1199665500
-system.cpu3: completed 80000 read, 44602 write accesses @1199968000
-system.cpu5: completed 80000 read, 44843 write accesses @1207585500
-system.cpu2: completed 80000 read, 44389 write accesses @1209591000
-system.cpu7: completed 80000 read, 44629 write accesses @1211090500
-system.cpu4: completed 90000 read, 49142 write accesses @1333753500
-system.cpu0: completed 90000 read, 49249 write accesses @1339029000
-system.cpu1: completed 90000 read, 49469 write accesses @1348019000
-system.cpu6: completed 90000 read, 50013 write accesses @1351048500
-system.cpu3: completed 90000 read, 50231 write accesses @1351323000
-system.cpu5: completed 90000 read, 50311 write accesses @1355589000
-system.cpu7: completed 90000 read, 50146 write accesses @1357457500
-system.cpu2: completed 90000 read, 49997 write accesses @1360771999
-system.cpu4: completed 100000 read, 54692 write accesses @1486654500
+system.cpu5: completed 10000 read, 5633 write accesses @60486000
+system.cpu4: completed 10000 read, 5582 write accesses @61180000
+system.cpu6: completed 10000 read, 5560 write accesses @61307500
+system.cpu7: completed 10000 read, 5599 write accesses @61402000
+system.cpu2: completed 10000 read, 5643 write accesses @61472000
+system.cpu1: completed 10000 read, 5506 write accesses @61551000
+system.cpu3: completed 10000 read, 5658 write accesses @61700000
+system.cpu0: completed 10000 read, 5706 write accesses @62631500
+system.cpu5: completed 20000 read, 11103 write accesses @113616000
+system.cpu6: completed 20000 read, 10976 write accesses @113920500
+system.cpu2: completed 20000 read, 11039 write accesses @113933500
+system.cpu3: completed 20000 read, 11207 write accesses @114624500
+system.cpu4: completed 20000 read, 11084 write accesses @114955000
+system.cpu0: completed 20000 read, 11085 write accesses @115057000
+system.cpu7: completed 20000 read, 11095 write accesses @115187000
+system.cpu1: completed 20000 read, 11193 write accesses @116687500
+system.cpu5: completed 30000 read, 16705 write accesses @166840500
+system.cpu2: completed 30000 read, 16691 write accesses @167354000
+system.cpu6: completed 30000 read, 16468 write accesses @167416000
+system.cpu4: completed 30000 read, 16533 write accesses @168175000
+system.cpu3: completed 30000 read, 16715 write accesses @168594500
+system.cpu7: completed 30000 read, 16620 write accesses @168682000
+system.cpu0: completed 30000 read, 16560 write accesses @168778500
+system.cpu1: completed 30000 read, 16873 write accesses @170313500
+system.cpu2: completed 40000 read, 22285 write accesses @220155500
+system.cpu3: completed 40000 read, 22038 write accesses @220636000
+system.cpu5: completed 40000 read, 22211 write accesses @221161500
+system.cpu6: completed 40000 read, 22097 write accesses @221217500
+system.cpu7: completed 40000 read, 22095 write accesses @221239000
+system.cpu0: completed 40000 read, 22196 write accesses @221351000
+system.cpu4: completed 40000 read, 21983 write accesses @222184000
+system.cpu1: completed 40000 read, 22367 write accesses @223407000
+system.cpu2: completed 50000 read, 27562 write accesses @273475000
+system.cpu6: completed 50000 read, 27553 write accesses @273666500
+system.cpu0: completed 50000 read, 27658 write accesses @274179000
+system.cpu4: completed 50000 read, 27584 write accesses @274332000
+system.cpu3: completed 50000 read, 27495 write accesses @274461500
+system.cpu7: completed 50000 read, 27568 write accesses @274681000
+system.cpu5: completed 50000 read, 27850 write accesses @275614000
+system.cpu1: completed 50000 read, 28070 write accesses @277107000
+system.cpu2: completed 60000 read, 33123 write accesses @327185500
+system.cpu6: completed 60000 read, 33149 write accesses @327223000
+system.cpu3: completed 60000 read, 32991 write accesses @327854000
+system.cpu7: completed 60000 read, 32997 write accesses @328407000
+system.cpu0: completed 60000 read, 33282 write accesses @328452500
+system.cpu4: completed 60000 read, 33164 write accesses @329017000
+system.cpu5: completed 60000 read, 33383 write accesses @329401500
+system.cpu1: completed 60000 read, 33681 write accesses @330675000
+system.cpu2: completed 70000 read, 38702 write accesses @380801000
+system.cpu3: completed 70000 read, 38442 write accesses @381181000
+system.cpu6: completed 70000 read, 38695 write accesses @381583500
+system.cpu7: completed 70000 read, 38573 write accesses @382302000
+system.cpu0: completed 70000 read, 38773 write accesses @382499000
+system.cpu4: completed 70000 read, 38793 write accesses @383094500
+system.cpu5: completed 70000 read, 38945 write accesses @383290000
+system.cpu1: completed 70000 read, 39200 write accesses @385376000
+system.cpu2: completed 80000 read, 44175 write accesses @434108000
+system.cpu6: completed 80000 read, 44138 write accesses @434454000
+system.cpu3: completed 80000 read, 43905 write accesses @434859000
+system.cpu7: completed 80000 read, 43929 write accesses @435594500
+system.cpu0: completed 80000 read, 44322 write accesses @435767000
+system.cpu4: completed 80000 read, 44313 write accesses @436517500
+system.cpu5: completed 80000 read, 44613 write accesses @436622000
+system.cpu1: completed 80000 read, 44739 write accesses @439209000
+system.cpu6: completed 90000 read, 49689 write accesses @488185000
+system.cpu3: completed 90000 read, 49429 write accesses @488562500
+system.cpu7: completed 90000 read, 49434 write accesses @488577000
+system.cpu2: completed 90000 read, 49778 write accesses @488987500
+system.cpu0: completed 90000 read, 49893 write accesses @489736000
+system.cpu5: completed 90000 read, 50116 write accesses @489869500
+system.cpu4: completed 90000 read, 49769 write accesses @490914000
+system.cpu1: completed 90000 read, 50142 write accesses @491765500
+system.cpu6: completed 100000 read, 55059 write accesses @540820000
+Redirecting stdout to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 28 2014 18:29:12
-gem5 started Feb 28 2014 18:30:27
-gem5 executing on cz310588hp
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter -re tests/run.py build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter
+gem5 compiled Nov 15 2015 14:58:33
+gem5 started Nov 15 2015 14:58:44
+gem5 executing on ribera.cs.wisc.edu, pid 5046
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 1466014000 because maximum number of loads reached
+Exiting @ tick 540820000 because maximum number of loads reached
sim_ticks 540820000 # Number of ticks simulated
final_tick 540820000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 106172397 # Simulator tick rate (ticks/s)
-host_mem_usage 280772 # Number of bytes of host memory used
-host_seconds 5.09 # Real time elapsed on the host
+host_tick_rate 74356212 # Simulator tick rate (ticks/s)
+host_mem_usage 274932 # Number of bytes of host memory used
+host_seconds 7.27 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu0 88157 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu0.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu0.port
mem_side=system.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu1.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu1.port
mem_side=system.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu2.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu2.port
mem_side=system.toL2Bus.slave[2]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu3.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu3.port
mem_side=system.toL2Bus.slave[3]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu4.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu4.port
mem_side=system.toL2Bus.slave[4]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu5.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu5.port
mem_side=system.toL2Bus.slave[5]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu6.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu6.port
mem_side=system.toL2Bus.slave[6]
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu7.l1c.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu7.port
mem_side=system.toL2Bus.slave[7]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.l2c.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[0]
[system.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.l2c.cpu_side
slave=system.cpu0.l1c.mem_side system.cpu1.l1c.mem_side system.cpu2.l1c.mem_side system.cpu3.l1c.mem_side system.cpu4.l1c.mem_side system.cpu5.l1c.mem_side system.cpu6.l1c.mem_side system.cpu7.l1c.mem_side
+[system.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.voltage_domain]
type=VoltageDomain
eventq_index=0
-system.cpu1: completed 10000 read, 5362 write accesses @70749500
-system.cpu6: completed 10000 read, 5537 write accesses @71195000
-system.cpu7: completed 10000 read, 5519 write accesses @71360000
-system.cpu4: completed 10000 read, 5569 write accesses @71442000
-system.cpu3: completed 10000 read, 5551 write accesses @71947000
-system.cpu5: completed 10000 read, 5610 write accesses @72351000
-system.cpu2: completed 10000 read, 5548 write accesses @72366000
-system.cpu0: completed 10000 read, 5597 write accesses @72604000
-system.cpu1: completed 20000 read, 10810 write accesses @136799000
-system.cpu6: completed 20000 read, 11150 write accesses @137085000
-system.cpu4: completed 20000 read, 11041 write accesses @137243000
-system.cpu5: completed 20000 read, 11255 write accesses @138165500
-system.cpu7: completed 20000 read, 11207 write accesses @138180500
-system.cpu3: completed 20000 read, 11018 write accesses @138711500
-system.cpu2: completed 20000 read, 11094 write accesses @139138500
-system.cpu0: completed 20000 read, 11219 write accesses @140219500
-system.cpu5: completed 30000 read, 16778 write accesses @203366500
-system.cpu6: completed 30000 read, 16566 write accesses @203972500
-system.cpu4: completed 30000 read, 16724 write accesses @204003000
-system.cpu1: completed 30000 read, 16364 write accesses @204656500
-system.cpu2: completed 30000 read, 16663 write accesses @204765000
-system.cpu7: completed 30000 read, 16867 write accesses @205681500
-system.cpu3: completed 30000 read, 16606 write accesses @205970500
-system.cpu0: completed 30000 read, 16763 write accesses @207333500
-system.cpu5: completed 40000 read, 22274 write accesses @268156500
-system.cpu6: completed 40000 read, 22009 write accesses @269534000
-system.cpu2: completed 40000 read, 22255 write accesses @271458500
-system.cpu4: completed 40000 read, 22360 write accesses @272143500
-system.cpu0: completed 40000 read, 22178 write accesses @272544500
-system.cpu1: completed 40000 read, 22131 write accesses @272652000
-system.cpu3: completed 40000 read, 22246 write accesses @273210500
-system.cpu7: completed 40000 read, 22431 write accesses @273722500
-system.cpu5: completed 50000 read, 27739 write accesses @335077500
-system.cpu6: completed 50000 read, 27540 write accesses @335500500
-system.cpu4: completed 50000 read, 27805 write accesses @337842000
-system.cpu7: completed 50000 read, 27755 write accesses @337879500
-system.cpu2: completed 50000 read, 27750 write accesses @338436000
-system.cpu0: completed 50000 read, 27692 write accesses @339374000
-system.cpu1: completed 50000 read, 27828 write accesses @340225500
-system.cpu3: completed 50000 read, 27884 write accesses @341199000
-system.cpu5: completed 60000 read, 33220 write accesses @401069000
-system.cpu6: completed 60000 read, 33064 write accesses @401171000
-system.cpu7: completed 60000 read, 33318 write accesses @402700500
-system.cpu4: completed 60000 read, 33407 write accesses @404241000
-system.cpu2: completed 60000 read, 33248 write accesses @404642000
-system.cpu0: completed 60000 read, 33222 write accesses @405992500
-system.cpu1: completed 60000 read, 33452 write accesses @407711000
-system.cpu3: completed 60000 read, 33293 write accesses @408190000
-system.cpu6: completed 70000 read, 38545 write accesses @467631000
-system.cpu5: completed 70000 read, 38773 write accesses @467786500
-system.cpu7: completed 70000 read, 38817 write accesses @468768499
-system.cpu2: completed 70000 read, 38804 write accesses @470615500
-system.cpu4: completed 70000 read, 38942 write accesses @471024500
-system.cpu1: completed 70000 read, 38924 write accesses @472741500
-system.cpu0: completed 70000 read, 38792 write accesses @473888500
-system.cpu3: completed 70000 read, 38873 write accesses @474437500
-system.cpu5: completed 80000 read, 44156 write accesses @533178500
-system.cpu6: completed 80000 read, 44068 write accesses @534028500
-system.cpu7: completed 80000 read, 44398 write accesses @535850500
-system.cpu2: completed 80000 read, 44302 write accesses @537573000
-system.cpu4: completed 80000 read, 44462 write accesses @538315000
-system.cpu0: completed 80000 read, 44312 write accesses @540158500
-system.cpu1: completed 80000 read, 44676 write accesses @540667000
-system.cpu3: completed 80000 read, 44446 write accesses @541285000
-system.cpu5: completed 90000 read, 49777 write accesses @600496000
-system.cpu6: completed 90000 read, 49628 write accesses @600631500
-system.cpu7: completed 90000 read, 49999 write accesses @603063500
-system.cpu4: completed 90000 read, 49890 write accesses @603847000
-system.cpu2: completed 90000 read, 50013 write accesses @605897999
-system.cpu1: completed 90000 read, 50188 write accesses @606811500
-system.cpu3: completed 90000 read, 49928 write accesses @606922500
-system.cpu0: completed 90000 read, 49837 write accesses @607047500
-system.cpu6: completed 100000 read, 55113 write accesses @666669000
+system.cpu6: completed 10000 read, 5487 write accesses @59571500
+system.cpu3: completed 10000 read, 5414 write accesses @59651500
+system.cpu7: completed 10000 read, 5388 write accesses @60317500
+system.cpu5: completed 10000 read, 5633 write accesses @60565500
+system.cpu0: completed 10000 read, 5554 write accesses @60812000
+system.cpu2: completed 10000 read, 5506 write accesses @60906000
+system.cpu4: completed 10000 read, 5667 write accesses @61020000
+system.cpu1: completed 10000 read, 5729 write accesses @61134500
+system.cpu6: completed 20000 read, 10937 write accesses @112006500
+system.cpu3: completed 20000 read, 10780 write accesses @112135000
+system.cpu7: completed 20000 read, 10967 write accesses @112826000
+system.cpu4: completed 20000 read, 11065 write accesses @113623000
+system.cpu5: completed 20000 read, 11211 write accesses @113744000
+system.cpu2: completed 20000 read, 11030 write accesses @114035000
+system.cpu0: completed 20000 read, 10992 write accesses @114045500
+system.cpu1: completed 20000 read, 11316 write accesses @114786000
+system.cpu7: completed 30000 read, 16437 write accesses @164923000
+system.cpu3: completed 30000 read, 16370 write accesses @165110500
+system.cpu6: completed 30000 read, 16452 write accesses @165210000
+system.cpu5: completed 30000 read, 16648 write accesses @166336000
+system.cpu2: completed 30000 read, 16509 write accesses @166732000
+system.cpu0: completed 30000 read, 16577 write accesses @167160500
+system.cpu4: completed 30000 read, 16715 write accesses @167466500
+system.cpu1: completed 30000 read, 16830 write accesses @168055000
+system.cpu6: completed 40000 read, 21969 write accesses @217981000
+system.cpu3: completed 40000 read, 21918 write accesses @218202000
+system.cpu7: completed 40000 read, 21990 write accesses @218219000
+system.cpu2: completed 40000 read, 21957 write accesses @218925500
+system.cpu5: completed 40000 read, 22088 write accesses @218962000
+system.cpu0: completed 40000 read, 22019 write accesses @220261500
+system.cpu4: completed 40000 read, 22141 write accesses @220429500
+system.cpu1: completed 40000 read, 22465 write accesses @221673500
+system.cpu6: completed 50000 read, 27340 write accesses @269928500
+system.cpu3: completed 50000 read, 27331 write accesses @269971000
+system.cpu7: completed 50000 read, 27530 write accesses @270791500
+system.cpu5: completed 50000 read, 27634 write accesses @271727500
+system.cpu2: completed 50000 read, 27623 write accesses @272554500
+system.cpu0: completed 50000 read, 27533 write accesses @273321500
+system.cpu4: completed 50000 read, 27756 write accesses @273793500
+system.cpu1: completed 50000 read, 28047 write accesses @275360000
+system.cpu6: completed 60000 read, 32844 write accesses @323017000
+system.cpu3: completed 60000 read, 32841 write accesses @324483500
+system.cpu5: completed 60000 read, 33251 write accesses @324526000
+system.cpu7: completed 60000 read, 33152 write accesses @324853000
+system.cpu0: completed 60000 read, 33006 write accesses @325804000
+system.cpu2: completed 60000 read, 33348 write accesses @325916500
+system.cpu4: completed 60000 read, 33317 write accesses @326721500
+system.cpu1: completed 60000 read, 33656 write accesses @328729000
+system.cpu6: completed 70000 read, 38487 write accesses @376493000
+system.cpu7: completed 70000 read, 38761 write accesses @377715000
+system.cpu3: completed 70000 read, 38353 write accesses @377922000
+system.cpu5: completed 70000 read, 38776 write accesses @378190500
+system.cpu2: completed 70000 read, 38794 write accesses @378444500
+system.cpu0: completed 70000 read, 38678 write accesses @379664500
+system.cpu4: completed 70000 read, 38900 write accesses @380595000
+system.cpu1: completed 70000 read, 39220 write accesses @382567000
+system.cpu6: completed 80000 read, 43956 write accesses @429072500
+system.cpu7: completed 80000 read, 44286 write accesses @430036500
+system.cpu5: completed 80000 read, 44299 write accesses @430673000
+system.cpu3: completed 80000 read, 43950 write accesses @431481500
+system.cpu2: completed 80000 read, 44367 write accesses @431856000
+system.cpu0: completed 80000 read, 44165 write accesses @433508500
+system.cpu4: completed 80000 read, 44456 write accesses @435070500
+system.cpu1: completed 80000 read, 44736 write accesses @436017000
+system.cpu6: completed 90000 read, 49535 write accesses @481570000
+system.cpu7: completed 90000 read, 49822 write accesses @483210500
+system.cpu5: completed 90000 read, 49824 write accesses @483444500
+system.cpu3: completed 90000 read, 49649 write accesses @484870500
+system.cpu2: completed 90000 read, 50045 write accesses @485829000
+system.cpu0: completed 90000 read, 49706 write accesses @486425000
+system.cpu4: completed 90000 read, 49831 write accesses @488248500
+system.cpu1: completed 90000 read, 50268 write accesses @489877001
+system.cpu6: completed 100000 read, 54955 write accesses @534039500
+Redirecting stdout to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:54:17
-gem5 started Jan 22 2014 17:28:45
-gem5 executing on u200540-lin
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest -re tests/run.py build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest
+gem5 compiled Nov 15 2015 14:58:33
+gem5 started Nov 15 2015 14:58:45
+gem5 executing on ribera.cs.wisc.edu, pid 5047
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 652606500 because maximum number of loads reached
+Exiting @ tick 534039500 because maximum number of loads reached
sim_ticks 534039500 # Number of ticks simulated
final_tick 534039500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 107991246 # Simulator tick rate (ticks/s)
-host_mem_usage 280540 # Number of bytes of host memory used
-host_seconds 4.95 # Real time elapsed on the host
+host_tick_rate 75793857 # Simulator tick rate (ticks/s)
+host_mem_usage 274932 # Number of bytes of host memory used
+host_seconds 7.05 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu0 80135 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
-warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 18:27:58
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-atomic
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:48
+gem5 executing on ribera.cs.wisc.edu, pid 29078
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
-warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 18:28:33
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:37
+gem5 executing on ribera.cs.wisc.edu, pid 29068
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
-Exiting @ tick 133634727000 because target called exit()
+Exiting @ tick 134741611500 because target called exit()
sim_ticks 134741611500 # Number of ticks simulated
final_tick 134741611500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1392855 # Simulator instruction rate (inst/s)
-host_op_rate 1392855 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2124451972 # Simulator tick rate (ticks/s)
-host_mem_usage 305428 # Number of bytes of host memory used
-host_seconds 63.42 # Real time elapsed on the host
+host_inst_rate 947641 # Simulator instruction rate (inst/s)
+host_op_rate 947641 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1445388793 # Simulator tick rate (ticks/s)
+host_mem_usage 301064 # Number of bytes of host memory used
+host_seconds 93.22 # Real time elapsed on the host
sim_insts 88340673 # Number of instructions simulated
sim_ops 88340673 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 18:03:38
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11028
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x49b6380
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
-Exiting @ tick 53932157000 because target called exit()
+Exiting @ tick 48960011500 because target called exit()
sim_ticks 48960011500 # Number of ticks simulated
final_tick 48960011500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1547474 # Simulator instruction rate (inst/s)
-host_op_rate 1979004 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1068409192 # Simulator tick rate (ticks/s)
-host_mem_usage 311136 # Number of bytes of host memory used
-host_seconds 45.83 # Real time elapsed on the host
+host_inst_rate 1012333 # Simulator instruction rate (inst/s)
+host_op_rate 1294633 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 698936270 # Simulator tick rate (ticks/s)
+host_mem_usage 308028 # Number of bytes of host memory used
+host_seconds 70.05 # Real time elapsed on the host
sim_insts 70913182 # Number of instructions simulated
sim_ops 90688137 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 18:04:30
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/50.vortex/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/50.vortex/arm/linux/simple-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:29:25
+gem5 executing on ribera.cs.wisc.edu, pid 11171
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/50.vortex/arm/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5604d00
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
-Exiting @ tick 132689045000 because target called exit()
+Exiting @ tick 128076812500 because target called exit()
sim_ticks 128076812500 # Number of ticks simulated
final_tick 128076812500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 787701 # Simulator instruction rate (inst/s)
-host_op_rate 1005673 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1433579724 # Simulator tick rate (ticks/s)
-host_mem_usage 323992 # Number of bytes of host memory used
-host_seconds 89.34 # Real time elapsed on the host
+host_inst_rate 552478 # Simulator instruction rate (inst/s)
+host_op_rate 705359 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1005483876 # Simulator tick rate (ticks/s)
+host_mem_usage 318020 # Number of bytes of host memory used
+host_seconds 127.38 # Real time elapsed on the host
sim_insts 70373629 # Number of instructions simulated
sim_ops 89847363 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
warn: Sockets disabled, not accepting gdb connections
-warn: ignoring syscall time(4026528248, 4026527848, ...)
-warn: ignoring syscall time(1375098, 4026527400, ...)
-warn: ignoring syscall time(1, 4026527312, ...)
-warn: ignoring syscall time(413, 4026527048, ...)
-warn: ignoring syscall time(414, 4026527048, ...)
-warn: ignoring syscall time(4026527688, 4026527288, ...)
-warn: ignoring syscall time(1375098, 4026526840, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026526960, ...)
-warn: ignoring syscall time(409, 4026527040, ...)
-warn: ignoring syscall time(409, 4026527000, ...)
-warn: ignoring syscall time(409, 4026526984, ...)
-warn: ignoring syscall time(409, 4026526984, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(19045, 4026526312, ...)
-warn: ignoring syscall time(409, 4026526832, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526848, ...)
-warn: ignoring syscall time(409, 4026526840, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526856, ...)
-warn: ignoring syscall time(409, 4026526848, ...)
-warn: ignoring syscall time(409, 4026526936, ...)
-warn: ignoring syscall time(4026527408, 4026527008, ...)
-warn: ignoring syscall time(1375098, 4026526560, ...)
-warn: ignoring syscall time(18732, 4026527184, ...)
-warn: ignoring syscall time(409, 4026526632, ...)
-warn: ignoring syscall time(0, 4026526736, ...)
-warn: ignoring syscall time(0, 4026527320, ...)
-warn: ignoring syscall time(225, 4026527744, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026526856, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(4026527496, 4026527096, ...)
-warn: ignoring syscall time(1375098, 4026526648, ...)
-warn: ignoring syscall time(0, 4026526824, ...)
-warn: ignoring syscall time(0, 4026527320, ...)
-warn: ignoring syscall time(1879089152, 4026527184, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall time(1595768, 4026527472, ...)
-warn: ignoring syscall time(17300, 4026526912, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(19045, 4026526912, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(19045, 4026526912, ...)
-warn: ignoring syscall time(17300, 4026526912, ...)
-warn: ignoring syscall time(20500, 4026525968, ...)
-warn: ignoring syscall time(4026526436, 4026525968, ...)
-warn: ignoring syscall time(7004192, 4026526056, ...)
-warn: ignoring syscall time(4, 4026527512, ...)
-warn: ignoring syscall time(0, 4026525760, ...)
+warn: ignoring syscall time(4026527848, ...)
+warn: ignoring syscall time(4026527400, ...)
+warn: ignoring syscall time(4026527312, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527288, ...)
+warn: ignoring syscall time(4026526840, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026526960, ...)
+warn: ignoring syscall time(4026527040, ...)
+warn: ignoring syscall time(4026527000, ...)
+warn: ignoring syscall time(4026526984, ...)
+warn: ignoring syscall time(4026526984, ...)
+warn: ignoring syscall time(4026526872, ...)
+warn: ignoring syscall time(4026526312, ...)
+warn: ignoring syscall time(4026526832, ...)
+warn: ignoring syscall time(4026526872, ...)
+warn: ignoring syscall time(4026526872, ...)
+warn: ignoring syscall time(4026526848, ...)
+warn: ignoring syscall time(4026526840, ...)
+warn: ignoring syscall time(4026526872, ...)
+warn: ignoring syscall time(4026526856, ...)
+warn: ignoring syscall time(4026526848, ...)
+warn: ignoring syscall time(4026526936, ...)
+warn: ignoring syscall time(4026527008, ...)
+warn: ignoring syscall time(4026526560, ...)
+warn: ignoring syscall time(4026527184, ...)
+warn: ignoring syscall time(4026526632, ...)
+warn: ignoring syscall time(4026526736, ...)
+warn: ignoring syscall time(4026527320, ...)
+warn: ignoring syscall time(4026527744, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026526856, ...)
+warn: ignoring syscall time(4026526872, ...)
+warn: ignoring syscall time(4026527096, ...)
+warn: ignoring syscall time(4026526648, ...)
+warn: ignoring syscall time(4026526824, ...)
+warn: ignoring syscall time(4026527320, ...)
+warn: ignoring syscall time(4026527184, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026525968, ...)
+warn: ignoring syscall time(4026525968, ...)
+warn: ignoring syscall time(4026526056, ...)
+warn: ignoring syscall time(4026527512, ...)
+warn: ignoring syscall time(4026525760, ...)
+Redirecting stdout to build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:46:20
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/50.vortex/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/long/se/50.vortex/sparc/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:27
+gem5 executing on ribera.cs.wisc.edu, pid 7787
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
warn: Sockets disabled, not accepting gdb connections
-warn: ignoring syscall time(4026528248, 4026527848, ...)
-warn: ignoring syscall time(1375098, 4026527400, ...)
-warn: ignoring syscall time(1, 4026527312, ...)
-warn: ignoring syscall time(413, 4026527048, ...)
-warn: ignoring syscall time(414, 4026527048, ...)
-warn: ignoring syscall time(4026527688, 4026527288, ...)
-warn: ignoring syscall time(1375098, 4026526840, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026526960, ...)
-warn: ignoring syscall time(409, 4026527040, ...)
-warn: ignoring syscall time(409, 4026527000, ...)
-warn: ignoring syscall time(409, 4026526984, ...)
-warn: ignoring syscall time(409, 4026526984, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(19045, 4026526312, ...)
-warn: ignoring syscall time(409, 4026526832, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526848, ...)
-warn: ignoring syscall time(409, 4026526840, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(409, 4026526856, ...)
-warn: ignoring syscall time(409, 4026526848, ...)
-warn: ignoring syscall time(409, 4026526936, ...)
-warn: ignoring syscall time(4026527408, 4026527008, ...)
-warn: ignoring syscall time(1375098, 4026526560, ...)
-warn: ignoring syscall time(18732, 4026527184, ...)
-warn: ignoring syscall time(409, 4026526632, ...)
-warn: ignoring syscall time(0, 4026526736, ...)
-warn: ignoring syscall time(0, 4026527320, ...)
-warn: ignoring syscall time(225, 4026527744, ...)
-warn: ignoring syscall time(409, 4026527048, ...)
-warn: ignoring syscall time(409, 4026526856, ...)
-warn: ignoring syscall time(409, 4026526872, ...)
-warn: ignoring syscall time(4026527496, 4026527096, ...)
-warn: ignoring syscall time(1375098, 4026526648, ...)
-warn: ignoring syscall time(0, 4026526824, ...)
-warn: ignoring syscall time(0, 4026527320, ...)
-warn: ignoring syscall time(1879089152, 4026527184, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall times(246, 4026527728, ...)
-warn: ignoring syscall time(1595768, 4026527472, ...)
-warn: ignoring syscall time(17300, 4026526912, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(19045, 4026526912, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(0, 4026527472, ...)
-warn: ignoring syscall time(19045, 4026526912, ...)
-warn: ignoring syscall time(17300, 4026526912, ...)
-warn: ignoring syscall time(20500, 4026525968, ...)
-warn: ignoring syscall time(4026526436, 4026525968, ...)
-warn: ignoring syscall time(7004192, 4026526056, ...)
-warn: ignoring syscall time(4, 4026527512, ...)
-warn: ignoring syscall time(0, 4026525760, ...)
+warn: ignoring syscall time(4026527848, ...)
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+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527288, ...)
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+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026527048, ...)
+warn: ignoring syscall time(4026526960, ...)
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+warn: ignoring syscall time(4026526872, ...)
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+warn: ignoring syscall time(4026526872, ...)
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+warn: ignoring syscall time(4026526848, ...)
+warn: ignoring syscall time(4026526840, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
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+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall times(4026527728, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026527472, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026526912, ...)
+warn: ignoring syscall time(4026525968, ...)
+warn: ignoring syscall time(4026525968, ...)
+warn: ignoring syscall time(4026526056, ...)
+warn: ignoring syscall time(4026527512, ...)
+warn: ignoring syscall time(4026525760, ...)
+Redirecting stdout to build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:47:13
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/50.vortex/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/long/se/50.vortex/sparc/linux/simple-timing
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:22
+gem5 executing on ribera.cs.wisc.edu, pid 7773
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
-Exiting @ tick 202242260000 because target called exit()
+Exiting @ tick 203115876500 because target called exit()
sim_ticks 203115876500 # Number of ticks simulated
final_tick 203115876500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1134042 # Simulator instruction rate (inst/s)
-host_op_rate 1148726 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1713866597 # Simulator tick rate (ticks/s)
-host_mem_usage 305064 # Number of bytes of host memory used
-host_seconds 118.51 # Real time elapsed on the host
+host_inst_rate 826258 # Simulator instruction rate (inst/s)
+host_op_rate 836957 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1248716263 # Simulator tick rate (ticks/s)
+host_mem_usage 299980 # Number of bytes of host memory used
+host_seconds 162.66 # Real time elapsed on the host
sim_insts 134398962 # Number of instructions simulated
sim_ops 136139190 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
randomization=true
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.optionalQueue]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.prefetcher]
type=Prefetcher
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.unblockToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level/simout
+Redirecting stderr to build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:16:05
-gem5 started Aug 13 2015 20:15:53
-gem5 executing on artery
-command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level
+gem5 compiled Nov 15 2015 14:41:13
+gem5 started Nov 15 2015 14:41:38
+gem5 executing on ribera.cs.wisc.edu, pid 32148
+command line: build/ALPHA_MESI_Two_Level/gem5.opt -d build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 42571 because Ruby Tester completed
+Exiting @ tick 41751 because Ruby Tester completed
sim_ticks 41751 # Number of ticks simulated
final_tick 41751 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 638805 # Simulator tick rate (ticks/s)
-host_mem_usage 452164 # Number of bytes of host memory used
-host_seconds 0.07 # Real time elapsed on the host
+host_tick_rate 456955 # Simulator tick rate (ticks/s)
+host_mem_usage 445744 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 55552 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=3
phys_mem=Null
randomization=true
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[6]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[6]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromL1Cache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.requestToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.responseFromL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToL1Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.l2_cntrl0]
type=L2Cache_Controller
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.l2_cntrl0.GlobalRequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l2_cntrl0.L1RequestFromL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.l2_cntrl0.L1RequestToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.l2_cntrl0.L2cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.l2_cntrl0.responseToL2Cache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.l2_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.memctrl_clk_domain]
type=DerivedClockDomain
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2
netifs=
number_of_virtual_networks=3
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11
-recycle_latency=0
router_id=0
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11
-recycle_latency=0
router_id=1
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11
-recycle_latency=0
router_id=2
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers3.port_buffers00 system.ruby.network.routers3.port_buffers01 system.ruby.network.routers3.port_buffers02 system.ruby.network.routers3.port_buffers03 system.ruby.network.routers3.port_buffers04 system.ruby.network.routers3.port_buffers05 system.ruby.network.routers3.port_buffers06 system.ruby.network.routers3.port_buffers07 system.ruby.network.routers3.port_buffers08 system.ruby.network.routers3.port_buffers09 system.ruby.network.routers3.port_buffers10 system.ruby.network.routers3.port_buffers11 system.ruby.network.routers3.port_buffers12 system.ruby.network.routers3.port_buffers13 system.ruby.network.routers3.port_buffers14 system.ruby.network.routers3.port_buffers15 system.ruby.network.routers3.port_buffers16 system.ruby.network.routers3.port_buffers17
-recycle_latency=0
router_id=3
virt_nets=3
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers3.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:22:33
-gem5 started Aug 13 2015 20:16:24
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
+gem5 compiled Nov 15 2015 14:46:21
+gem5 started Nov 15 2015 14:46:44
+gem5 executing on ribera.cs.wisc.edu, pid 1173
+command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 54131 because Ruby Tester completed
+Exiting @ tick 53711 because Ruby Tester completed
sim_ticks 53711 # Number of ticks simulated
final_tick 53711 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 508906 # Simulator tick rate (ticks/s)
-host_mem_usage 451636 # Number of bytes of host memory used
-host_seconds 0.11 # Real time elapsed on the host
+host_tick_rate 378504 # Simulator tick rate (ticks/s)
+host_mem_usage 447852 # Number of bytes of host memory used
+host_seconds 0.14 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 54528 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=true
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:28:58
-gem5 started Aug 13 2015 20:17:44
-gem5 executing on artery
-command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token
+gem5 compiled Nov 15 2015 14:51:28
+gem5 started Nov 15 2015 14:51:52
+gem5 executing on ribera.cs.wisc.edu, pid 2888
+command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 50521 because Ruby Tester completed
+Exiting @ tick 53241 because Ruby Tester completed
sim_ticks 53241 # Number of ticks simulated
final_tick 53241 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 858034 # Simulator tick rate (ticks/s)
-host_mem_usage 452700 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_tick_rate 626475 # Simulator tick rate (ticks/s)
+host_mem_usage 446792 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 54016 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=6
phys_mem=Null
randomization=true
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[5]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[5]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.probeFilter]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[4]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.responseToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.triggerQueue]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
[system.ruby.dir_cntrl0.unblockToDir]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.l1_cntrl0]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.unblockFromCache]
type=MessageBuffer
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.memctrl_clk_domain]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=6
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14 system.ruby.network.routers0.port_buffers15 system.ruby.network.routers0.port_buffers16 system.ruby.network.routers0.port_buffers17
-recycle_latency=0
router_id=0
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14 system.ruby.network.routers1.port_buffers15 system.ruby.network.routers1.port_buffers16 system.ruby.network.routers1.port_buffers17
-recycle_latency=0
router_id=1
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19 system.ruby.network.routers2.port_buffers20 system.ruby.network.routers2.port_buffers21 system.ruby.network.routers2.port_buffers22 system.ruby.network.routers2.port_buffers23
-recycle_latency=0
router_id=2
virt_nets=6
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers20]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers21]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers22]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers23]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:09:46
-gem5 started Aug 13 2015 20:15:31
-gem5 executing on artery
-command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
+gem5 compiled Nov 15 2015 14:35:53
+gem5 started Nov 15 2015 14:36:13
+gem5 executing on ribera.cs.wisc.edu, pid 30617
+command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 28761 because Ruby Tester completed
+Exiting @ tick 29631 because Ruby Tester completed
sim_ticks 29631 # Number of ticks simulated
final_tick 29631 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 551942 # Simulator tick rate (ticks/s)
-host_mem_usage 451596 # Number of bytes of host memory used
-host_seconds 0.05 # Real time elapsed on the host
+host_tick_rate 374763 # Simulator tick rate (ticks/s)
+host_mem_usage 446704 # Number of bytes of host memory used
+host_seconds 0.08 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 55872 # Number of bytes read from this memory
mem_ranges=0:268435455
memories=system.mem_ctrls
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
hot_lines=false
memory_size_bits=48
num_of_sequencers=1
+number_of_virtual_networks=5
phys_mem=Null
randomization=true
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[3]
[system.ruby.dir_cntrl0.dmaResponseFromDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[3]
[system.ruby.dir_cntrl0.forwardFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[4]
[system.ruby.dir_cntrl0.requestToDir]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[2]
[system.ruby.dir_cntrl0.responseFromDir]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.responseFromMemory]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0]
type=L1Cache_Controller
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[0]
[system.ruby.l1_cntrl0.mandatoryQueue]
eventq_index=0
ordered=false
randomization=false
-recycle_latency=10
[system.ruby.l1_cntrl0.requestFromCache]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[0]
[system.ruby.l1_cntrl0.responseFromCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
master=system.ruby.network.slave[1]
[system.ruby.l1_cntrl0.responseToCache]
eventq_index=0
ordered=true
randomization=false
-recycle_latency=10
slave=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.sequencer]
int_links=system.ruby.network.int_links0 system.ruby.network.int_links1
netifs=
number_of_virtual_networks=5
-recycle_latency=0
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_link_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.int_links0]
type=SimpleIntLink
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14
-recycle_latency=0
router_id=0
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers0.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14
-recycle_latency=0
router_id=1
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers1.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2]
type=Switch
clk_domain=system.ruby.clk_domain
eventq_index=0
port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19
-recycle_latency=0
router_id=2
virt_nets=5
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers01]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers02]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers03]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers04]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers05]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers06]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers07]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers08]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers09]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers10]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers11]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers12]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers13]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers14]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers15]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers16]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers17]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers18]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.ruby.network.routers2.port_buffers19]
type=MessageBuffer
eventq_index=0
ordered=true
randomization=false
-recycle_latency=0
[system.sys_port_proxy]
type=RubyPortProxy
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
+warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 13 2015 19:05:56
-gem5 started Aug 13 2015 20:15:05
-gem5 executing on artery
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re /home/joel/research/gem5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:36
+gem5 executing on ribera.cs.wisc.edu, pid 29062
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 37801 # Number of ticks simulated
final_tick 37801 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 411997 # Simulator tick rate (ticks/s)
-host_mem_usage 398128 # Number of bytes of host memory used
-host_seconds 0.09 # Real time elapsed on the host
+host_tick_rate 573737 # Simulator tick rate (ticks/s)
+host_mem_usage 444464 # Number of bytes of host memory used
+host_seconds 0.07 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 61504 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
+Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:54:17
-gem5 started Jan 22 2014 17:29:00
-gem5 executing on u200540-lin
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram -re tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-dram
+gem5 compiled Nov 15 2015 14:58:33
+gem5 started Nov 15 2015 14:58:46
+gem5 executing on ribera.cs.wisc.edu, pid 5049
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Exiting @ tick 100000000000 because simulate() limit reached
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 8352384426 # Simulator tick rate (ticks/s)
-host_mem_usage 264628 # Number of bytes of host memory used
-host_seconds 11.97 # Real time elapsed on the host
+host_tick_rate 6195134552 # Simulator tick rate (ticks/s)
+host_mem_usage 261500 # Number of bytes of host memory used
+host_seconds 16.14 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 106649408 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 17 2015 08:02:53
-gem5 started Jun 17 2015 09:01:31
-gem5 executing on e104799-lin
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /work/gem5/outgoing/gem5_2/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
+gem5 compiled Nov 15 2015 14:58:33
+gem5 started Nov 15 2015 14:58:46
+gem5 executing on ribera.cs.wisc.edu, pid 5048
+command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem -re /scratch/nilay/GEM5/gem5/tests/run.py build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 100000000000 # Number of ticks simulated
final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 16291006908 # Simulator tick rate (ticks/s)
-host_mem_usage 266948 # Number of bytes of host memory used
-host_seconds 6.14 # Real time elapsed on the host
+host_tick_rate 12448574230 # Simulator tick rate (ticks/s)
+host_mem_usage 263544 # Number of bytes of host memory used
+host_seconds 8.03 # Real time elapsed on the host
system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu 64 # Number of bytes read from this memory
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-atomic/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 19:22:57
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-atomic
-Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-atomic/smred.sav
-Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-atomic/smred.sv2
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:28:27
+gem5 executing on ribera.cs.wisc.edu, pid 29052
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 19:23:43
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-timing
-Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-timing/smred.sav
-Couldn't unlink build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/simple-timing/smred.sv2
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:30
+gem5 executing on ribera.cs.wisc.edu, pid 29102
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
-122 123 124 Exiting @ tick 118729316000 because target called exit()
+122 123 124 Exiting @ tick 118762761500 because target called exit()
sim_ticks 118762761500 # Number of ticks simulated
final_tick 118762761500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1561278 # Simulator instruction rate (inst/s)
-host_op_rate 1561278 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2017578166 # Simulator tick rate (ticks/s)
-host_mem_usage 301004 # Number of bytes of host memory used
-host_seconds 58.86 # Real time elapsed on the host
+host_inst_rate 962338 # Simulator instruction rate (inst/s)
+host_op_rate 962338 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1243592305 # Simulator tick rate (ticks/s)
+host_mem_usage 296636 # Number of bytes of host memory used
+host_seconds 95.50 # Real time elapsed on the host
sim_insts 91903056 # Number of instructions simulated
sim_ops 91903056 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 18:37:39
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/simple-atomic
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:24
+gem5 executing on ribera.cs.wisc.edu, pid 11057
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5fbc6c0
info: Entering event queue @ 0. Starting simulation...
TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
-122 123 124 Exiting @ tick 103106766000 because target called exit()
+122 123 124 Exiting @ tick 99596491500 because target called exit()
sim_ticks 99596491500 # Number of ticks simulated
final_tick 99596491500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1968226 # Simulator instruction rate (inst/s)
-host_op_rate 2074827 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1137600357 # Simulator tick rate (ticks/s)
-host_mem_usage 306644 # Number of bytes of host memory used
-host_seconds 87.55 # Real time elapsed on the host
+host_inst_rate 1150155 # Simulator instruction rate (inst/s)
+host_op_rate 1212449 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 664769571 # Simulator tick rate (ticks/s)
+host_mem_usage 303552 # Number of bytes of host memory used
+host_seconds 149.82 # Real time elapsed on the host
sim_insts 172317410 # Number of instructions simulated
sim_ops 181650342 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.isa]
type=ArmISA
+decoderFlavour=Generic
eventq_index=0
fpsid=1090793632
id_aa64afr0_el1=0
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2014 12:08:08
-gem5 started Jan 23 2014 18:39:21
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/simple-timing
+gem5 compiled Nov 15 2015 15:24:37
+gem5 started Nov 15 2015 15:25:11
+gem5 executing on ribera.cs.wisc.edu, pid 11027
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x5d0ed00
info: Entering event queue @ 0. Starting simulation...
TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
-122 123 124 Exiting @ tick 232072304000 because target called exit()
+122 123 124 Exiting @ tick 230197694500 because target called exit()
sim_ticks 230197694500 # Number of ticks simulated
final_tick 230197694500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1005681 # Simulator instruction rate (inst/s)
-host_op_rate 1060242 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1347195966 # Simulator tick rate (ticks/s)
-host_mem_usage 319496 # Number of bytes of host memory used
-host_seconds 170.87 # Real time elapsed on the host
+host_inst_rate 733775 # Simulator instruction rate (inst/s)
+host_op_rate 773584 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 982953876 # Simulator tick rate (ticks/s)
+host_mem_usage 313544 # Number of bytes of host memory used
+host_seconds 234.19 # Real time elapsed on the host
sim_insts 171842484 # Number of instructions simulated
sim_ops 181165371 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:48:57
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-atomic -re tests/run.py build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-atomic
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-atomic/smred.sav
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-atomic/smred.sv2
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:22
+gem5 executing on ribera.cs.wisc.edu, pid 7765
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simout
+Redirecting stderr to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:04:27
-gem5 started Jan 22 2014 19:50:23
-gem5 executing on u200540-lin
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing -re tests/run.py build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sav
-Couldn't unlink build/SPARC/tests/opt/long/se/70.twolf/sparc/linux/simple-timing/smred.sv2
+gem5 compiled Nov 15 2015 15:07:43
+gem5 started Nov 15 2015 15:08:10
+gem5 executing on ribera.cs.wisc.edu, pid 7747
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
info: Increasing stack size by one page.
-122 123 124 Exiting @ tick 270563082000 because target called exit()
+122 123 124 Exiting @ tick 270599529500 because target called exit()
sim_ticks 270599529500 # Number of ticks simulated
final_tick 270599529500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1167307 # Simulator instruction rate (inst/s)
-host_op_rate 1167308 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1632884817 # Simulator tick rate (ticks/s)
-host_mem_usage 300512 # Number of bytes of host memory used
-host_seconds 165.72 # Real time elapsed on the host
+host_inst_rate 819670 # Simulator instruction rate (inst/s)
+host_op_rate 819671 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1146593662 # Simulator tick rate (ticks/s)
+host_mem_usage 296444 # Number of bytes of host memory used
+host_seconds 236.00 # Real time elapsed on the host
sim_insts 193444518 # Number of instructions simulated
sim_ops 193444756 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
+Redirecting stdout to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:10:34
-gem5 started Jan 22 2014 22:11:10
-gem5 executing on u200540-lin
-command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-atomic
-Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-atomic/smred.sav
-Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-atomic/smred.sv2
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:48
+gem5 executing on ribera.cs.wisc.edu, pid 9904
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
sim_ticks 131393279000 # Number of ticks simulated
final_tick 131393279000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 851639 # Simulator instruction rate (inst/s)
-host_op_rate 1427424 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 847267215 # Simulator tick rate (ticks/s)
-host_mem_usage 272248 # Number of bytes of host memory used
-host_seconds 155.08 # Real time elapsed on the host
+host_inst_rate 842999 # Simulator instruction rate (inst/s)
+host_op_rate 1412943 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 838671761 # Simulator tick rate (ticks/s)
+host_mem_usage 327992 # Number of bytes of host memory used
+host_seconds 156.67 # Real time elapsed on the host
sim_insts 132071193 # Number of instructions simulated
sim_ops 221363385 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
+Redirecting stdout to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/simout
+Redirecting stderr to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 17:10:34
-gem5 started Jan 22 2014 22:12:53
-gem5 executing on u200540-lin
-command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-timing
-Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-timing/smred.sav
-Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-timing/smred.sv2
+gem5 compiled Nov 15 2015 15:16:56
+gem5 started Nov 15 2015 15:17:26
+gem5 executing on ribera.cs.wisc.edu, pid 9886
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
-122 123 124 Exiting @ tick 250953957000 because target called exit()
+122 123 124 Exiting @ tick 250987138500 because target called exit()
sim_ticks 250987138500 # Number of ticks simulated
final_tick 250987138500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 735776 # Simulator instruction rate (inst/s)
-host_op_rate 1233228 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1398263201 # Simulator tick rate (ticks/s)
-host_mem_usage 343356 # Number of bytes of host memory used
-host_seconds 179.50 # Real time elapsed on the host
+host_inst_rate 528960 # Simulator instruction rate (inst/s)
+host_op_rate 886586 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1005232323 # Simulator tick rate (ticks/s)
+host_mem_usage 338112 # Number of bytes of host memory used
+host_seconds 249.68 # Real time elapsed on the host
sim_insts 132071193 # Number of instructions simulated
sim_ops 221363385 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
projects / gem5.git / commitdiff