add additional vhdl-vs-nmigen screenshots to openpower2020

diff --git a/simple_v_extension/2020-09-10_11-46.png b/simple_v_extension/2020-09-10_11-46.png
new file mode 100644 (file)
index 0000000..a4c40f4
Binary files /dev/null and b/simple_v_extension/2020-09-10_11-46.png differ

diff --git a/simple_v_extension/2020-09-10_11-53.png b/simple_v_extension/2020-09-10_11-53.png
new file mode 100644 (file)
index 0000000..fc637df
Binary files /dev/null and b/simple_v_extension/2020-09-10_11-53.png differ

diff --git a/simple_v_extension/openpower_2020.tex b/simple_v_extension/openpower_2020.tex
index f2b61421540143faf2600a4666c9987e7eb914ae..de93941542fe6c5e4f26dbec12a1ccc0cfc6f78c 100644 (file)
--- a/simple_v_extension/openpower_2020.tex
+++ b/simple_v_extension/openpower_2020.tex
@@ -198,6 +198,22 @@
   \end{itemize}
 }
 
+\frame{\frametitle{nmigen (dynamic) vs VHDL (static)}
+
+\begin{center}
+\includegraphics[width=1.0\textwidth]{2020-09-10_11-53.png}
+\end{center}
+
+}
+
+\frame{\frametitle{nmigen PowerISA Decoder}
+
+\begin{center}
+\includegraphics[width=1.0\textwidth]{2020-09-10_11-46.png}
+\end{center}
+
+}
+
 \frame{\frametitle{nmigen PowerISA Decoder}
 
 \begin{center}
@@ -205,6 +221,7 @@
 \end{center}
 
 }
+
 \frame{\frametitle{Summary}
 
  \begin{itemize}