from liteeth.core.udp import LiteEthUDP
class LiteEthIPCore(Module, AutoCSR):
- def __init__(self, phy, mac_address, ip_address):
+ def __init__(self, phy, mac_address, ip_address, clk_freq):
self.submodules.mac = LiteEthMAC(phy, 8, interface="crossbar", with_hw_preamble_crc=True)
- self.submodules.arp = LiteEthARP(self.mac, mac_address, ip_address)
+ self.submodules.arp = LiteEthARP(self.mac, mac_address, ip_address, clk_freq)
self.submodules.ip = LiteEthIP(self.mac, mac_address, ip_address, self.arp.table)
self.sink, self.source = self.ip.sink, self.ip.source
class LiteEthUDPIPCore(LiteEthIPCore):
- def __init__(self, phy, mac_address, ip_address):
- LiteEthIPCore.__init__(self, phy, mac_address, ip_address)
+ def __init__(self, phy, mac_address, ip_address, clk_freq):
+ LiteEthIPCore.__init__(self, phy, mac_address, ip_address, clk_freq)
self.submodules.udp = LiteEthUDP(self.ip, ip_address)
self.sink, self.source = self.udp.sink, self.udp.source
)
class LiteEthARPTable(Module):
- def __init__(self):
- self.sink = sink = Sink(_arp_table_layout) # from arp_rx
+ def __init__(self, clk_freq):
+ self.sink = sink = Sink(_arp_table_layout) # from arp_rx
self.source = source = Source(_arp_table_layout) # to arp_tx
# Request/Response interface
self.request = request = Sink(arp_table_request_layout)
self.response = response = Source(arp_table_response_layout)
###
- request_timeout = Timeout(166000000//10) # XXX use clk_freq
+ request_timeout = Timeout(clk_freq//10)
request_pending = FlipFlop()
- request_ip_address = FlipFlop(32, reset=0xffffffff) # XXX add cached_valid?
+ request_ip_address = FlipFlop(32, reset=0xffffffff)
self.submodules += request_timeout, request_pending, request_ip_address
self.comb += [
request_timeout.ce.eq(request_pending.q),
request_ip_address.d.eq(request.ip_address)
]
- # Note: Store only one ip/mac couple, replace this with
- # a real ARP table
+ # Note: Only store 1 IP/MAC couple, can be improved with a real
+ # table in the future to improve performance when packet are
+ # targeting multiple destinations.
update = Signal()
cached_valid = Signal()
cached_ip_address = Signal(32)
cached_mac_address = Signal(48)
+ cached_timeout = Timeout(clk_freq*10)
+ self.submodules += cached_timeout
self.submodules.fsm = fsm = FSM(reset_state="IDLE")
fsm.act("IDLE",
If(update,
cached_valid.eq(1),
cached_ip_address.eq(sink.ip_address),
- cached_mac_address.eq(sink.mac_address)
+ cached_mac_address.eq(sink.mac_address),
+ cached_timeout.reset.eq(1)
+ ).Else(
+ cached_timeout.ce.eq(1),
+ If(cached_timeout.reached,
+ cached_valid.eq(0)
+ )
)
]
found = Signal()
fsm.act("CHECK_TABLE",
- # XXX: add a live time for cached_mac_address
If(cached_valid,
If(request_ip_address.q == cached_ip_address,
request_ip_address.reset.eq(1),
)
class LiteEthARP(Module):
- def __init__(self, mac, mac_address, ip_address):
+ def __init__(self, mac, mac_address, ip_address, clk_freq):
self.submodules.tx = LiteEthARPTX(mac_address, ip_address)
self.submodules.rx = LiteEthARPRX(mac_address, ip_address)
- self.submodules.table = LiteEthARPTable()
+ self.submodules.table = LiteEthARPTable(clk_freq)
self.comb += [
Record.connect(self.rx.source, self.table.sink),
Record.connect(self.table.source, self.tx.sink)
self.submodules.arp_model = arp.ARP(self.mac_model, mac_address, ip_address, debug=False)
self.submodules.mac = LiteEthMAC(self.phy_model, dw=8, with_hw_preamble_crc=True)
- self.submodules.arp = LiteEthARP(self.mac, mac_address, ip_address)
+ self.submodules.arp = LiteEthARP(self.mac, mac_address, ip_address, 100000)
# use sys_clk for each clock_domain
self.clock_domains.cd_eth_rx = ClockDomain()
self.submodules.arp_model = arp.ARP(self.mac_model, mac_address, ip_address, debug=False)
self.submodules.ip_model = ip.IP(self.mac_model, mac_address, ip_address, debug=False, loopback=True)
- self.submodules.ip = LiteEthIPCore(self.phy_model, mac_address, ip_address)
+ self.submodules.ip = LiteEthIPCore(self.phy_model, mac_address, ip_address, 100000)
# use sys_clk for each clock_domain
self.clock_domains.cd_eth_rx = ClockDomain()
self.submodules.ip_model = ip.IP(self.mac_model, mac_address, ip_address, debug=False, loopback=False)
self.submodules.udp_model = udp.UDP(self.ip_model, ip_address, debug=False, loopback=True)
- self.submodules.udp_ip = LiteEthUDPIPCore(self.phy_model, mac_address, ip_address)
+ self.submodules.udp_ip = LiteEthUDPIPCore(self.phy_model, mac_address, ip_address, 100000)
self.submodules.streamer = PacketStreamer(eth_udp_user_description(8))
self.submodules.logger = PacketLogger(eth_udp_user_description(8))
self.comb += [
# Ethernet PHY and UDP/IP
self.submodules.ethphy = LiteEthPHYGMII(platform.request("eth_clocks"), platform.request("eth"))
- self.submodules.udpip_core = LiteEthUDPIPCore(self.ethphy, 0x10e2d5000000, convert_ip("192.168.1.40"))
+ self.submodules.udpip_core = LiteEthUDPIPCore(self.ethphy, 0x10e2d5000000, convert_ip("192.168.1.40"), clk_freq)
# BIST
self.submodules.bist_generator = UDPIPBISTGenerator()