(no commit message)

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index 4095e8d4753cc9f3311bec15847e3fb7d20a6548..1288cfaced09079e612af11f0fa05dc671694af6 100644 (file)
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -51,7 +51,8 @@ and TLB lookup.
 
 **Changes**
 
-Add the following instructions to Book I as a new Section 4.6.2.1
+Add the following entries to the Appendices and instructions of
+Book I as a new Section 4.6.2.1
 
 Notes:
 
@@ -65,12 +66,23 @@ Notes:
   lookups are mentioned for completeness but not included as part
   of this RFC. Another Stakeholder with a vested interest in 64-bit
   Prefixed instructions may wish to consider submitting them.
-4. `fishmv` as a Read-Modify-Write saves five unnecessary bits, making
+4. `fishmv` as a Read-Modify-Write saves five potential bits, making
   the difference between a VA/DX-Form and requiring an entire Major
   Opcode.
 
 ----------------
 
+# Appendices
+
+    Appendix D Power ISA sorted by opcode
+    Appendix E Power ISA sorted by version
+    Appendix F Power ISA sorted by mnemonic
+
+| Form | Book | Page | Version | mnemonic | Description |
+|------|------|------|---------|----------|-------------|
+| DX   | I    | #    | 3.0B    | fmvis    | Floating-point Move Immediate, Single |
+| DX   | I    | #    | 3.0B    | fishmv  | Floating-point Immediate, Second-half Move |
+
 \newpage{}
 
 # Floating-Point Move Immediate
@@ -157,13 +169,3 @@ fmvis f4, 0x3F80 # writes +1.0 to f4
 fishmv f4, 0x8000 # writes +1.00390625 to f4
 ```
 
-# Appendices
-
-    Appendix D Power ISA sorted by opcode
-    Appendix E Power ISA sorted by version
-    Appendix F Power ISA sorted by mnemonic
-
-| Form | Book | Page | Version | mnemonic | Description |
-|------|------|------|---------|----------|-------------|
-| DX   | I    | #    | 3.0B    | fmvis    | Floating-point Move Immediate, Single |
-| DX   | I    | #    | 3.0B    | fishmv  | Floating-point Immediate, Second-half Move |