add svindex to power_enums.py, minor_22.csv

https://bugs.libre-soc.org/show_bug.cgi?id=867

diff --git a/openpower/isatables/minor_22.csv b/openpower/isatables/minor_22.csv
index 6c7a5dce2a7496868f3628b6feb9d43beef3118b..8d01d5a41764da378c727164c17fc9fbbd070358 100644 (file)
--- a/openpower/isatables/minor_22.csv
+++ b/openpower/isatables/minor_22.csv
@@ -3,6 +3,7 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou
 # Simple-V Scalable Vector
 -----11011-,VL,OP_SETVL,RA_OR_ZERO,NONE,NONE,RT_OR_ZERO,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,setvl,SVL,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 -----011001,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape,SVM,,1,unofficial until submitted and approved/renumbered by the opf isa wg
+-----101001,VL,OP_SVINDEX,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svindex,SVI,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 -----111001,VL,OP_SVREMAP,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svremap,SVRM,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 -----10011-,VL,OP_SVSTEP,NONE,NONE,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,svstep,SVL,,1,unofficial until submitted and approved/renumbered by the opf isa wg
 # A/V bitmanip

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 669d547f5a0a87c69902e53a2e023a06b5259eb5..39338032708f8b574d5a299a7ea8d9d3f0ae8101 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -122,10 +122,11 @@ class Form(Enum):
     SVD = 30  # Simple-V for LD/ST bit-reverse, variant of D-Form
     SVDS = 31  # Simple-V for LD/ST bit-reverse, variant of DS-Form
     SVM = 32  # Simple-V SHAPE mode - TEMPORARY TEMPORARY TEMPORARY
-    SVRM = 33  # Simple-V REMAP mode - TEMPORARY TEMPORARY TEMPORARY
+    SVRM = 33  # Simple-V REMAP mode
     TLI = 34  # ternlogi
     XB = 35
     BM2 = 36 # bmask
+    SVI = 37  # Simple-V Index Mode
 
 # Simple-V svp64 fields https://libre-soc.org/openpower/sv/svp64/
 
@@ -328,6 +329,7 @@ _insns = [
     "rlwimi", "rlwinm",    "rlwnm",
     "setb",
     "setvl",  # https://libre-soc.org/openpower/sv/setvl
+    "svindex",  # https://libre-soc.org/openpower/sv/remap
     "svremap",  # https://libre-soc.org/openpower/sv/remap - TEMPORARY
     "svshape",  # https://libre-soc.org/openpower/sv/remap
     "svstep",  # https://libre-soc.org/openpower/sv/setvl
@@ -458,6 +460,7 @@ class MicrOp(Enum):
     OP_ABSADD = 92
     OP_CPROP = 93
     OP_BMASK = 94
+    OP_SVINDEX = 95
 
 
 @unique