gas/testsuite/
authorRoland McGrath <roland@gnu.org>
Mon, 6 Aug 2012 22:08:25 +0000 (22:08 +0000)
committerRoland McGrath <roland@gnu.org>
Mon, 6 Aug 2012 22:08:25 +0000 (22:08 +0000)
* gas/i386/x86-64-stack.s: Add cases for push segment register.
* gas/i386/x86-64-stack.d: Updated.
* gas/i386/x86-64-stack-suffix.d: Updated.
* gas/i386/x86-64-stack-intel.d: Updated.
* gas/i386/ilp32/x86-64-stack.d: Updated.
* gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
* gas/i386/ilp32/x86-64-stack-intel.d: Updated.

opcodes/
* i386-dis.c (print_insn): Print spaces between multiple excess
prefixes.  Return actual number of excess prefixes consumed,
not always one.

* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.

gas/testsuite/ChangeLog
gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d
gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d
gas/testsuite/gas/i386/ilp32/x86-64-stack.d
gas/testsuite/gas/i386/x86-64-stack-intel.d
gas/testsuite/gas/i386/x86-64-stack-suffix.d
gas/testsuite/gas/i386/x86-64-stack.d
gas/testsuite/gas/i386/x86-64-stack.s
opcodes/ChangeLog
opcodes/i386-dis.c

index 80c03cfc252f70955b9b22ec47f4d9fc5720def1..026750e11603446165ab955dc2f825c707695db8 100644 (file)
 
 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 
+       * gas/i386/x86-64-stack.s: Add cases for push segment register.
+       * gas/i386/x86-64-stack.d: Updated.
+       * gas/i386/x86-64-stack-suffix.d: Updated.
+       * gas/i386/x86-64-stack-intel.d: Updated.
+       * gas/i386/ilp32/x86-64-stack.d: Updated.
+       * gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
+       * gas/i386/ilp32/x86-64-stack-intel.d: Updated.
+
        * gas/i386/x86-64-stack.s: Add cases for push immediate.
        * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated.
        * gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated.
index fbcada2f8175d84d129872c77b9626703e083ce1..f98b8cd9dc3e536082cb7d0657561405575f9913 100644 (file)
@@ -56,5 +56,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                add    eax,DWORD PTR \[rax\+rcx\*2\]
 [      ]*[a-f0-9]+:    68 01 02 03 04          push   0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W push 0x4030201
+[      ]*[a-f0-9]+:    0f a8                   push   gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W push gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W push gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index dd2f3da3bc835f1c4d712849939d3e891881ab80..cecab6da35c39ff58e224b891b9e0a8d98c9e23c 100644 (file)
@@ -56,5 +56,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                addl   \(%rax,%rcx,2\),%eax
 [      ]*[a-f0-9]+:    68 01 02 03 04          pushq  \$0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W pushq \$0x4030201
+[      ]*[a-f0-9]+:    0f a8                   pushq  %gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  %gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W pushq %gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W pushq %gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw %gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index 9f4553ab98d7706ad182f60dac1cfc5b5e96b0ca..fd649e2d9aa5b1d2fda37dbf5319b2961d68cfb4 100644 (file)
@@ -56,5 +56,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                add    \(%rax,%rcx,2\),%eax
 [      ]*[a-f0-9]+:    68 01 02 03 04          pushq  \$0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W pushq \$0x4030201
+[      ]*[a-f0-9]+:    0f a8                   pushq  %gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  %gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W pushq %gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W pushq %gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw %gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index cb9ee89987902ad6004adb0fbcb2fc5ce4fc4192..1902337e2fd4874a1b4507b6b98622e58562bc2d 100644 (file)
@@ -56,5 +56,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                add    eax,DWORD PTR \[rax\+rcx\*2\]
 [      ]*[a-f0-9]+:    68 01 02 03 04          push   0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W push 0x4030201
+[      ]*[a-f0-9]+:    0f a8                   push   gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W push gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W push gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B push gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index a0b94d0556caca033ad488eb555667deef4950a3..1681d79775f8225633eaf2010afa3eea656a5c56 100644 (file)
@@ -56,5 +56,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                addl   \(%rax,%rcx,2\),%eax
 [      ]*[a-f0-9]+:    68 01 02 03 04          pushq  \$0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W pushq \$0x4030201
+[      ]*[a-f0-9]+:    0f a8                   pushq  %gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  %gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W pushq %gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W pushq %gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw %gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index 76f71514e1257cc7149a30963388bae920751078..760d76981055c9f54de5914ab30efc7b437976bb 100644 (file)
@@ -55,5 +55,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    03 04 48                add    \(%rax,%rcx,2\),%eax
 [      ]*[a-f0-9]+:    68 01 02 03 04          pushq  \$0x4030201
 [      ]*[a-f0-9]+:    66 48 68 01 02 03 04    data32 rex.W pushq \$0x4030201
+[      ]*[a-f0-9]+:    0f a8                   pushq  %gs
+[      ]*[a-f0-9]+:    66 0f a8                pushw  %gs
+[      ]*[a-f0-9]+:    48 0f a8                rex.W pushq %gs
+[      ]*[a-f0-9]+:    66 48 0f a8             data32 rex.W pushq %gs
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 41 0f a8             rex.B pushw %gs
+[      ]*[a-f0-9]+:    48                      rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
+[      ]*[a-f0-9]+:    66 48                   data16 rex.W
+[      ]*[a-f0-9]+:    41 0f a8                rex.B pushq %gs
 [      ]*[a-f0-9]+:    90                      nop
 #pass
index 2da658b5f9cd76c3267f49d1a1639979f30ac536..0b8707e3043f2a69c418e54b3ee4838f31e08854 100644 (file)
@@ -29,6 +29,11 @@ _start:
        # push with a 4-byte immediate
        try     0x68, 0x01, 0x02, 0x03, 0x04
 
+       # push a segment register
+       try     0x0f, 0xa8
+       # with extraneous rex.B
+       try     0x41, 0x0f, 0xa8
+
        # This is just to synchronize the disassembly.
        # Any new cases must come before this line!
        nop
index c90599bc658482a03f40446ac6441afdb4c28494..25d53fcf6892821cb4f7666569cc01c6b8a6f07f 100644 (file)
@@ -1,3 +1,11 @@
+2012-08-06  Roland McGrath  <mcgrathr@google.com>
+
+       * i386-dis.c (print_insn): Print spaces between multiple excess
+       prefixes.  Return actual number of excess prefixes consumed,
+       not always one.
+
+       * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
+
 2012-08-06  Roland McGrath  <mcgrathr@google.com>
            Victor Khimenko  <khim@google.com>
            H.J. Lu  <hongjiu.lu@intel.com>
index 43d7ac32e899fc7adb168ec6925a01a448a86914..da5ede57d2ec08ade10947753fd657187b2cd6cb 100644 (file)
@@ -11450,9 +11450,10 @@ print_insn (bfd_vma pc, disassemble_info *info)
       for (i = 0;
           i < (int) ARRAY_SIZE (all_prefixes) && all_prefixes[i];
           i++)
-       (*info->fprintf_func) (info->stream, "%s",
+       (*info->fprintf_func) (info->stream, "%s%s",
+                               i == 0 ? "" : " ",
                               prefix_name (all_prefixes[i], sizeflag));
-      return 1;
+      return i;
     }
 
   insn_codep = codep;
@@ -13471,6 +13472,15 @@ OP_REG (int code, int sizeflag)
 {
   const char *s;
   int add;
+
+  switch (code)
+    {
+    case es_reg: case ss_reg: case cs_reg:
+    case ds_reg: case fs_reg: case gs_reg:
+      oappend (names_seg[code - es_reg]);
+      return;
+    }
+
   USED_REX (REX_B);
   if (rex & REX_B)
     add = 8;
@@ -13483,10 +13493,6 @@ OP_REG (int code, int sizeflag)
     case sp_reg: case bp_reg: case si_reg: case di_reg:
       s = names16[code - ax_reg + add];
       break;
-    case es_reg: case ss_reg: case cs_reg:
-    case ds_reg: case fs_reg: case gs_reg:
-      s = names_seg[code - es_reg + add];
-      break;
     case al_reg: case ah_reg: case cl_reg: case ch_reg:
     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
       USED_REX (0);