{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
- {R_028414_CB_BLEND_RED, 0, 0},
- {R_028418_CB_BLEND_GREEN, 0, 0},
- {R_02841C_CB_BLEND_BLUE, 0, 0},
- {R_028420_CB_BLEND_ALPHA, 0, 0},
{R_0285BC_PA_CL_UCP0_X, 0, 0},
{R_0285C0_PA_CL_UCP0_Y, 0, 0},
{R_0285C4_PA_CL_UCP0_Z, 0, 0},
{R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, 0, 0},
{R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 0, 0},
{GROUP_FORCE_NEW_BLOCK, 0, 0},
- {R_028414_CB_BLEND_RED, 0, 0},
- {R_028418_CB_BLEND_GREEN, 0, 0},
- {R_02841C_CB_BLEND_BLUE, 0, 0},
- {R_028420_CB_BLEND_ALPHA, 0, 0},
{R_0285BC_PA_CL_UCP0_X, 0, 0},
{R_0285C0_PA_CL_UCP0_Y, 0, 0},
{R_0285C4_PA_CL_UCP0_Z, 0, 0},
}
rctx->sample_mask.sample_mask = ~0;
- r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, evergreen_emit_cb_misc_state, 0);
r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6);
+ r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6);
+ r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, evergreen_emit_cb_misc_state, 0);
r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, evergreen_emit_db_misc_state, 7);
r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4);
r600_init_atom(rctx, &rctx->viewport.atom, id++, r600_emit_viewport_state, 8);
{R_028124_CB_CLEAR_GREEN, 0, 0},
{R_028128_CB_CLEAR_BLUE, 0, 0},
{R_02812C_CB_CLEAR_ALPHA, 0, 0},
- {R_028414_CB_BLEND_RED, 0, 0},
- {R_028418_CB_BLEND_GREEN, 0, 0},
- {R_02841C_CB_BLEND_BLUE, 0, 0},
- {R_028420_CB_BLEND_ALPHA, 0, 0},
{R_028424_CB_FOG_RED, 0, 0},
{R_028428_CB_FOG_GREEN, 0, 0},
{R_02842C_CB_FOG_BLUE, 0, 0},
/* Re-emit states. */
r600_atom_dirty(ctx, &ctx->alphatest_state.atom);
+ r600_atom_dirty(ctx, &ctx->blend_color.atom);
r600_atom_dirty(ctx, &ctx->cb_misc_state.atom);
r600_atom_dirty(ctx, &ctx->db_misc_state.atom);
r600_atom_dirty(ctx, &ctx->sample_mask.atom);
#include "r600_resource.h"
#include "evergreen_compute.h"
-#define R600_NUM_ATOMS 22
+#define R600_NUM_ATOMS 23
#define R600_MAX_CONST_BUFFERS 2
#define R600_MAX_CONST_BUFFER_SIZE 4096
bool cb0_export_16bpc; /* from set_framebuffer_state */
};
+struct r600_blend_color {
+ struct r600_atom atom;
+ struct pipe_blend_color state;
+};
+
struct r600_cs_shader_state {
struct r600_atom atom;
struct r600_pipe_compute *shader;
enum r600_pipe_state_id {
R600_PIPE_STATE_BLEND = 0,
- R600_PIPE_STATE_BLEND_COLOR,
R600_PIPE_STATE_CLIP,
R600_PIPE_STATE_SCISSOR,
R600_PIPE_STATE_RASTERIZER,
struct r600_command_buffer start_compute_cs_cmd;
/* Register states. */
struct r600_alphatest_state alphatest_state;
+ struct r600_blend_color blend_color;
struct r600_cb_misc_state cb_misc_state;
struct r600_db_misc_state db_misc_state;
struct r600_seamless_cube_map seamless_cube_map;
/* r600_state_common.c */
void r600_init_common_state_functions(struct r600_context *rctx);
void r600_emit_alphatest_state(struct r600_context *rctx, struct r600_atom *atom);
+void r600_emit_blend_color(struct r600_context *rctx, struct r600_atom *atom);
void r600_emit_stencil_ref(struct r600_context *rctx, struct r600_atom *atom);
void r600_emit_viewport_state(struct r600_context *rctx, struct r600_atom *atom);
void r600_init_atom(struct r600_context *rctx, struct r600_atom *atom, unsigned id,
r600_init_atom(rctx, &rctx->sample_mask.atom, id++, r600_emit_sample_mask, 3);
rctx->sample_mask.sample_mask = ~0;
- r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, r600_emit_cb_misc_state, 0);
r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6);
+ r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6);
+ r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, r600_emit_cb_misc_state, 0);
r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, r600_emit_db_misc_state, 4);
r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4);
r600_init_atom(rctx, &rctx->viewport.atom, id++, r600_emit_viewport_state, 8);
const struct pipe_blend_color *state)
{
struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
- if (rstate == NULL)
- return;
+ rctx->blend_color.state = *state;
+ r600_atom_dirty(rctx, &rctx->blend_color.atom);
+}
- rstate->id = R600_PIPE_STATE_BLEND_COLOR;
- r600_pipe_state_add_reg(rstate, R_028414_CB_BLEND_RED, fui(state->color[0]));
- r600_pipe_state_add_reg(rstate, R_028418_CB_BLEND_GREEN, fui(state->color[1]));
- r600_pipe_state_add_reg(rstate, R_02841C_CB_BLEND_BLUE, fui(state->color[2]));
- r600_pipe_state_add_reg(rstate, R_028420_CB_BLEND_ALPHA, fui(state->color[3]));
+void r600_emit_blend_color(struct r600_context *rctx, struct r600_atom *atom)
+{
+ struct radeon_winsys_cs *cs = rctx->cs;
+ struct pipe_blend_color *state = &rctx->blend_color.state;
- free(rctx->states[R600_PIPE_STATE_BLEND_COLOR]);
- rctx->states[R600_PIPE_STATE_BLEND_COLOR] = rstate;
- r600_context_pipe_state_set(rctx, rstate);
+ r600_write_context_reg_seq(cs, R_028414_CB_BLEND_RED, 4);
+ r600_write_value(cs, fui(state->color[0])); /* R_028414_CB_BLEND_RED */
+ r600_write_value(cs, fui(state->color[1])); /* R_028418_CB_BLEND_GREEN */
+ r600_write_value(cs, fui(state->color[2])); /* R_02841C_CB_BLEND_BLUE */
+ r600_write_value(cs, fui(state->color[3])); /* R_028420_CB_BLEND_ALPHA */
}
static void r600_set_stencil_ref(struct pipe_context *ctx,