radv: fix radv_nir_get_max_workgroup_size when nir=NULL
authorRhys Perry <pendingchaos02@gmail.com>
Mon, 11 Nov 2019 11:16:31 +0000 (11:16 +0000)
committerRhys Perry <pendingchaos02@gmail.com>
Mon, 11 Nov 2019 20:44:12 +0000 (20:44 +0000)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 84a1a2578 ('compiler: pack shader_info from 160 bytes to 96 bytes')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/amd/vulkan/radv_nir_to_llvm.c

index 1ed1a382a371b08cd9a0987e8c7181871246a7fe..c6fd727b7aaa059ec9b4a506cd7daf3db568894f 100644 (file)
@@ -4751,7 +4751,10 @@ radv_nir_get_max_workgroup_size(enum chip_class chip_class,
                                const struct nir_shader *nir)
 {
        const unsigned backup_sizes[] = {chip_class >= GFX9 ? 128 : 64, 1, 1};
-       return radv_get_max_workgroup_size(chip_class, stage, nir ? nir->info.cs.local_size : backup_sizes);
+       unsigned sizes[3];
+       for (unsigned i = 0; i < 3; i++)
+               sizes[i] = nir ? nir->info.cs.local_size[i] : backup_sizes[i];
+       return radv_get_max_workgroup_size(chip_class, stage, sizes);
 }
 
 /* Fixup the HW not emitting the TCS regs if there are no HS threads. */