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+Date: Fri, 05 Jun 2020 18:01:26 +0000
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Hardware Layout
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+X-Bugzilla-Severity: enhancement
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+Message-ID: <bug-55-13-M8VuzsjQOd@https.bugs.libre-soc.org/>
+In-Reply-To: <bug-55-13@https.bugs.libre-soc.org/>
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+Subject: [libre-riscv-dev] [Bug 55] IOpad Cell Library needed with
+ industry-standard GPIO and DDR capability
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