Techmap flops before ABC again

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index cc667b91968c833614d4e8b20fa8e9d0289be313..97464ffe48aabf86f7b3201b75942929dfa58c54 100644 (file)
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -282,7 +282,9 @@ struct SynthXilinxPass : public ScriptPass
                }
 
                if (check_label("map_cells")) {
-                       run("techmap -map +/techmap.v -map +/xilinx/cells_map.v");
+                       run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v ");
+                       run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
+                                       "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
                        run("clean");
                }
 
@@ -299,9 +301,7 @@ struct SynthXilinxPass : public ScriptPass
                        //   has performed any necessary retiming
                        if (!nosrl || help_mode)
                                run("shregmap -minlen 3 -init -params -enpol any_or_none", "(skip if '-nosrl')");
-                       run("techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v -map +/xilinx/cells_map.v");
-                       run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
-                                       "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
+                       run("techmap -map +/xilinx/lut_map.v -map +/xilinx/cells_map.v");
                        run("clean");
                }