ARM: Clean up some redundancy and fault behavior for unimplemented thumb MCR, MRC.

diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa
index 9c64fd37a2ac42a65d0dd0079271ac72de891f9f..328803b8e613df29666c5492e6f23fa677d1d30a 100644 (file)
--- a/src/arch/arm/isa/decoder/thumb.isa
+++ b/src/arch/arm/isa/decoder/thumb.isa
@@ -87,13 +87,7 @@
                     }
                     0x1: decode LTCOPROC {
                         0xa, 0xb: ShortFpTransfer::shortFpTransfer();
-                        default: decode CPNUM {
-                            15: McrMrc15::mcrMrc15();
-                            default: decode HTOPCODE_4 {
-                                0x0: WarnUnimpl::mcr();
-                                0x1: WarnUnimpl::mrc();
-                            }
-                        }
+                        0xf: McrMrc15::mcrMrc15();
                     }
                 }
                 0x3: WarnUnimpl::Advanced_SIMD();