nv50: TIC/TSC fixes and additions
authorChristoph Bumiller <e0425955@student.tuwien.ac.at>
Tue, 28 Jul 2009 22:55:03 +0000 (00:55 +0200)
committerBen Skeggs <bskeggs@redhat.com>
Tue, 28 Jul 2009 23:40:34 +0000 (09:40 +1000)
Red and blue were interchanged in TIC.
Add border color and some formats.

src/gallium/drivers/nv50/nv50_state.c
src/gallium/drivers/nv50/nv50_tex.c
src/gallium/drivers/nv50/nv50_texture.h

index 116866a8e781cb223331c5552ac8f1de8db68e18..c93694c60f5ae67c932332b54fc355055d69f51b 100644 (file)
@@ -205,11 +205,16 @@ nv50_sampler_state_create(struct pipe_context *pipe,
        }
 
        limit = CLAMP(cso->lod_bias, -16.0, 15.0);
-       tsc[1] |= ((int)(limit * 256.0) & 0x1fff) << 11;
+       tsc[1] |= ((int)(limit * 256.0) & 0x1fff) << 12;
 
        tsc[2] |= ((int)CLAMP(cso->max_lod, 0.0, 15.0) << 20) |
                  ((int)CLAMP(cso->min_lod, 0.0, 15.0) << 8);
 
+       tsc[4] = fui(cso->border_color[0]);
+       tsc[5] = fui(cso->border_color[1]);
+       tsc[6] = fui(cso->border_color[2]);
+       tsc[7] = fui(cso->border_color[3]);
+
        sso->normalized = cso->normalized_coords;
        return (void *)sso;
 }
index ff40c2ad81bc30dd17ce6ccd773edbaced668493..46c3073defb428ccb4c22ac64dc92ba3df6dfe6a 100644 (file)
@@ -32,30 +32,30 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
        switch (mt->base.format) {
        case PIPE_FORMAT_A8R8G8B8_UNORM:
                so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
                            NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
                            NV50TIC_0_0_FMT_8_8_8_8);
                break;
        case PIPE_FORMAT_A1R5G5B5_UNORM:
                so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
                            NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
                            NV50TIC_0_0_FMT_1_5_5_5);
                break;
        case PIPE_FORMAT_A4R4G4B4_UNORM:
                so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
                            NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
                            NV50TIC_0_0_FMT_4_4_4_4);
                break;
        case PIPE_FORMAT_R5G6B5_UNORM:
                so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-                           NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+                           NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
                            NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-                           NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+                           NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
                            NV50TIC_0_0_FMT_5_6_5);
                break;
        case PIPE_FORMAT_L8_UNORM:
index aca622c73b10bb53d6b69e82060077168961e8b9..207fb039f70eab9a4d6f1ef104a3e96e77701045 100644 (file)
 #define NV50TIC_0_0_MAPA_C2                                       0x20000000
 #define NV50TIC_0_0_MAPA_C3                                       0x28000000
 #define NV50TIC_0_0_MAPA_ONE                                      0x38000000
-#define NV50TIC_0_0_MAPR_MASK                                     0x07000000
-#define NV50TIC_0_0_MAPR_ZERO                                     0x00000000
-#define NV50TIC_0_0_MAPR_C0                                       0x02000000
-#define NV50TIC_0_0_MAPR_C1                                       0x03000000
-#define NV50TIC_0_0_MAPR_C2                                       0x04000000
-#define NV50TIC_0_0_MAPR_C3                                       0x05000000
-#define NV50TIC_0_0_MAPR_ONE                                      0x07000000
+#define NV50TIC_0_0_MAPB_MASK                                     0x07000000
+#define NV50TIC_0_0_MAPB_ZERO                                     0x00000000
+#define NV50TIC_0_0_MAPB_C0                                       0x02000000
+#define NV50TIC_0_0_MAPB_C1                                       0x03000000
+#define NV50TIC_0_0_MAPB_C2                                       0x04000000
+#define NV50TIC_0_0_MAPB_C3                                       0x05000000
+#define NV50TIC_0_0_MAPB_ONE                                      0x07000000
 #define NV50TIC_0_0_MAPG_MASK                                     0x00e00000
 #define NV50TIC_0_0_MAPG_ZERO                                     0x00000000
 #define NV50TIC_0_0_MAPG_C0                                       0x00400000
 #define NV50TIC_0_0_MAPG_C2                                       0x00800000
 #define NV50TIC_0_0_MAPG_C3                                       0x00a00000
 #define NV50TIC_0_0_MAPG_ONE                                      0x00e00000
-#define NV50TIC_0_0_MAPB_MASK                                     0x001c0000
-#define NV50TIC_0_0_MAPB_ZERO                                     0x00000000
-#define NV50TIC_0_0_MAPB_C0                                       0x00080000
-#define NV50TIC_0_0_MAPB_C1                                       0x000c0000
-#define NV50TIC_0_0_MAPB_C2                                       0x00100000
-#define NV50TIC_0_0_MAPB_C3                                       0x00140000
-#define NV50TIC_0_0_MAPB_ONE                                      0x001c0000
+#define NV50TIC_0_0_MAPR_MASK                                     0x001c0000
+#define NV50TIC_0_0_MAPR_ZERO                                     0x00000000
+#define NV50TIC_0_0_MAPR_C0                                       0x00080000
+#define NV50TIC_0_0_MAPR_C1                                       0x000c0000
+#define NV50TIC_0_0_MAPR_C2                                       0x00100000
+#define NV50TIC_0_0_MAPR_C3                                       0x00140000
+#define NV50TIC_0_0_MAPR_ONE                                      0x001c0000
 #define NV50TIC_0_0_TYPEA_MASK                                    0x00038000
 #define NV50TIC_0_0_TYPEA_UNORM                                   0x00010000
-#define NV50TIC_0_0_TYPER_MASK                                    0x00007000
-#define NV50TIC_0_0_TYPER_UNORM                                   0x00002000
+#define NV50TIC_0_0_TYPEA_SNORM                                   0x00008000
+#define NV50TIC_0_0_TYPEA_FLOAT                                   0x00038000
+#define NV50TIC_0_0_TYPEB_MASK                                    0x00007000
+#define NV50TIC_0_0_TYPEB_UNORM                                   0x00002000
+#define NV50TIC_0_0_TYPEB_SNORM                                   0x00001000
+#define NV50TIC_0_0_TYPEB_FLOAT                                   0x00007000
 #define NV50TIC_0_0_TYPEG_MASK                                    0x00000e00
 #define NV50TIC_0_0_TYPEG_UNORM                                   0x00000400
-#define NV50TIC_0_0_TYPEB_MASK                                    0x000001c0
-#define NV50TIC_0_0_TYPEB_UNORM                                   0x00000080
-#define NV50TIC_0_0_FMT_MASK                                      0x0000003c
+#define NV50TIC_0_0_TYPEG_SNORM                                   0x00000200
+#define NV50TIC_0_0_TYPEG_FLOAT                                   0x00000e00
+#define NV50TIC_0_0_TYPER_MASK                                    0x000001c0
+#define NV50TIC_0_0_TYPER_UNORM                                   0x00000080
+#define NV50TIC_0_0_TYPER_SNORM                                   0x00000040
+#define NV50TIC_0_0_TYPER_FLOAT                                   0x000001c0
+#define NV50TIC_0_0_FMT_MASK                                      0x0000003f
+#define NV50TIC_0_0_FMT_32_32_32_32                               0x00000001
+#define NV50TIC_0_0_FMT_16_16_16_16                               0x00000003
+#define NV50TIC_0_0_FMT_32_32                                     0x00000004
 #define NV50TIC_0_0_FMT_8_8_8_8                                   0x00000008
+#define NV50TIC_0_0_FMT_2_10_10_10                                0x00000009
+#define NV50TIC_0_0_FMT_32                                        0x0000000f
 #define NV50TIC_0_0_FMT_4_4_4_4                                   0x00000012
-#define NV50TIC_0_0_FMT_1_5_5_5                                   0x00000013
+/* #define NV50TIC_0_0_FMT_1_5_5_5                                0x00000013 */
+#define NV50TIC_0_0_FMT_1_5_5_5                                   0x00000014
 #define NV50TIC_0_0_FMT_5_6_5                                     0x00000015
 #define NV50TIC_0_0_FMT_8_8                                       0x00000018
+#define NV50TIC_0_0_FMT_16                                        0x0000001b
 #define NV50TIC_0_0_FMT_8                                         0x0000001d
+#define NV50TIC_0_0_FMT_10_11_11                                  0x00000021
 #define NV50TIC_0_0_FMT_DXT1                                      0x00000024
 #define NV50TIC_0_0_FMT_DXT3                                      0x00000025
 #define NV50TIC_0_0_FMT_DXT5                                      0x00000026
+#define NV50TIC_0_0_FMT_RGTC1                                     0x00000027
+#define NV50TIC_0_0_FMT_RGTC2                                     0x00000028
 
 #define NV50TIC_0_1_OFFSET_LOW_MASK                               0xffffffff
 #define NV50TIC_0_1_OFFSET_LOW_SHIFT                                       0
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE                   0x00000140
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER                 0x00000180
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP                           0x000001c0
+#define NV50TSC_1_0_MAX_ANISOTROPY_MASK                          0x00700000
 
 #define NV50TSC_1_1_MAGF_MASK                                    0x00000003
 #define NV50TSC_1_1_MAGF_NEAREST                                 0x00000001
 #define NV50TSC_1_1_MIPF_NONE                                    0x00000040
 #define NV50TSC_1_1_MIPF_NEAREST                                 0x00000080
 #define NV50TSC_1_1_MIPF_LINEAR                                  0x000000c0
+#define NV50TSC_1_1_LOD_BIAS_MASK                                0x01fff000
 
-#define NV50TSC_1_2_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_2_MIN_LOD_MASK                                 0x00000f00
+#define NV50TSC_1_2_MAX_LOD_MASK                                 0x00f00000
 
 #define NV50TSC_1_3_UNKNOWN_MASK                                 0xffffffff
 
-#define NV50TSC_1_4_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_4_BORDER_COLOR_RED_MASK                        0xffffffff
 
-#define NV50TSC_1_5_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_5_BORDER_COLOR_GREEN_MASK                      0xffffffff
 
-#define NV50TSC_1_6_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_6_BORDER_COLOR_BLUE_MASK                       0xffffffff
 
-#define NV50TSC_1_7_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_7_BORDER_COLOR_ALPHA_MASK                      0xffffffff
 
 #endif