i965: Make the dummy fragment shader work in SIMD16 mode.
authorKenneth Graunke <kenneth@whitecape.org>
Sat, 18 Feb 2012 21:08:29 +0000 (13:08 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Sun, 19 Feb 2012 04:12:46 +0000 (20:12 -0800)
If you're resorting to the dummy shader, you've probably already turned
off SIMD16 mode.  But if you didn't, it would die in a fire.

We could either fail to compile in SIMD16 mode...or just fix it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp

index f9b306457d1abc36feb8679c08d927ee8bda849d..15eae43f487c3a39103d318a288be30b737f0e43 100644 (file)
@@ -1800,16 +1800,18 @@ fs_visitor::emit(fs_inst inst)
 void
 fs_visitor::emit_dummy_fs()
 {
+   int reg_width = c->dispatch_width / 8;
+
    /* Everyone's favorite color. */
-   emit(BRW_OPCODE_MOV, fs_reg(MRF, 2), fs_reg(1.0f));
-   emit(BRW_OPCODE_MOV, fs_reg(MRF, 3), fs_reg(0.0f));
-   emit(BRW_OPCODE_MOV, fs_reg(MRF, 4), fs_reg(1.0f));
-   emit(BRW_OPCODE_MOV, fs_reg(MRF, 5), fs_reg(0.0f));
+   emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 0 * reg_width), fs_reg(1.0f));
+   emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 1 * reg_width), fs_reg(0.0f));
+   emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 2 * reg_width), fs_reg(1.0f));
+   emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 3 * reg_width), fs_reg(0.0f));
 
    fs_inst *write;
    write = emit(FS_OPCODE_FB_WRITE, fs_reg(0), fs_reg(0));
    write->base_mrf = 2;
-   write->mlen = 4;
+   write->mlen = 4 * reg_width;
    write->eot = true;
 }