+
+ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add DF
+ reload patterns if -mvsx-scalar-memory.
+
+ * config/rs6000/vsx.md (vsx_xscvspdp): Allow xscvspdp to be
+ generated, even -mno-vsx-scalar-double was used.
+ (vsx_xscvdpsp_scalar): Likewise.
+ (vsx_xscvspdp_scalar2): Likewise.
+
2012-01-09 Tom de Vries <tom@codesourcery.com>
Andrew Pinski <apinski@cavium.com>
/* Subroutines used for code generation on IBM RS/6000.
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
+ 2012
Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_di_load;
rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_di_store;
rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_di_load;
+ if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)
+ {
+ rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_di_store;
+ rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_di_load;
+ }
}
else
{
rs6000_vector_reload[V4SFmode][1] = CODE_FOR_reload_v4sf_si_load;
rs6000_vector_reload[V2DFmode][0] = CODE_FOR_reload_v2df_si_store;
rs6000_vector_reload[V2DFmode][1] = CODE_FOR_reload_v2df_si_load;
+ if (TARGET_VSX && TARGET_VSX_SCALAR_MEMORY)
+ {
+ rs6000_vector_reload[DFmode][0] = CODE_FOR_reload_df_si_store;
+ rs6000_vector_reload[DFmode][1] = CODE_FOR_reload_df_si_load;
+ }
}
}
;; VSX patterns.
-;; Copyright (C) 2009, 2010, 2011
+;; Copyright (C) 2009, 2010, 2011, 2012
;; Free Software Foundation, Inc.
;; Contributed by Michael Meissner <meissner@linux.vnet.ibm.com>
[(set (match_operand:DF 0 "vsx_register_operand" "=ws,?wa")
(unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa,wa")]
UNSPEC_VSX_CVSPDP))]
- "VECTOR_UNIT_VSX_P (DFmode)"
+ "VECTOR_UNIT_VSX_P (V4SFmode)"
"xscvspdp %x0,%x1"
[(set_attr "type" "fp")])
[(set (match_operand:V4SF 0 "vsx_register_operand" "=wa")
(unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")]
UNSPEC_VSX_CVSPDP))]
- "VECTOR_UNIT_VSX_P (DFmode)"
+ "VECTOR_UNIT_VSX_P (V4SFmode)"
"xscvdpsp %x0,%x1"
[(set_attr "type" "fp")])
[(set (match_operand:SF 0 "vsx_register_operand" "=f")
(unspec:SF [(match_operand:V4SF 1 "vsx_register_operand" "wa")]
UNSPEC_VSX_CVSPDP))]
- "VECTOR_UNIT_VSX_P (DFmode)"
+ "VECTOR_UNIT_VSX_P (V4SFmode)"
"xscvspdp %x0,%x1"
[(set_attr "type" "fp")])