radeon/vcn: correct target buffer pitch calculation

since the way should be as same as UVD

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index a60b969a273cf198adfb4c12964ebf8798e36af9..51391627d5f4281f7a61e3295d5568a4992323eb 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -631,7 +631,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
        decode->db_pitch = align(dec->base.width, 32);
        decode->db_surf_tile_config = 0;
 
-       decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.bpe;;
+       decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
        decode->dt_uv_pitch = decode->dt_pitch / 2;
 
        decode->dt_tiling_mode = 0;