if (last_n && is_barrier(last_n)) {
n->flags |= IR3_INSTR_SS | IR3_INSTR_SY;
last_input_needs_ss = false;
+ regmask_init(&state->needs_ss_war);
+ regmask_init(&state->needs_ss);
+ regmask_init(&state->needs_sy);
}
- if (last_n && opc_cat(last_n->opc) == 0 && opc_op(last_n->opc) == 13)
+ if (last_n && (last_n->opc == OPC_CONDEND)) {
n->flags |= IR3_INSTR_SS;
+ regmask_init(&state->needs_ss_war);
+ regmask_init(&state->needs_ss);
+ }
/* NOTE: consider dst register too.. it could happen that
* texture sample instruction (for example) writes some