(no commit message)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index b33e80a334d783edb92f08e79a7fd627b61a5ee2..eafe63a93effd83bc9b422bfb1fef8e78a895f95 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -129,7 +129,7 @@ double check that instructions didn't need 3 inputs.
 | NN | RT | RA  | RB  | 1  | itype | 0101 110 |Rc| xperm |
 | NN | RA | RB  | RC  | 0  | itype | 1001 110 |Rc| av minmax |
 | NN | RA | RB  | RC  | 1  |   00  | 1001 110 |Rc| av abss |
-| NN | RA | RB  | RC  | 1  |   01  | 1001 110 |Rc| av absu|
+| NN | RA | RB  | RC  | 1  |   01  | 1001 110 |Rc| av absu |
 | NN | RA | RB  |     | 1  |   10  | 1001 110 |Rc| av avgadd |
 | NN | RA | RB  |     | 1  |   11  | 1001 110 |Rc| rsvd |
 | NN | RT |     |     |    |       | 1101 110 |Rc| rsvd |
@@ -214,7 +214,9 @@ another mode selection would be CRs not Ints.
                              crregs[BC][i])
 
 
-# int min/max
+# int ops
+
+## min/max
 
 required for the [[sv/av_opcodes]]
 
@@ -237,7 +239,7 @@ uint_xlen_t maxu(uint_xlen_t rs1, uint_xlen_t rs2)
 }
 ```
 
-# int average
+## average
 
 required for the [[sv/av_opcodes]], these exist in Packed SIMD (VSX)
 but not scalar
@@ -248,7 +250,18 @@ uint_xlen_t intavg(uint_xlen_t rs1, uint_xlen_t rs2) {
 }
 ```
 
-## cmix
+## abs
+
+required for the [[sv/av_opcodes]], these exist in Packed SIMD (VSX)
+but not scalar
+
+```
+uint_xlen_t intabs(uint_xlen_t rs1, uint_xlen_t rs2) {
+     return (src1 > src2) ? (src1-src2) : (src2-src1)
+}
+```
+
+# cmix
 
 based on RV bitmanip, covered by ternlog bitops