re PR target/53512 (SH Target: Allow fsca and fsrra for non-SH4A)

	PR target/53512
	* config/sh/sh.md (sincossf3): Fix swapped sin and cos operands.

From-SVN: r193423

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6c2d6ce1791f147e44e5444b4a4cf0a75075d3e3..197ebd4266f801e3d6a92263f41998b30cbdc60f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-12  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/53512
+       * config/sh/sh.md (sincossf3): Fix swapped sin and cos operands.
+
 2012-11-11  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/i386/i386.md (*movti_internal_rex64): Remove "!" from

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 3c9226523d7c6566a59d90b5156d5d06efc8a936..545806d4478291cbdd8f32d1a5567e40e90fef99 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -12433,11 +12433,10 @@ label:
 ;; will be expanded to the sincos pattern and one of the output values will
 ;; remain unused.
 (define_expand "sincossf3"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "")
-       (unspec:SF [(match_operand:SF 2 "fp_arith_reg_operand" "")]
-                  UNSPEC_FSINA))
-   (set (match_operand:SF 1 "nonimmediate_operand" "")
-       (unspec:SF [(match_dup 2)] UNSPEC_FCOSA))]
+  [(set (match_operand:SF 0 "nonimmediate_operand")
+       (unspec:SF [(match_operand:SF 2 "fp_arith_reg_operand")] UNSPEC_FCOSA))
+   (set (match_operand:SF 1 "nonimmediate_operand")
+       (unspec:SF [(match_dup 2)] UNSPEC_FSINA))]
   "TARGET_FPU_ANY && TARGET_FSCA"
 {
   rtx scaled = gen_reg_rtx (SFmode);
@@ -12450,8 +12449,8 @@ label:
   emit_sf_insn (gen_fsca (fsca, truncated, sh_fsca_int2sf (),
                          get_fpscr_rtx ()));
 
-  emit_move_insn (operands[0], gen_rtx_SUBREG (SFmode, fsca, 0));
-  emit_move_insn (operands[1], gen_rtx_SUBREG (SFmode, fsca, 4));
+  emit_move_insn (operands[0], gen_rtx_SUBREG (SFmode, fsca, 4));
+  emit_move_insn (operands[1], gen_rtx_SUBREG (SFmode, fsca, 0));
   DONE;
 })