altivec.h (vec_bperm): Change #define.

[gcc]

2016-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.h (vec_bperm): Change #define.
	* config/rs6000/altivec.md (UNSPEC_VBPERMD): New enum constant.
	(altivec_vbpermq2): New define_insn.
	(altivec_vbpermd): Likewise.
	* config/rs6000/rs6000-builtin.def (VBPERMQ2): New monomorphic
	function interface.
	(VBPERMD): Likewise.
	(VBPERM): New polymorphic function interface.
	* config/rs6000/r6000-c.c (altivec_overloaded_builtins_table):
	Add entries for P9V_BUILTIN_VEC_VBPERM.
	* doc/extend.texi: Add interfaces for vec_bperm.

[gcc/testsuite]

2016-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-builtin-8.c: Add new form for
	vec_bperm.
	* gcc.target/powerpc/p9-vbpermd.c: New file.

From-SVN: r244578

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43ab6209971992a418fffc9d9864ff89904123da..3ec183a266ab2ea163033e469f031034c680d276 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2016-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * config/rs6000/altivec.h (vec_bperm): Change #define.
+       * config/rs6000/altivec.md (UNSPEC_VBPERMD): New enum constant.
+       (altivec_vbpermq2): New define_insn.
+       (altivec_vbpermd): Likewise.
+       * config/rs6000/rs6000-builtin.def (VBPERMQ2): New monomorphic
+       function interface.
+       (VBPERMD): Likewise.
+       (VBPERM): New polymorphic function interface.
+       * config/rs6000/r6000-c.c (altivec_overloaded_builtins_table):
+       Add entries for P9V_BUILTIN_VEC_VBPERM.
+       * doc/extend.texi: Add interfaces for vec_bperm.
+
 2017-01-18  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
        * config/s390/s390-c.c (s390_expand_overloaded_builtin): Downcase

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 790298dc41566a0ace6417be738eb424ad21f888..d2961d09d3fc02a3fc1b895fe08a350d8f9a1896 100644 (file)
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -351,7 +351,7 @@
 #define vec_vaddudm __builtin_vec_vaddudm
 #define vec_vadduqm __builtin_vec_vadduqm
 #define vec_vbpermq __builtin_vec_vbpermq
-#define vec_bperm __builtin_vec_vbpermq
+#define vec_bperm __builtin_vec_vbperm_api
 #define vec_vclz __builtin_vec_vclz
 #define vec_cntlz __builtin_vec_vclz
 #define vec_vclzb __builtin_vec_vclzb

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 746cddeedcc548b8f2aa803a7bd2c27f869dfe33..d3a9279dacf1bcbc3d8b18eb0a875c91d85f4999 100644 (file)
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -150,6 +150,7 @@
    UNSPEC_VSUBEUQM
    UNSPEC_VSUBECUQ
    UNSPEC_VBPERMQ
+   UNSPEC_VBPERMD
    UNSPEC_BCDADD
    UNSPEC_BCDSUB
    UNSPEC_BCD_OVERFLOW
@@ -3679,8 +3680,26 @@
                     UNSPEC_VBPERMQ))]
   "TARGET_P8_VECTOR"
   "vbpermq %0,%1,%2"
-  [(set_attr "length" "4")
-   (set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecsimple")])
+
+; One of the vector API interfaces requires returning vector unsigned char.
+(define_insn "altivec_vbpermq2"
+  [(set (match_operand:V16QI 0 "register_operand" "=v")
+       (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
+                      (match_operand:V16QI 2 "register_operand" "v")]
+                     UNSPEC_VBPERMQ))]
+  "TARGET_P8_VECTOR"
+  "vbpermq %0,%1,%2"
+  [(set_attr "type" "vecsimple")])
+
+(define_insn "altivec_vbpermd"
+  [(set (match_operand:V2DI 0 "register_operand" "=v")
+       (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "v")
+                     (match_operand:V16QI 2 "register_operand" "v")]
+                    UNSPEC_VBPERMD))]
+  "TARGET_P9_VECTOR"
+  "vbpermd %0,%1,%2"
+  [(set_attr "type" "vecsimple")])
 
 ;; Decimal Integer operations
 (define_int_iterator UNSPEC_BCD_ADD_SUB [UNSPEC_BCDADD UNSPEC_BCDSUB])

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index f7085f87c85b21320d8a810d75fd72bb79e24b5a..3bbaabb267a586718907b72e103fba8eb0bdde64 100644 (file)
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1811,6 +1811,7 @@ BU_P8V_AV_2 (VMAXUD,              "vmaxud",       CONST,  umaxv2di3)
 BU_P8V_AV_2 (VMRGEW,           "vmrgew",       CONST,  p8_vmrgew)
 BU_P8V_AV_2 (VMRGOW,           "vmrgow",       CONST,  p8_vmrgow)
 BU_P8V_AV_2 (VBPERMQ,          "vbpermq",      CONST,  altivec_vbpermq)
+BU_P8V_AV_2 (VBPERMQ2,         "vbpermq2",     CONST,  altivec_vbpermq2)
 BU_P8V_AV_2 (VPKUDUM,          "vpkudum",      CONST,  altivec_vpkudum)
 BU_P8V_AV_2 (VPKSDSS,          "vpksdss",      CONST,  altivec_vpksdss)
 BU_P8V_AV_2 (VPKUDUS,          "vpkudus",      CONST,  altivec_vpkudus)
@@ -1929,6 +1930,7 @@ BU_P9V_AV_2 (VADUH,               "vaduh",                CONST,  vaduv8hi3)
 BU_P9V_AV_2 (VADUW,            "vaduw",                CONST,  vaduv4si3)
 BU_P9V_AV_2 (VRLWNM,           "vrlwnm",               CONST,  altivec_vrlwnm)
 BU_P9V_AV_2 (VRLDNM,           "vrldnm",               CONST,  altivec_vrldnm)
+BU_P9V_AV_2 (VBPERMD,          "vbpermd",              CONST,  altivec_vbpermd)
 
 /* ISA 3.0 vector overloaded 2 argument functions. */
 BU_P9V_OVERLOAD_2 (VADU,       "vadu")
@@ -1936,6 +1938,7 @@ BU_P9V_OVERLOAD_2 (VADUB, "vadub")
 BU_P9V_OVERLOAD_2 (VADUH,      "vaduh")
 BU_P9V_OVERLOAD_2 (VADUW,      "vaduw")
 BU_P9V_OVERLOAD_2 (RLNM,       "rlnm")
+BU_P9V_OVERLOAD_2 (VBPERM,     "vbperm_api")
 
 /* ISA 3.0 3-argument vector functions.  */
 BU_P9V_AV_3 (VRLWMI,           "vrlwmi",               CONST,  altivec_vrlwmi)

diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index a1da94e95ad92b5a0743cc990b1f4eebc7ef18d8..19db6c81bab714aae24aaeaed2c4b9895004cabb 100644 (file)
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -4204,6 +4204,16 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
     RS6000_BTI_unsigned_V1TI, 0 },
 
+  { P9V_BUILTIN_VEC_VBPERM, P9V_BUILTIN_VBPERMD,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V1TI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+  { P9V_BUILTIN_VEC_VBPERM, P8V_BUILTIN_VBPERMQ2,
+    RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
+    RS6000_BTI_unsigned_V16QI, 0 },
+
   { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,
     RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
   { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ,

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 7e98397b344237986a52705a78a67334077c9b01..e2fc35a44d853d3c36dd4a7a72c1da54c6995705 100644 (file)
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -17836,6 +17836,10 @@ vector unsigned long long vec_vaddudm (vector unsigned long long,
 vector long long vec_vbpermq (vector signed char, vector signed char);
 vector long long vec_vbpermq (vector unsigned char, vector unsigned char);
 
+vector unsigned char vec_bperm (vector unsigned char, vector unsigned char);
+vector unsigned long long vec_bperm (vector unsigned __int128,
+                                     vector unsigned char);
+
 vector long long vec_cntlz (vector long long);
 vector unsigned long long vec_cntlz (vector unsigned long long);
 vector int vec_cntlz (vector int);
@@ -18004,6 +18008,9 @@ If the ISA 3.0 instruction set additions (@option{-mcpu=power9})
 are available:
 
 @smallexample
+vector unsigned long long vec_bperm (vector unsigned long long,
+                                     vector unsigned char);
+
 vector bool char vec_cmpne (vector bool char, vector bool char);
 vector bool short vec_cmpne (vector bool short, vector bool short);
 vector bool int vec_cmpne (vector bool int, vector bool int);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6cde48793876e2fca96eff36df181aee79d51a08..08743e9467f99deb115c1a7f6f267ec21c724ba6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * gcc.target/powerpc/p8vector-builtin-8.c: Add new form for
+       vec_bperm.
+       * gcc.target/powerpc/p9-vbpermd.c: New file.
+
 2017-01-18  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
        * gcc.target/s390/htm-builtins-compile-2.c (must_not_compile1):

diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
index dbb82a35889163c15ca81ea10d0185c78ca43047..33347740d0cae095a2cde7b40ad503f326dc741c 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
+++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c
@@ -38,6 +38,7 @@ void foo (vector unsigned char *vucr,
   *vuxr++ = vec_adde (vuxa, vuxb, vuxc);
   *vsxr++ = vec_addec (vsxa, vsxb, vsxc);
   *vuxr++ = vec_addec (vuxa, vuxb, vuxc);
+  *vucr++ = vec_bperm (vuca, vucb);
   *vulr++ = vec_bperm (vuxa, vucb);
   *vbcr++ = vec_eqv (vbca, vbcb);
   *vbir++ = vec_eqv (vbia, vbib);
@@ -64,7 +65,7 @@ void foo (vector unsigned char *vucr,
 /* { dg-final { scan-assembler-times "vaddcuq" 2 } } */
 /* { dg-final { scan-assembler-times "vaddeuqm" 2 } } */
 /* { dg-final { scan-assembler-times "vaddecuq" 2 } } */
-/* { dg-final { scan-assembler-times "vbpermq" 1 } } */
+/* { dg-final { scan-assembler-times "vbpermq" 2 } } */
 /* { dg-final { scan-assembler-times "xxleqv" 4 } } */
 /* { dg-final { scan-assembler-times "vgbbd" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnand" 4 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c b/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c
new file mode 100644 (file)
index 0000000..fefefdd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vbpermd.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc64*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+/* Verify P9 vector bit-permute doubleword instruction.  */
+
+#include <altivec.h>
+
+vector unsigned long long
+test_vbpermd (vector unsigned long long a, vector unsigned char b)
+{
+  return vec_bperm (a, b);
+}
+
+/* { dg-final { scan-assembler "vbpermd" } } */