radeon/r200/r300: collapse context destruction down to a common path.
authorDave Airlie <airlied@redhat.com>
Thu, 2 Apr 2009 04:25:07 +0000 (14:25 +1000)
committerDave Airlie <airlied@redhat.com>
Thu, 2 Apr 2009 04:44:29 +0000 (14:44 +1000)
Context destruction was nearly the same over all the drivers,
so collapse it down.

34 files changed:
src/mesa/drivers/dri/r200/r200_cmdbuf.c
src/mesa/drivers/dri/r200/r200_context.c
src/mesa/drivers/dri/r200/r200_context.h
src/mesa/drivers/dri/r200/r200_maos.h
src/mesa/drivers/dri/r200/r200_maos_arrays.c
src/mesa/drivers/dri/r200/r200_state.h
src/mesa/drivers/dri/r200/r200_state_init.c
src/mesa/drivers/dri/r200/r200_swtcl.c
src/mesa/drivers/dri/r200/r200_swtcl.h
src/mesa/drivers/dri/r200/r200_tcl.c
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_cmdbuf.h
src/mesa/drivers/dri/r300/r300_context.c
src/mesa/drivers/dri/r300/r300_context.h
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_emit.h
src/mesa/drivers/dri/r300/r300_render.c
src/mesa/drivers/dri/radeon/Makefile
src/mesa/drivers/dri/radeon/radeon_common_context.c
src/mesa/drivers/dri/radeon/radeon_common_context.h
src/mesa/drivers/dri/radeon/radeon_context.c
src/mesa/drivers/dri/radeon/radeon_context.h
src/mesa/drivers/dri/radeon/radeon_dma.c
src/mesa/drivers/dri/radeon/radeon_dma.h
src/mesa/drivers/dri/radeon/radeon_ioctl.c
src/mesa/drivers/dri/radeon/radeon_maos.h
src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
src/mesa/drivers/dri/radeon/radeon_maos_verts.c
src/mesa/drivers/dri/radeon/radeon_screen.c
src/mesa/drivers/dri/radeon/radeon_state.h
src/mesa/drivers/dri/radeon/radeon_state_init.c
src/mesa/drivers/dri/radeon/radeon_swtcl.c
src/mesa/drivers/dri/radeon/radeon_swtcl.h
src/mesa/drivers/dri/radeon/radeon_tcl.c

index 83375c88a7013ce643c8f9b4d1265ddbf5c93d56..3a11a448eca9b4eaa66092df1ae5fdea686a87a2 100644 (file)
@@ -143,18 +143,18 @@ static void r200FireEB(r200ContextPtr rmesa, int vertex_count, int type)
                if (!rmesa->radeon.radeonScreen->kernel_mm) {
                        OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
                        OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
-                       OUT_BATCH_RELOC(rmesa->tcl.elt_dma_offset,
-                                       rmesa->tcl.elt_dma_bo,
-                                       rmesa->tcl.elt_dma_offset,
+                       OUT_BATCH_RELOC(rmesa->radeon.tcl.elt_dma_offset,
+                                       rmesa->radeon.tcl.elt_dma_bo,
+                                       rmesa->radeon.tcl.elt_dma_offset,
                                        RADEON_GEM_DOMAIN_GTT, 0, 0);
                        OUT_BATCH(vertex_count/2);
                } else {
                        OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
                        OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
-                       OUT_BATCH(rmesa->tcl.elt_dma_offset);
+                       OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
                        OUT_BATCH(vertex_count/2);
                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                                             rmesa->tcl.elt_dma_bo,
+                                             rmesa->radeon.tcl.elt_dma_bo,
                                              RADEON_GEM_DOMAIN_GTT, 0, 0);
                }
                END_BATCH();
@@ -176,12 +176,12 @@ void r200FlushElts(GLcontext *ctx)
 
    nr = elt_used / 2;
 
-   radeon_bo_unmap(rmesa->tcl.elt_dma_bo);
+   radeon_bo_unmap(rmesa->radeon.tcl.elt_dma_bo);
 
    r200FireEB(rmesa, nr, rmesa->tcl.hw_primitive);
 
-   radeon_bo_unref(rmesa->tcl.elt_dma_bo);
-   rmesa->tcl.elt_dma_bo = NULL;
+   radeon_bo_unref(rmesa->radeon.tcl.elt_dma_bo);
+   rmesa->radeon.tcl.elt_dma_bo = NULL;
 
    if (R200_DEBUG & DEBUG_SYNC) {
       fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
@@ -203,14 +203,14 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
    
    radeonEmitState(&rmesa->radeon);
 
-   rmesa->tcl.elt_dma_bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
+   rmesa->radeon.tcl.elt_dma_bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
                                          0, R200_ELT_BUF_SZ, 4,
                                          RADEON_GEM_DOMAIN_GTT, 0);
-   rmesa->tcl.elt_dma_offset = 0;
+   rmesa->radeon.tcl.elt_dma_offset = 0;
    rmesa->tcl.elt_used = min_nr * 2;
 
-   radeon_bo_map(rmesa->tcl.elt_dma_bo, 1);
-   retval = rmesa->tcl.elt_dma_bo->ptr + rmesa->tcl.elt_dma_offset;
+   radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
+   retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
    
 
    if (R200_DEBUG & DEBUG_PRIMS)
@@ -264,79 +264,79 @@ void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset)
     
    if (!rmesa->radeon.radeonScreen->kernel_mm) {
       for (i = 0; i + 1 < nr; i += 2) {
-        OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-                  (rmesa->tcl.aos[i].stride << 8) |
-                  (rmesa->tcl.aos[i + 1].components << 16) |
-                  (rmesa->tcl.aos[i + 1].stride << 24));
+        OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                  (rmesa->radeon.tcl.aos[i].stride << 8) |
+                  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
                        
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[i].bo,
+                        rmesa->radeon.tcl.aos[i].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[i+1].bo,
+                        rmesa->radeon.tcl.aos[i+1].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
       }
       
       if (nr & 1) {
-        OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-                  (rmesa->tcl.aos[nr - 1].stride << 8));
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[nr - 1].bo,
+                        rmesa->radeon.tcl.aos[nr - 1].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
       }
    } else {
       for (i = 0; i + 1 < nr; i += 2) {
-        OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-                  (rmesa->tcl.aos[i].stride << 8) |
-                  (rmesa->tcl.aos[i + 1].components << 16) |
-                  (rmesa->tcl.aos[i + 1].stride << 24));
+        OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                  (rmesa->radeon.tcl.aos[i].stride << 8) |
+                  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
         
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         OUT_BATCH(voffset);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         OUT_BATCH(voffset);
       }
       
       if (nr & 1) {
-        OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-                  (rmesa->tcl.aos[nr - 1].stride << 8));
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         OUT_BATCH(voffset);
       }
       for (i = 0; i + 1 < nr; i += 2) {
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[i+0].bo,
+                              rmesa->radeon.tcl.aos[i+0].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[i+1].bo,
+                              rmesa->radeon.tcl.aos[i+1].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
       }
       if (nr & 1) {
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[nr-1].bo,
+                              rmesa->radeon.tcl.aos[nr-1].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
       }
index 564e168290c052cef1644879d81a50664b0e5854..f80f0d8ac73e260ecef23dd9ed3e39f2e8bd35c4 100644 (file)
@@ -491,61 +491,3 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
 }
 
 
-/* Destroy the device specific context.
- */
-/* Destroy the Mesa and driver specific context data.
- */
-void r200DestroyContext( __DRIcontextPrivate *driContextPriv )
-{
-   GET_CURRENT_CONTEXT(ctx);
-   r200ContextPtr rmesa = (r200ContextPtr) driContextPriv->driverPrivate;
-   r200ContextPtr current = ctx ? R200_CONTEXT(ctx) : NULL;
-
-   /* check if we're deleting the currently bound context */
-   if (rmesa == current) {
-      radeon_firevertices(&rmesa->radeon);
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   /* Free r200 context resources */
-   assert(rmesa); /* should never be null */
-   if ( rmesa ) {
-
-      _swsetup_DestroyContext( rmesa->radeon.glCtx );
-      _tnl_DestroyContext( rmesa->radeon.glCtx );
-      _vbo_DestroyContext( rmesa->radeon.glCtx );
-      _swrast_DestroyContext( rmesa->radeon.glCtx );
-
-      r200DestroySwtcl( rmesa->radeon.glCtx );
-      r200ReleaseArrays( rmesa->radeon.glCtx, ~0 );
-
-      if (rmesa->radeon.dma.current) {
-        radeonReleaseDmaRegion( &rmesa->radeon );
-        rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
-      }
-
-      if (rmesa->radeon.state.scissor.pClipRects) {
-        FREE(rmesa->radeon.state.scissor.pClipRects);
-        rmesa->radeon.state.scissor.pClipRects = NULL;
-      }
-
-      radeonCleanupContext(&rmesa->radeon);
-
-      FREE( rmesa );
-   }
-}
-
-
-
-/* Force the context `c' to be unbound from its buffer.
- */
-GLboolean
-r200UnbindContext( __DRIcontextPrivate *driContextPriv )
-{
-   r200ContextPtr rmesa = (r200ContextPtr) driContextPriv->driverPrivate;
-
-   if (R200_DEBUG & DEBUG_DRI)
-      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, (void *)rmesa->radeon.glCtx);
-
-   return GL_TRUE;
-}
index fcbe725d6fc9cbf20ea0575f4e7cf5597ceb9e1d..6267293817d951d67a8987617d99e4f09f606001 100644 (file)
@@ -526,14 +526,8 @@ struct r200_state {
 struct r200_tcl_info {
    GLuint hw_primitive;
 
-/* hw can handle 12 components max */
-  struct radeon_aos aos[12];
-   GLuint nr_aos_components;
-
    GLuint *Elts;
 
-   struct radeon_bo *elt_dma_bo;
-   int elt_dma_offset; /** Offset into this buffer object, in bytes */
    int elt_used;
 
 };
index d3ed06d4021912e599fce64c87ac6e6246ca26b8..16a70475e18b67e56208a636f561731b0b783187 100644 (file)
@@ -38,6 +38,5 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 
 extern void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev );
-extern void r200ReleaseArrays( GLcontext *ctx, GLuint newinputs );
 
 #endif
index 5dbc202330b258ac0d14c1e0a3998b429cbb0774..383a0c4b0d3ea6c67c3f8ea1d973a77fcec32f4c 100644 (file)
@@ -142,17 +142,17 @@ void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev )
         case 3:
            /* special handling to fix up fog. Will get us into trouble with vbos...*/
            assert(attrib == VERT_ATTRIB_FOG);
-           if (!rmesa->tcl.aos[i].bo) {
+           if (!rmesa->radeon.tcl.aos[i].bo) {
               if (ctx->VertexProgram._Enabled)
                  rcommon_emit_vector( ctx,
-                                      &(rmesa->tcl.aos[nr]),
+                                      &(rmesa->radeon.tcl.aos[nr]),
                                       (char *)VB->AttribPtr[attrib]->data,
                                       1,
                                       VB->AttribPtr[attrib]->stride,
                                       count);
               else
                 r200_emit_vecfog( ctx,
-                                  &(rmesa->tcl.aos[nr]),
+                                  &(rmesa->radeon.tcl.aos[nr]),
                                   (char *)VB->AttribPtr[attrib]->data,
                                   VB->AttribPtr[attrib]->stride,
                                   count);
@@ -199,9 +199,9 @@ void r200EmitArrays( GLcontext *ctx, GLubyte *vimap_rev )
         default:
            assert(0);
         }
-        if (!rmesa->tcl.aos[nr].bo) {
+        if (!rmesa->radeon.tcl.aos[nr].bo) {
           rcommon_emit_vector( ctx,
-                               &(rmesa->tcl.aos[nr]),
+                               &(rmesa->radeon.tcl.aos[nr]),
                                (char *)VB->AttribPtr[attrib]->data,
                                emitsize,
                                VB->AttribPtr[attrib]->stride,
@@ -220,18 +220,6 @@ after_emit:
       rmesa->hw.vtx.cmd[VTX_VTXFMT_1] = vfmt1;
    }
 
-   rmesa->tcl.nr_aos_components = nr;
+   rmesa->radeon.tcl.aos_count = nr;
 }
 
-
-void r200ReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r200ContextPtr rmesa = R200_CONTEXT( ctx );
-   int i;
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-     if (rmesa->tcl.aos[i].bo) {
-       radeon_bo_unref(rmesa->tcl.aos[i].bo);
-       rmesa->tcl.aos[i].bo = NULL;
-     }
-   }
-}
index 1dddbfdbfedf2c1418624bac0232ab726e7fbc43..23cf8aea6670cc23cbe7a23f1e52acf61594bb11 100644 (file)
@@ -49,10 +49,6 @@ extern void r200UpdateDrawBuffer(GLcontext *ctx);
 
 extern GLboolean r200ValidateState( GLcontext *ctx );
 
-extern void r200PrintDirty( r200ContextPtr rmesa,
-                             const char *msg );
-
-
 extern void r200Fallback( GLcontext *ctx, GLuint bit, GLboolean mode );
 #define FALLBACK( rmesa, bit, mode ) do {                              \
    if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n",               \
index 2400abe838bf5cc1a543b6f83ccc7a94132d4ad4..75262e46bd8557b7ea7fca567e6fad935a22d7c1 100644 (file)
@@ -166,22 +166,6 @@ static struct {
 /* =============================================================
  * State initialization
  */
-
-void r200PrintDirty( r200ContextPtr rmesa, const char *msg )
-{
-   struct radeon_state_atom *l;
-
-   fprintf(stderr, msg);
-   fprintf(stderr, ": ");
-
-   foreach(l, &rmesa->radeon.hw.atomlist) {
-      if (l->dirty || rmesa->radeon.hw.all_dirty)
-        fprintf(stderr, "%s, ", l->name);
-   }
-
-   fprintf(stderr, "\n");
-}
-
 static int cmdpkt( r200ContextPtr rmesa, int id ) 
 {
    drm_radeon_cmd_header_t h;
index b006409987ac8c13c38e13a5e2e02e2397a47a29..712da9807752e67cfd6e9e0243823b40c032281a 100644 (file)
@@ -908,7 +908,3 @@ void r200InitSwtcl( GLcontext *ctx )
    rmesa->radeon.swtcl.hw_primitive = 0;
 }
 
-
-void r200DestroySwtcl( GLcontext *ctx )
-{
-}
index a4051a4b768f2e0774229b36876cd56618eb0a02..b0905879d7aed567c55f57ac1ff323c429e361d0 100644 (file)
@@ -39,7 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_context.h"
 
 extern void r200InitSwtcl( GLcontext *ctx );
-extern void r200DestroySwtcl( GLcontext *ctx );
 
 extern void r200ChooseRenderState( GLcontext *ctx );
 extern void r200ChooseVertexState( GLcontext *ctx );
index 8e0fb14e70e1a0ce873678985b12beefb1953981..580370933ee4612230ac332ca4b364ff16649388 100644 (file)
@@ -145,7 +145,7 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
    if (rmesa->radeon.dma.flush == r200FlushElts &&
        rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
 
-      GLushort *dest = (GLushort *)(rmesa->tcl.elt_dma_bo->ptr +
+      GLushort *dest = (GLushort *)(rmesa->radeon.tcl.elt_dma_bo->ptr +
                                    rmesa->tcl.elt_used);
 
       rmesa->tcl.elt_used += nr*2;
@@ -156,10 +156,10 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
       if (rmesa->radeon.dma.flush)
         rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 
-      rcommonEnsureCmdBufSpace(&rmesa->radeon, AOS_BUFSZ(rmesa->tcl.nr_aos_components), __FUNCTION__);
+      rcommonEnsureCmdBufSpace(&rmesa->radeon, AOS_BUFSZ(rmesa->radeon.tcl.aos_count), __FUNCTION__);
 
       r200EmitAOS( rmesa,
-                  rmesa->tcl.nr_aos_components, 0 );
+                  rmesa->radeon.tcl.aos_count, 0 );
 
       return r200AllocEltsOpenEnded( rmesa, rmesa->tcl.hw_primitive, nr );
    }
@@ -186,13 +186,13 @@ static void r200EmitPrim( GLcontext *ctx,
    r200ContextPtr rmesa = R200_CONTEXT( ctx );
    r200TclPrimitive( ctx, prim, hwprim );
    
-   //   fprintf(stderr,"Emit prim %d\n", rmesa->tcl.nr_aos_components);
+   //   fprintf(stderr,"Emit prim %d\n", rmesa->radeon.tcl.aos_count);
    rcommonEnsureCmdBufSpace( &rmesa->radeon,
-                            AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
+                            AOS_BUFSZ(rmesa->radeon.tcl.aos_count) +
                             rmesa->radeon.hw.max_state_size + VBUF_BUFSZ, __FUNCTION__ );
 
    r200EmitAOS( rmesa,
-               rmesa->tcl.nr_aos_components,
+               rmesa->radeon.tcl.aos_count,
                start );
    
    /* Why couldn't this packet have taken an offset param?
@@ -481,7 +481,7 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx,
 
    /* Do the actual work:
     */
-   r200ReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
+   radeonReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
    r200EmitArrays( ctx, vimap_rev );
 
    rmesa->tcl.Elts = VB->Elts;
@@ -545,7 +545,7 @@ static void transition_to_swtnl( GLcontext *ctx )
    tnl->Driver.NotifyMaterialChange = 
       _mesa_validate_all_lighting_tables;
 
-   r200ReleaseArrays( ctx, ~0 );
+   radeonReleaseArrays( ctx, ~0 );
 
    /* Still using the D3D based hardware-rasterizer from the radeon;
     * need to put the card into D3D mode to make it work:
index fc8a2e74315379b596065357bc6c867ccc10fe0b..1ecbeea489fb5324ebaf855889ed5fbc86ec85e7 100644 (file)
@@ -649,16 +649,3 @@ void r300InitCmdBuf(r300ContextPtr r300)
 
        rcommonInitCmdBuf(&r300->radeon);
 }
-
-/**
- * Destroy the command buffer and state atoms.
- */
-void r300DestroyCmdBuf(r300ContextPtr r300)
-{
-       struct radeon_state_atom *atom;
-
-       foreach(atom, &r300->radeon.hw.atomlist) {
-               FREE(atom->cmd);
-       }
-
-}
index b7798eb97b367505458f27cb1c3ff0bd015bc73c..3786813de36d73653d394140c2f9616360e4fc0e 100644 (file)
@@ -39,8 +39,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r300_context.h"
 
 extern void r300InitCmdBuf(r300ContextPtr r300);
-extern void r300DestroyCmdBuf(r300ContextPtr r300);
-
 
 void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom);
 int check_vpu(GLcontext *ctx, struct radeon_state_atom *atom);
index 5e271c60104ef400b6b7f483d4907fb92f307401..06db7ab8ff4711a82c9c8a226c6aebbc623dfb43 100644 (file)
@@ -470,51 +470,3 @@ GLboolean r300CreateContext(const __GLcontextModes * glVisual,
        return GL_TRUE;
 }
 
-/* Destroy the device specific context.
- */
-void r300DestroyContext(__DRIcontextPrivate * driContextPriv)
-{
-       GET_CURRENT_CONTEXT(ctx);
-       r300ContextPtr r300 = (r300ContextPtr) driContextPriv->driverPrivate;
-       radeonContextPtr radeon = (radeonContextPtr) r300;
-       radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
-
-       if (RADEON_DEBUG & DEBUG_DRI) {
-               fprintf(stderr, "Destroying context !\n");
-       }
-
-       /* check if we're deleting the currently bound context */
-       if (&r300->radeon == current) {
-               radeonFlush(r300->radeon.glCtx);
-               _mesa_make_current(NULL, NULL, NULL);
-       }
-
-       /* Free r300 context resources */
-       assert(r300);           /* should never be null */
-
-       if (r300) {
-               _swsetup_DestroyContext(r300->radeon.glCtx);
-               _tnl_DestroyContext(r300->radeon.glCtx);
-               _vbo_DestroyContext(r300->radeon.glCtx);
-               _swrast_DestroyContext(r300->radeon.glCtx);
-
-               radeon_firevertices(&r300->radeon);
-
-               if (radeon->state.scissor.pClipRects) {
-                       FREE(radeon->state.scissor.pClipRects);
-                       radeon->state.scissor.pClipRects = NULL;
-               }
-
-               r300DestroyCmdBuf(r300);
-
-               radeonCleanupContext(&r300->radeon);
-
-
-               /* the memory manager might be accessed when Mesa frees the shared
-                * state, so don't destroy it earlier
-                */
-
-
-               FREE(r300);
-       }
-}
index 37718f5415df60357b99c40e3efe5ca29b3bcc9a..5ef59d258e8f649be2c978fca09bd4ecb0dc5d11 100644 (file)
@@ -633,11 +633,7 @@ struct r300_state {
        struct r300_texture_state texture;
        int sw_tcl_inputs[VERT_ATTRIB_MAX];
        struct r300_vertex_shader_state vertex_shader;
-       struct radeon_aos aos[R300_MAX_AOS_ARRAYS];
-       int aos_count;
 
-       struct radeon_bo *elt_dma_bo; /** Buffer object that contains element indices */
-       int elt_dma_offset; /** Offset into this buffer object, in bytes */
 
        DECLARE_RENDERINPUTS(render_inputs_bitset);     /* actual render inputs that R300 was configured for.
                                                           They are the same as tnl->render_inputs for fixed pipeline */
index 4bf0e7a1898bc13c84044121a63c413b2985a6c6..3ce0ba68c99cd2b64bb99d4cef555bf0be543fef 100644 (file)
@@ -302,7 +302,7 @@ int r300EmitArrays(GLcontext * ctx)
                for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) {
                        swizzle[i][ci] = ci;
                }
-               rcommon_emit_vector(ctx, &rmesa->state.aos[i],
+               rcommon_emit_vector(ctx, &rmesa->radeon.tcl.aos[i],
                                    vb->AttribPtr[tab[i]]->data,
                                    vb->AttribPtr[tab[i]]->size,
                                    vb->AttribPtr[tab[i]]->stride, count);
@@ -343,28 +343,11 @@ int r300EmitArrays(GLcontext * ctx)
        rmesa->hw.vof.cmd[R300_VOF_CNTL_1] =
            r300VAPOutputCntl1(ctx, OutputsWritten);
 
-       rmesa->state.aos_count = nr;
+       rmesa->radeon.tcl.aos_count = nr;
 
        return R300_FALLBACK_NONE;
 }
 
-void r300ReleaseArrays(GLcontext * ctx)
-{
-       r300ContextPtr rmesa = R300_CONTEXT(ctx);
-       int i;
-
-       if (rmesa->state.elt_dma_bo) {
-               radeon_bo_unref(rmesa->state.elt_dma_bo);
-               rmesa->state.elt_dma_bo = NULL;
-       }
-       for (i = 0; i < rmesa->state.aos_count; i++) {
-               if (rmesa->state.aos[i].bo) {
-                       radeon_bo_unref(rmesa->state.aos[i].bo);
-                       rmesa->state.aos[i].bo = NULL;
-               }
-       }
-}
-
 void r300EmitCacheFlush(r300ContextPtr rmesa)
 {
        BATCH_LOCALS(&rmesa->radeon);
index 6bc8f8e9449a8467ef42f31519d02a6e15926f1b..80c22d5e9abd135c6205522b85afc792bb608b52 100644 (file)
@@ -218,7 +218,6 @@ void static INLINE cp_wait(radeonContextPtr radeon, unsigned char flags)
 
 extern int r300EmitArrays(GLcontext * ctx);
 
-extern void r300ReleaseArrays(GLcontext * ctx);
 extern int r300PrimitiveType(r300ContextPtr rmesa, int prim);
 extern int r300NumVerts(r300ContextPtr rmesa, int num_verts, int prim);
 
index 829d088033aa8f703095a88aa30d0b19ed228719..924305dd128cfa43bbbc16d632eb2866d01caf9e 100644 (file)
@@ -175,12 +175,12 @@ static void r300EmitElts(GLcontext * ctx, void *elts, unsigned long n_elts)
        r300ContextPtr rmesa = R300_CONTEXT(ctx);
        void *out;
 
-       radeonAllocDmaRegion(&rmesa->radeon, &rmesa->state.elt_dma_bo,
-                            &rmesa->state.elt_dma_offset, n_elts * 4, 4);
-       radeon_bo_map(rmesa->state.elt_dma_bo, 1);
-       out = rmesa->state.elt_dma_bo->ptr + rmesa->state.elt_dma_offset;
+       radeonAllocDmaRegion(&rmesa->radeon, &rmesa->radeon.tcl.elt_dma_bo,
+                            &rmesa->radeon.tcl.elt_dma_offset, n_elts * 4, 4);
+       radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
+       out = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
        memcpy(out, elts, n_elts * 4);
-       radeon_bo_unmap(rmesa->state.elt_dma_bo);
+       radeon_bo_unmap(rmesa->radeon.tcl.elt_dma_bo);
 }
 
 static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
@@ -199,19 +199,19 @@ static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
                        OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
                        OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
                                 (R300_VAP_PORT_IDX0 >> 2));
-                       OUT_BATCH_RELOC(rmesa->state.elt_dma_offset,
-                                       rmesa->state.elt_dma_bo,
-                                       rmesa->state.elt_dma_offset,
+                       OUT_BATCH_RELOC(rmesa->radeon.tcl.elt_dma_offset,
+                                       rmesa->radeon.tcl.elt_dma_bo,
+                                       rmesa->radeon.tcl.elt_dma_offset,
                                        RADEON_GEM_DOMAIN_GTT, 0, 0);
                        OUT_BATCH(vertex_count);
                } else {
                        OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
                        OUT_BATCH(R300_INDX_BUFFER_ONE_REG_WR | (0 << R300_INDX_BUFFER_SKIP_SHIFT) |
                                 (R300_VAP_PORT_IDX0 >> 2));
-                       OUT_BATCH(rmesa->state.elt_dma_offset);
+                       OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
                        OUT_BATCH(vertex_count);
                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                                             rmesa->state.elt_dma_bo,
+                                             rmesa->radeon.tcl.elt_dma_bo,
                                              RADEON_GEM_DOMAIN_GTT, 0, 0);
                }
                END_BATCH();
@@ -236,34 +236,34 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
                OUT_BATCH(nr);
 
                for (i = 0; i + 1 < nr; i += 2) {
-                       OUT_BATCH((rmesa->state.aos[i].components << 0) |
-                                 (rmesa->state.aos[i].stride << 8) |
-                                 (rmesa->state.aos[i + 1].components << 16) |
-                                 (rmesa->state.aos[i + 1].stride << 24));
+                       OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                                 (rmesa->radeon.tcl.aos[i].stride << 8) |
+                                 (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                                 (rmesa->radeon.tcl.aos[i + 1].stride << 24));
                        
-                       voffset =  rmesa->state.aos[i + 0].offset +
-                               offset * 4 * rmesa->state.aos[i + 0].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
                        OUT_BATCH_RELOC(voffset,
-                                       rmesa->state.aos[i].bo,
+                                       rmesa->radeon.tcl.aos[i].bo,
                                        voffset,
                                        RADEON_GEM_DOMAIN_GTT,
                                        0, 0);
-                       voffset =  rmesa->state.aos[i + 1].offset +
-                         offset * 4 * rmesa->state.aos[i + 1].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+                         offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
                        OUT_BATCH_RELOC(voffset,
-                                       rmesa->state.aos[i+1].bo,
+                                       rmesa->radeon.tcl.aos[i+1].bo,
                                        voffset,
                                        RADEON_GEM_DOMAIN_GTT,
                                        0, 0);
                }
                
                if (nr & 1) {
-                       OUT_BATCH((rmesa->state.aos[nr - 1].components << 0) |
-                                 (rmesa->state.aos[nr - 1].stride << 8));
-                       voffset =  rmesa->state.aos[nr - 1].offset +
-                               offset * 4 * rmesa->state.aos[nr - 1].stride;
+                       OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                                 (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+                       voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
                        OUT_BATCH_RELOC(voffset,
-                                       rmesa->state.aos[nr - 1].bo,
+                                       rmesa->radeon.tcl.aos[nr - 1].bo,
                                        voffset,
                                        RADEON_GEM_DOMAIN_GTT,
                                        0, 0);
@@ -276,45 +276,45 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
                OUT_BATCH(nr);
 
                for (i = 0; i + 1 < nr; i += 2) {
-                       OUT_BATCH((rmesa->state.aos[i].components << 0) |
-                                 (rmesa->state.aos[i].stride << 8) |
-                                 (rmesa->state.aos[i + 1].components << 16) |
-                                 (rmesa->state.aos[i + 1].stride << 24));
+                       OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                                 (rmesa->radeon.tcl.aos[i].stride << 8) |
+                                 (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                                 (rmesa->radeon.tcl.aos[i + 1].stride << 24));
                        
-                       voffset =  rmesa->state.aos[i + 0].offset +
-                               offset * 4 * rmesa->state.aos[i + 0].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
                        OUT_BATCH(voffset);
-                       voffset =  rmesa->state.aos[i + 1].offset +
-                               offset * 4 * rmesa->state.aos[i + 1].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
                        OUT_BATCH(voffset);
                }
                
                if (nr & 1) {
-                       OUT_BATCH((rmesa->state.aos[nr - 1].components << 0) |
-                         (rmesa->state.aos[nr - 1].stride << 8));
-                       voffset =  rmesa->state.aos[nr - 1].offset +
-                               offset * 4 * rmesa->state.aos[nr - 1].stride;
+                       OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                         (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+                       voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
                        OUT_BATCH(voffset);
                }
                for (i = 0; i + 1 < nr; i += 2) {
-                       voffset =  rmesa->state.aos[i + 0].offset +
-                               offset * 4 * rmesa->state.aos[i + 0].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                                             rmesa->state.aos[i+0].bo,
+                                             rmesa->radeon.tcl.aos[i+0].bo,
                                              RADEON_GEM_DOMAIN_GTT,
                                              0, 0);
-                       voffset =  rmesa->state.aos[i + 1].offset +
-                               offset * 4 * rmesa->state.aos[i + 1].stride;
+                       voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                                             rmesa->state.aos[i+1].bo,
+                                             rmesa->radeon.tcl.aos[i+1].bo,
                                              RADEON_GEM_DOMAIN_GTT,
                                              0, 0);
                }
                if (nr & 1) {
-                       voffset =  rmesa->state.aos[nr - 1].offset +
-                               offset * 4 * rmesa->state.aos[nr - 1].stride;
+                       voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+                               offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
                        radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                                             rmesa->state.aos[nr-1].bo,
+                                             rmesa->radeon.tcl.aos[nr-1].bo,
                                              RADEON_GEM_DOMAIN_GTT,
                                              0, 0);
                }
@@ -370,10 +370,10 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx,
                 * arrays. *sigh*
                 */
                r300EmitElts(ctx, vb->Elts, num_verts);
-               r300EmitAOS(rmesa, rmesa->state.aos_count, start);
+               r300EmitAOS(rmesa, rmesa->radeon.tcl.aos_count, start);
                r300FireEB(rmesa, num_verts, type);
        } else {
-               r300EmitAOS(rmesa, rmesa->state.aos_count, start);
+               r300EmitAOS(rmesa, rmesa->radeon.tcl.aos_count, start);
                r300FireAOS(rmesa, num_verts, type);
        }
        COMMIT_BATCH();
@@ -408,7 +408,7 @@ static GLboolean r300RunRender(GLcontext * ctx,
 
        r300EmitCacheFlush(rmesa);
 
-       r300ReleaseArrays(ctx);
+       radeonReleaseArrays(ctx, ~0);
 
        return GL_FALSE;
 }
index f469c6f43a149c64869a5a2d263c164c69c75a8c..ba409ba8130d45bddf699444616f8b85b6b5c19d 100644 (file)
@@ -19,7 +19,8 @@ RADEON_COMMON_SOURCES = \
        radeon_bo_legacy.c \
        radeon_cs_legacy.c \
        radeon_mipmap_tree.c \
-       radeon_span.c
+       radeon_span.c \
+       radeon_fbo.c
 
 DRIVER_SOURCES = \
        radeon_context.c \
index 9103c8c0f669a634d2a5a4b372d465c38388d00e..4d61b003454076522cc2ec047afac262377ec5b3 100644 (file)
@@ -37,8 +37,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "utils.h"
 #include "vblank.h"
 #include "drirenderbuffer.h"
+#include "main/context.h"
 #include "main/framebuffer.h"
 #include "main/state.h"
+#include "main/simple_list.h"
+#include "swrast/swrast.h"
+#include "swrast_setup/swrast_setup.h"
+#include "tnl/tnl.h"
 
 #define DRIVER_DATE "20090101"
 
@@ -175,39 +180,81 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
        return GL_TRUE;
 }
 
+
+
+/**
+ * Destroy the command buffer and state atoms.
+ */
+static void radeon_destroy_atom_list(radeonContextPtr radeon)
+{
+       struct radeon_state_atom *atom;
+
+       foreach(atom, &radeon->hw.atomlist) {
+               FREE(atom->cmd);
+               if (atom->lastcmd)
+                       FREE(atom->lastcmd);
+       }
+
+}
+
 /**
  * Cleanup common context fields.
  * Called by r200DestroyContext/r300DestroyContext
  */
-void radeonCleanupContext(radeonContextPtr radeon)
+void radeonDestroyContext(__DRIcontextPrivate *driContextPriv )
 {
 #ifdef RADEON_BO_TRACK
        FILE *track;
 #endif
-       struct radeon_framebuffer *rfb;
-
-       radeonDestroyBuffer(radeon->dri.drawable);
-       radeonDestroyBuffer(radeon->dri.readable);
-
-       /* free the Mesa context */
-       _mesa_destroy_context(radeon->glCtx);
-
-       /* _mesa_destroy_context() might result in calls to functions that
-        * depend on the DriverCtx, so don't set it to NULL before.
-        *
-        * radeon->glCtx->DriverCtx = NULL;
-        */
-
+       GET_CURRENT_CONTEXT(ctx);
+       radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
+       radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
 
+       if (radeon == current) {
+               radeon_firevertices(radeon);
+               _mesa_make_current(NULL, NULL, NULL);
+       }
+       
+       assert(radeon);
+       if (radeon) {
 
-       /* free the option cache */
-       driDestroyOptionCache(&radeon->optionCache);
+               if (radeon->dma.current) {
+                       radeonReleaseDmaRegion( radeon );
+                       rcommonFlushCmdBuf( radeon, __FUNCTION__ );
+               }
 
-       rcommonDestroyCmdBuf(radeon);
+               radeonReleaseArrays(ctx, ~0);
 
-       if (radeon->state.scissor.pClipRects) {
-               FREE(radeon->state.scissor.pClipRects);
-               radeon->state.scissor.pClipRects = 0;
+               if (radeon->vtbl.free_context)
+                       radeon->vtbl.free_context(radeon->glCtx);
+               _swsetup_DestroyContext( radeon->glCtx );
+               _tnl_DestroyContext( radeon->glCtx );
+               _vbo_DestroyContext( radeon->glCtx );
+               _swrast_DestroyContext( radeon->glCtx );
+       
+               radeonDestroyBuffer(radeon->dri.drawable);
+               radeonDestroyBuffer(radeon->dri.readable);
+
+               /* free atom list */
+               /* free the Mesa context */
+               _mesa_destroy_context(radeon->glCtx);
+               
+               /* _mesa_destroy_context() might result in calls to functions that
+                * depend on the DriverCtx, so don't set it to NULL before.
+                *
+                * radeon->glCtx->DriverCtx = NULL;
+                */
+               /* free the option cache */
+               driDestroyOptionCache(&radeon->optionCache);
+               
+               rcommonDestroyCmdBuf(radeon);
+
+               radeon_destroy_atom_list(radeon);
+
+               if (radeon->state.scissor.pClipRects) {
+                       FREE(radeon->state.scissor.pClipRects);
+                       radeon->state.scissor.pClipRects = 0;
+               }
        }
 #ifdef RADEON_BO_TRACK
        track = fopen("/tmp/tracklog", "w");
@@ -216,6 +263,7 @@ void radeonCleanupContext(radeonContextPtr radeon)
                fclose(track);
        }
 #endif
+       FREE(radeon);
 }
 
 /* Force the context `c' to be unbound from its buffer.
index 0ce72c919851b2c46368b0628112f2e8d061f1eb..c6e6be74840212a724c60b041ff481d0587a885b 100644 (file)
@@ -290,6 +290,14 @@ struct radeon_swtcl_info {
 
 };
 
+#define RADEON_MAX_AOS_ARRAYS          16
+struct radeon_tcl_info {
+       struct radeon_aos aos[RADEON_MAX_AOS_ARRAYS];
+       GLuint aos_count;
+       struct radeon_bo *elt_dma_bo; /** Buffer object that contains element indices */
+       int elt_dma_offset; /** Offset into this buffer object, in bytes */
+};
+
 struct radeon_ioctl {
        GLuint vertex_offset;
         struct radeon_bo *bo;
@@ -367,7 +375,6 @@ struct radeon_dri_mirror {
 #define DEBUG_MEMORY    0x4000
 
 
-
 typedef void (*radeon_tri_func) (radeonContextPtr,
                                 radeonVertex *,
                                 radeonVertex *, radeonVertex *);
@@ -436,6 +443,7 @@ struct radeon_context {
    struct radeon_state state;
 
    struct radeon_swtcl_info swtcl;
+   struct radeon_tcl_info tcl;
    /* Configuration cache
     */
    driOptionCache optionCache;
@@ -468,6 +476,7 @@ struct radeon_context {
           void (*pre_emit_atoms)(radeonContextPtr rmesa);
           void (*pre_emit_state)(radeonContextPtr rmesa);
           void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
+          void (*free_context)(GLcontext *ctx);
    } vtbl;
 };
 
@@ -530,6 +539,7 @@ void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
                            __DRIdrawablePrivate * driDrawPriv,
                            __DRIdrawablePrivate * driReadPriv);
+extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
 
 /* ================================================================
  * Debugging:
index cad2c3e0c1fba7a31a830665ce92ac8562490ab4..2600c78df3992a5bc5067b944ed1e476ba4c9a28 100644 (file)
@@ -188,6 +188,11 @@ static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
    radeon->hw.is_dirty = 1;
 }
 
+static void r100_vtbl_free_context(GLcontext *ctx)
+{
+   r100ContextPtr rmesa = R100_CONTEXT(ctx);
+   _mesa_vector4f_free( &rmesa->tcl.ObjClean );
+}
 
 static void r100_init_vtbl(radeonContextPtr radeon)
 {
@@ -202,7 +207,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
 /* Create the device specific context.
  */
 GLboolean
-radeonCreateContext( const __GLcontextModes *glVisual,
+r100CreateContext( const __GLcontextModes *glVisual,
                      __DRIcontextPrivate *driContextPriv,
                      void *sharedContextPrivate)
 {
@@ -397,50 +402,3 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    }
    return GL_TRUE;
 }
-
-
-/* Destroy the device specific context.
- */
-/* Destroy the Mesa and driver specific context data.
- */
-void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
-{
-   GET_CURRENT_CONTEXT(ctx);
-   r100ContextPtr rmesa = (r100ContextPtr) driContextPriv->driverPrivate;
-   r100ContextPtr current = ctx ? R100_CONTEXT(ctx) : NULL;
-
-   /* check if we're deleting the currently bound context */
-   if (rmesa == current) {
-      radeon_firevertices(&rmesa->radeon);
-      _mesa_make_current(NULL, NULL, NULL);
-   }
-
-   /* Free radeon context resources */
-   assert(rmesa); /* should never be null */
-   if ( rmesa ) {
-
-      _swsetup_DestroyContext( rmesa->radeon.glCtx );
-      _tnl_DestroyContext( rmesa->radeon.glCtx );
-      _vbo_DestroyContext( rmesa->radeon.glCtx );
-      _swrast_DestroyContext( rmesa->radeon.glCtx );
-
-      radeonDestroySwtcl( rmesa->radeon.glCtx );
-      radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
-      if (rmesa->radeon.dma.current) {
-        radeonReleaseDmaRegion( &rmesa->radeon );
-        rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
-      }
-
-      _mesa_vector4f_free( &rmesa->tcl.ObjClean );
-
-      if (rmesa->radeon.state.scissor.pClipRects) {
-        FREE(rmesa->radeon.state.scissor.pClipRects);
-        rmesa->radeon.state.scissor.pClipRects = NULL;
-      }
-
-      radeonCleanupContext(&rmesa->radeon);
-
-      FREE( rmesa );
-   }
-}
-
index 5235a6e374c754056dc6f2fac9b363782d454da0..1795d8bdb6d496d1f7da4e593572eed29943f203 100644 (file)
@@ -332,7 +332,7 @@ struct r100_state {
 #define R200_ELT_BUF_SZ  (8*1024)
 /* radeon_tcl.c
  */
-struct radeon_tcl_info {
+struct r100_tcl_info {
        GLuint vertex_format;
        GLuint hw_primitive;
 
@@ -341,14 +341,9 @@ struct radeon_tcl_info {
         */
        GLvector4f ObjClean;
 
-        struct radeon_aos aos[8];
-       GLuint nr_aos_components;
-
        GLuint *Elts;
 
-       struct radeon_bo *indexed_bo;
-
-        int elt_cmd_offset; /** Offset into the cmdbuf */
+        int elt_cmd_offset;
        int elt_cmd_start;
         int elt_used;
 };
@@ -416,7 +411,7 @@ struct r100_context {
 
        /* radeon_tcl.c
         */
-       struct radeon_tcl_info tcl;
+       struct r100_tcl_info tcl;
 
        /* radeon_swtcl.c
         */
@@ -443,15 +438,10 @@ struct r100_context {
 
 #define RADEON_OLD_PACKETS 1
 
-extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
-extern GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
-                                    __DRIcontextPrivate * driContextPriv,
-                                    void *sharedContextPrivate);
-extern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
-                                  __DRIdrawablePrivate * driDrawPriv,
-                                  __DRIdrawablePrivate * driReadPriv);
-extern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv);
-
+extern GLboolean r100CreateContext( const __GLcontextModes *glVisual,
+                                   __DRIcontextPrivate *driContextPriv,
+                                   void *sharedContextPrivate);
+  
 
 
 #endif                         /* __RADEON_CONTEXT_H__ */
index 01fc20bd796918fdcfb9b14bcc9f7d4a4a11b804..47f789e9cd08b398d0538ea92cd40402fdeac985 100644 (file)
@@ -328,3 +328,20 @@ restart:
        rmesa->swtcl.numverts += nverts;
        return head;
 }
+
+void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
+{
+   radeonContextPtr radeon = RADEON_CONTEXT( ctx );
+   int i;
+
+   if (radeon->tcl.elt_dma_bo) {
+          radeon_bo_unref(radeon->tcl.elt_dma_bo);
+          radeon->tcl.elt_dma_bo = NULL;
+   }
+   for (i = 0; i < radeon->tcl.aos_count; i++) {
+      if (radeon->tcl.aos[i].bo) {
+         radeon_bo_unref(radeon->tcl.aos[i].bo);
+         radeon->tcl.aos[i].bo = NULL;
+      }
+   }
+}
index cee3744fed12f1e0b4f71c1d602efed27ae96d5d..06e388fc1de443835ccf2a02e93aeeca05cbcfd9 100644 (file)
@@ -48,4 +48,5 @@ void radeonReleaseDmaRegion(radeonContextPtr rmesa);
 void rcommon_flush_last_swtcl_prim(GLcontext *ctx);
 
 void *rcommonAllocDmaLowVerts(radeonContextPtr rmesa, int nverts, int vsize);
+void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs );
 #endif
index f18aa1a4dae112f3d96a5ed8a0bc2b246491fdc1..b5fde6d3de59a3edfa3ba3f6ffba5f413ebb1a6c 100644 (file)
@@ -313,9 +313,9 @@ void radeonEmitAOS( r100ContextPtr rmesa,
 {
 #if RADEON_OLD_PACKETS
    assert( nr == 1 );
-   rmesa->ioctl.bo = rmesa->tcl.aos[0].bo;
+   rmesa->ioctl.bo = rmesa->radeon.tcl.aos[0].bo;
    rmesa->ioctl.vertex_offset = 
-     (rmesa->tcl.aos[0].offset + offset * rmesa->tcl.aos[0].stride * 4);
+     (rmesa->radeon.tcl.aos[0].offset + offset * rmesa->radeon.tcl.aos[0].stride * 4);
 #else
    BATCH_LOCALS(&rmesa->radeon);
    uint32_t voffset;
@@ -332,79 +332,79 @@ void radeonEmitAOS( r100ContextPtr rmesa,
 
    if (!rmesa->radeon.radeonScreen->kernel_mm) {
       for (i = 0; i + 1 < nr; i += 2) {
-        OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-                  (rmesa->tcl.aos[i].stride << 8) |
-                  (rmesa->tcl.aos[i + 1].components << 16) |
-                  (rmesa->tcl.aos[i + 1].stride << 24));
+        OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                  (rmesa->radeon.tcl.aos[i].stride << 8) |
+                  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
                        
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[i].bo,
+                        rmesa->radeon.tcl.aos[i].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[i+1].bo,
+                        rmesa->radeon.tcl.aos[i+1].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
       }
       
       if (nr & 1) {
-        OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-                  (rmesa->tcl.aos[nr - 1].stride << 8));
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         OUT_BATCH_RELOC(voffset,
-                        rmesa->tcl.aos[nr - 1].bo,
+                        rmesa->radeon.tcl.aos[nr - 1].bo,
                         voffset,
                         RADEON_GEM_DOMAIN_GTT,
                         0, 0);
       }
    } else {
       for (i = 0; i + 1 < nr; i += 2) {
-        OUT_BATCH((rmesa->tcl.aos[i].components << 0) |
-                  (rmesa->tcl.aos[i].stride << 8) |
-                  (rmesa->tcl.aos[i + 1].components << 16) |
-                  (rmesa->tcl.aos[i + 1].stride << 24));
+        OUT_BATCH((rmesa->radeon.tcl.aos[i].components << 0) |
+                  (rmesa->radeon.tcl.aos[i].stride << 8) |
+                  (rmesa->radeon.tcl.aos[i + 1].components << 16) |
+                  (rmesa->radeon.tcl.aos[i + 1].stride << 24));
         
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         OUT_BATCH(voffset);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         OUT_BATCH(voffset);
       }
       
       if (nr & 1) {
-        OUT_BATCH((rmesa->tcl.aos[nr - 1].components << 0) |
-                  (rmesa->tcl.aos[nr - 1].stride << 8));
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        OUT_BATCH((rmesa->radeon.tcl.aos[nr - 1].components << 0) |
+                  (rmesa->radeon.tcl.aos[nr - 1].stride << 8));
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         OUT_BATCH(voffset);
       }
       for (i = 0; i + 1 < nr; i += 2) {
-        voffset =  rmesa->tcl.aos[i + 0].offset +
-           offset * 4 * rmesa->tcl.aos[i + 0].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 0].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 0].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[i+0].bo,
+                              rmesa->radeon.tcl.aos[i+0].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
-        voffset =  rmesa->tcl.aos[i + 1].offset +
-           offset * 4 * rmesa->tcl.aos[i + 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[i + 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[i + 1].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[i+1].bo,
+                              rmesa->radeon.tcl.aos[i+1].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
       }
       if (nr & 1) {
-        voffset =  rmesa->tcl.aos[nr - 1].offset +
-           offset * 4 * rmesa->tcl.aos[nr - 1].stride;
+        voffset =  rmesa->radeon.tcl.aos[nr - 1].offset +
+           offset * 4 * rmesa->radeon.tcl.aos[nr - 1].stride;
         radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
-                              rmesa->tcl.aos[nr-1].bo,
+                              rmesa->radeon.tcl.aos[nr-1].bo,
                               RADEON_GEM_DOMAIN_GTT,
                               0, 0);
       }
index b8935e84a050d2a0aa4e2862957770e4d8dd436e..b88eb198d578aa939b282f3cfdae8bd10bd037c8 100644 (file)
@@ -38,6 +38,5 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_context.h"
 
 extern void radeonEmitArrays( GLcontext *ctx, GLuint inputs );
-extern void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs );
 
 #endif
index 7f5da16b03df26d16a4d7ac7ce8b663e352dfab8..7c6ea0530e0363eb8bfd55e92590278a2513e41b 100644 (file)
@@ -324,16 +324,3 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
    rmesa->tcl.vertex_format = vfmt;
 }
 
-
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r100ContextPtr rmesa = R100_CONTEXT( ctx );
-   int i;
-
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-     if (rmesa->tcl.aos[i].bo) {
-       radeon_bo_unref(rmesa->tcl.aos[i].bo);
-       rmesa->tcl.aos[i].bo = NULL;
-     }
-   }
-}
index d468a97200620a5bf8f5daebd4caeb257744f50f..78ec1193026bb0e26171803b70c69c7daa1f82a7 100644 (file)
@@ -374,15 +374,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
         break;
 
    if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
-       rmesa->tcl.aos[0].bo)
+       rmesa->radeon.tcl.aos[0].bo)
       return;
 
-   if (rmesa->tcl.aos[0].bo)
+   if (rmesa->radeon.tcl.aos[0].bo)
       radeonReleaseArrays( ctx, ~0 );
 
    radeonAllocDmaRegion( &rmesa->radeon,
-                        &rmesa->tcl.aos[0].bo,
-                        &rmesa->tcl.aos[0].offset,
+                        &rmesa->radeon.tcl.aos[0].bo,
+                        &rmesa->radeon.tcl.aos[0].offset,
                         VB->Count * setup_tab[i].vertex_size * 4, 
                         4);
 
@@ -422,25 +422,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
 
 
    setup_tab[i].emit( ctx, 0, VB->Count, 
-                     rmesa->tcl.aos[0].bo->ptr + rmesa->tcl.aos[0].offset);
+                     rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset);
 
-   //   rmesa->tcl.aos[0].size = setup_tab[i].vertex_size;
-   rmesa->tcl.aos[0].stride = setup_tab[i].vertex_size;
+   //   rmesa->radeon.tcl.aos[0].size = setup_tab[i].vertex_size;
+   rmesa->radeon.tcl.aos[0].stride = setup_tab[i].vertex_size;
    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;
-   rmesa->tcl.nr_aos_components = 1;
+   rmesa->radeon.tcl.aos_count = 1;
 }
 
 
-
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
-{
-   r100ContextPtr rmesa = R100_CONTEXT( ctx );
-   int i;
-
-   for (i = 0; i < rmesa->tcl.nr_aos_components; i++) {
-      if (rmesa->tcl.aos[i].bo) {
-         radeon_bo_unref(rmesa->tcl.aos[i].bo);
-         rmesa->tcl.aos[i].bo = NULL;
-      }
-   }
-}
index ea400a672ddf3d4e3a8aaba03beb4c77398b170f..ecfdce9d014375ac7c636200ff1a8b961b80bbf8 100644 (file)
@@ -1332,7 +1332,6 @@ radeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
     _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 }
 
-#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
 /**
  * Choose the appropriate CreateContext function based on the chipset.
  * Eventually, all drivers will go through this process.
@@ -1343,25 +1342,21 @@ static GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
 {
        __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
        radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
-
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
        if (IS_R300_CLASS(screen))
                return r300CreateContext(glVisual, driContextPriv, sharedContextPriv);
-        return GL_FALSE;
-}
-
-/**
- * Choose the appropriate DestroyContext function based on the chipset.
- */
-static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
-{
-       radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
-
-       if (IS_R300_CLASS(radeon->radeonScreen))
-               return r300DestroyContext(driContextPriv);
-}
+#endif
 
+#if RADEON_COMMON && defined(RADEON_COMMON_FOR_R200)
+       if (IS_R200_CLASS(screen))
+               return r200CreateContext(glVisual, driContextPriv, sharedContextPriv);
+#endif
 
+#if !RADEON_COMMON
+       return r100CreateContext(glVisual, driContextPriv, sharedContextPriv);
 #endif
+       return GL_FALSE;
+}
 
 
 /**
@@ -1547,7 +1542,6 @@ getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
    return 0;
 }
 
-#if !RADEON_COMMON || (RADEON_COMMON && defined(RADEON_COMMON_FOR_R300))
 const struct __DriverAPIRec driDriverAPI = {
    .InitScreen      = radeonInitScreen,
    .DestroyScreen   = radeonDestroyScreen,
@@ -1567,24 +1561,4 @@ const struct __DriverAPIRec driDriverAPI = {
     /* DRI2 */
    .InitScreen2     = radeonInitScreen2,
 };
-#else
-const struct __DriverAPIRec driDriverAPI = {
-   .InitScreen      = radeonInitScreen,
-   .DestroyScreen   = radeonDestroyScreen,
-   .CreateContext   = r200CreateContext,
-   .DestroyContext  = r200DestroyContext,
-   .CreateBuffer    = radeonCreateBuffer,
-   .DestroyBuffer   = radeonDestroyBuffer,
-   .SwapBuffers     = radeonSwapBuffers,
-   .MakeCurrent     = radeonMakeCurrent,
-   .UnbindContext   = radeonUnbindContext,
-   .GetSwapInfo     = getSwapInfo,
-   .GetDrawableMSC  = driDrawableGetMSC32,
-   .WaitForMSC      = driWaitForMSC32,
-   .WaitForSBC      = NULL,
-   .SwapBuffersMSC  = NULL,
-   .CopySubBuffer   = radeonCopySubBuffer,
-   .InitScreen2     = radeonInitScreen2,
-};
-#endif
 
index 17c2b112225c2c3c29bca32103e9162993d87d80..f05fa827d726788309c59756dba380f64d80f6b8 100644 (file)
@@ -52,9 +52,6 @@ extern void radeonUploadTexMatrix( r100ContextPtr rmesa,
 
 extern void radeonValidateState( GLcontext *ctx );
 
-extern void radeonPrintDirty( r100ContextPtr rmesa,
-                             const char *msg );
-
 
 extern void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode );
 #define FALLBACK( rmesa, bit, mode ) do {                              \
index 3d0cd8d3f86472f295ac6559997b0a760bab00cb..174a7e1862f0b96d88313e5169c0f7cd84cbe103 100644 (file)
@@ -161,22 +161,6 @@ static struct {
 /* =============================================================
  * State initialization
  */
-
-void radeonPrintDirty( r100ContextPtr rmesa, const char *msg )
-{
-   struct radeon_state_atom *l;
-
-   fprintf(stderr, msg);
-   fprintf(stderr, ": ");
-
-   foreach(l, &rmesa->radeon.hw.atomlist) {
-      if (l->dirty || rmesa->radeon.hw.all_dirty)
-        fprintf(stderr, "%s, ", l->name);
-   }
-
-   fprintf(stderr, "\n");
-}
-
 static int cmdpkt( r100ContextPtr rmesa, int id ) 
 {
    drm_radeon_cmd_header_t h;
index 2484006f1c4e9e6ff87c8411fea43ff24e6309b0..e31f045991ca994a008b7a48d6c79007c0a12268 100644 (file)
@@ -822,7 +822,3 @@ void radeonInitSwtcl( GLcontext *ctx )
    rmesa->radeon.swtcl.hw_primitive = 0;
 }
 
-
-void radeonDestroySwtcl( GLcontext *ctx )
-{
-}
index 3ada9890b37b74cf8aaa0f649b7e8edd1142e12e..da89158eeb9d13060b28819eb5466dfecfc74255 100644 (file)
@@ -40,7 +40,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_context.h"
 
 extern void radeonInitSwtcl( GLcontext *ctx );
-extern void radeonDestroySwtcl( GLcontext *ctx );
 
 extern void radeonChooseRenderState( GLcontext *ctx );
 extern void radeonChooseVertexState( GLcontext *ctx );
index 5887ab355d244a3614ed5174709ba6a7a3968e80..df6708f05e35dfc9a834651ecd79fad92afe1d60 100644 (file)
@@ -150,10 +150,10 @@ static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
         rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 
       rcommonEnsureCmdBufSpace(&rmesa->radeon, rmesa->radeon.hw.max_state_size + ELTS_BUFSZ(nr) + 
-                              AOS_BUFSZ(rmesa->tcl.nr_aos_components), __FUNCTION__);
+                              AOS_BUFSZ(rmesa->radeon.tcl.aos_count), __FUNCTION__);
 
       radeonEmitAOS( rmesa,
-                    rmesa->tcl.nr_aos_components, 0 );
+                    rmesa->radeon.tcl.aos_count, 0 );
 
       return radeonAllocEltsOpenEnded( rmesa, rmesa->tcl.vertex_format,
                                       rmesa->tcl.hw_primitive, nr );
@@ -177,11 +177,11 @@ static void radeonEmitPrim( GLcontext *ctx,
    radeonTclPrimitive( ctx, prim, hwprim );
    
    rcommonEnsureCmdBufSpace( &rmesa->radeon,
-                            AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
+                            AOS_BUFSZ(rmesa->radeon.tcl.aos_count) +
                             rmesa->radeon.hw.max_state_size + VBUF_BUFSZ, __FUNCTION__ );
 
    radeonEmitAOS( rmesa,
-                 rmesa->tcl.nr_aos_components,
+                 rmesa->radeon.tcl.aos_count,
                  start );
    
    /* Why couldn't this packet have taken an offset param?