Fix how upgrades work.

Remove some dead code.

src/mem/cache/cache_impl.hh:
    Upgrades don't need a response.
    Moved satisfied check into bus so removed some dead code.
src/mem/cache/coherence/coherence_protocol.cc:
src/mem/packet.hh:
    Upgrades don't require a response

--HG--
extra : convert_revision : dee0440ff19ba4c9e51bf9a47a5b0991265cfc1d

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index af12b9255a642bb50f592efc0739dd9d2bb9dfea..c3c1c08819cd758acf5fd6bb954e840d478ed756 100644 (file)
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -63,9 +63,8 @@ doTimingAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide)
         if (pkt->isWrite() && (pkt->req->isLocked())) {
             pkt->req->setScResult(1);
         }
-        if (!(pkt->flags & SATISFIED)) {
-            access(pkt);
-        }
+        access(pkt);
+
     }
     else
     {
@@ -204,9 +203,8 @@ Cache<TagStore,Buffering,Coherence>::access(PacketPtr &pkt)
                     pkt->getAddr() & (((ULL(1))<<48)-1),
                     pkt->getAddr() & ~((Addr)blkSize - 1));
 
-            //@todo Should this return latency have the hit latency in it?
-//         respond(pkt,curTick+lat);
             pkt->flags |= SATISFIED;
+            //Invalidates/Upgrades need no response if they get the bus
 //            return MA_HIT; //@todo, return values
             return true;
         }

diff --git a/src/mem/cache/coherence/coherence_protocol.cc b/src/mem/cache/coherence/coherence_protocol.cc
index bcf3ce9c506ec911c98ef6422d3ad12f791eb072..e28dda3dc2953e032c3d26fbc20466f32dcd66ea 100644 (file)
--- a/src/mem/cache/coherence/coherence_protocol.cc
+++ b/src/mem/cache/coherence/coherence_protocol.cc
@@ -271,7 +271,7 @@ CoherenceProtocol::CoherenceProtocol(const string &name,
     }
 
     Packet::Command writeToSharedCmd = doUpgrades ? Packet::UpgradeReq : Packet::ReadExReq;
-    Packet::Command writeToSharedResp = doUpgrades ? Packet::UpgradeResp : Packet::ReadExResp;
+    Packet::Command writeToSharedResp = doUpgrades ? Packet::UpgradeReq : Packet::ReadExResp;
 
 //@todo add in hardware prefetch to this list
     if (protocol == "msi") {

diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index be9bf5f57e8c7b641dfbfdd2e8d927d116e69598..9d37fe157c8f5ba43862f3c7dad660944b2f11a0 100644 (file)
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -194,8 +194,7 @@ class Packet
         HardPFResp      = IsRead  | IsResponse | IsHWPrefetch | NeedsResponse,
         InvalidateReq   = IsInvalidate | IsRequest,
         WriteInvalidateReq = IsWrite | IsInvalidate | IsRequest,
-        UpgradeReq      = IsInvalidate | IsRequest | NeedsResponse,
-        UpgradeResp     = IsInvalidate | IsResponse | NeedsResponse,
+        UpgradeReq      = IsInvalidate | IsRequest
         ReadExReq       = IsRead | IsInvalidate | IsRequest | NeedsResponse,
         ReadExResp      = IsRead | IsInvalidate | IsResponse | NeedsResponse
     };