* config/avr/avr.c: Fix comment typos.
* config/c4x/c4x.md: Likewise.
* config/dsp16xx/dsp16xx.h: Likewise.
* config/dsp16xx/dsp16xx.md: Likewise.
* config/i386/i386.md: Likewise.
* config/ia64/ia64.c: Likewise.
* config/m32r/m32r.h: Likewise.
* config/m68hc11/m68hc11.md: Likewise.
* config/mmix/mmix.c: Likewise.
* config/mn10200/mn10200.c: Likewise.
* config/romp/romp.c: Likewise.
* config/sh/sh.c: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/stormy16/stormy16.h: Likewise.
* config/stormy16/stormy16.md: Likewise.
From-SVN: r48496
+2002-01-03 Kazu Hirata <kazu@hxi.com>
+
+ * config/avr/avr.c: Fix comment typos.
+ * config/c4x/c4x.md: Likewise.
+ * config/dsp16xx/dsp16xx.h: Likewise.
+ * config/dsp16xx/dsp16xx.md: Likewise.
+ * config/i386/i386.md: Likewise.
+ * config/ia64/ia64.c: Likewise.
+ * config/m32r/m32r.h: Likewise.
+ * config/m68hc11/m68hc11.md: Likewise.
+ * config/mmix/mmix.c: Likewise.
+ * config/mn10200/mn10200.c: Likewise.
+ * config/romp/romp.c: Likewise.
+ * config/sh/sh.c: Likewise.
+ * config/stormy16/stormy16.c: Likewise.
+ * config/stormy16/stormy16.h: Likewise.
+ * config/stormy16/stormy16.md: Likewise.
+
2002-01-03 Graham Stott <grahams@redhat.com>
* loop.h: Update copyright date.
/* Subroutines for insn-output.c for ATMEL AVR micro controllers
- Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by Denis Chertykov (denisc@overta.ru)
This file is part of GNU CC.
/* If this is a sequence, we must handle them all at once.
We could have for instance a call that sets the target register,
- and a insn in a delay slot that uses the register. In this case,
+ and an insn in a delay slot that uses the register. In this case,
we must return 0. */
else if (code == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
{
;; Machine description for the TMS320C[34]x for GNU C compiler
;; Copyright (C) 1994, 1995, 1996, 1997, 1998,
-;; 1999, 2000 Free Software Foundation, Inc.
+;; 1999, 2000, 2002 Free Software Foundation, Inc.
;; Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
;; and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl)
; BLOCK MOVE
; We should probably get RC loaded when using RPTB automagically...
; There's probably no need to call _memcpy() if we don't get
-; a immediate operand for the size. We could do a better job here
+; an immediate operand for the size. We could do a better job here
; than most memcpy() implementations.
; operand 2 is the number of bytes
; operand 3 is the shared alignment
/* Definitions of target machine for GNU compiler. AT&T DSP1600.
- Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001
+ Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002
Free Software Foundation, Inc.
Contributed by Michael Collison (collison@isisinc.net).
#define REG_YBASE30 56
#define REG_YBASE31 57
-/* Do we have a accumulator register? */
+/* Do we have an accumulator register? */
#define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
#define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
'K' requires a constant 0 operand.
'L' constant for use in add or sub from low 16-bits
'M' 32-bit value -- low 16-bits zero
- 'N' constant for use incrementing or decrementing a address register
+ 'N' constant for use incrementing or decrementing an address register
'O' constant for use with and'ing only high 16-bit
'P' constant for use with and'ing only low 16-bit
*/
;;- Machine description for the AT&T DSP1600 for GNU C compiler
-;; Copyright (C) 1994, 1995, 1997, 1998, 2001 Free Software Foundation, Inc.
+;; Copyright (C) 1994, 1995, 1997, 1998, 2001, 2002
+;; Free Software Foundation, Inc.
;; Contributed by Michael Collison (collison@isisinc.net).
;; This file is part of GNU CC.
}")
;; The movqi pattern with the parallel is used for addqi insns (which have a parallel)
-;; that are turned into moveqi insns by the flow phase. This happens when a auto-increment
+;; that are turned into moveqi insns by the flow phase. This happens when an auto-increment
;; is detected.
(define_insn "match_movqi1"
;; GCC machine description for IA-32 and x86-64.
-;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
;; Free Software Foundation, Inc.
;; Mostly by William Schelter.
;; x86_64 support added by Jan Hubicka
(match_operand:QI 1 "general_operand" ""))]
"! TARGET_PARTIAL_REG_STALL"
{
- /* Don't generate memory->memory moves, go through a register */
+ /* Don't generate memory->memory moves, go through a register. */
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
})
/* Definitions of target machine for GNU compiler.
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by James E. Wilson <wilson@cygnus.com> and
David Mosberger <davidm@hpl.hp.com>.
WRITE_COUNT gets set to 2.
The result of this is that whenever an insn attempts to write a register
- whose WRITE_COUNT is two, we need to issue a insn group barrier first.
+ whose WRITE_COUNT is two, we need to issue an insn group barrier first.
If a predicate register is written by a floating-point insn, we set
WRITTEN_BY_FP to true.
/* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
- Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
+ Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
This file is part of GNU CC.
&& RTX_OK_FOR_BASE_P (XEXP (X, 0)))
/* Local to this file. */
-/* Is this a increment/decrement and store operation. */
+/* Is this an increment/decrement and store operation. */
#define STORE_PREINC_PREDEC_P(MODE, X) \
(((MODE) == SImode || (MODE) == SFmode) \
&& (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
;;- Machine description file for Motorola 68HC11 and 68HC12.
-;;- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
+;;- Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
;;- Contributed by Stephane Carrez (stcarrez@worldnet.fr)
;; This file is part of GNU CC.
}
else
{
- /* X can be used as a indexed addressing in the source.
+ /* X can be used as an indexed addressing in the source.
Get the value before clearing it. */
x_reg_used = reg_mentioned_p (ix_reg, operands[1]);
if (x_reg_used)
/* Local (static) helper functions. */
/* Print operator suitable for doing something with a shiftable
- wyde. The type of operator is passed as a asm output modifier. */
+ wyde. The type of operator is passed as an asm output modifier. */
static void
mmix_output_shiftvalue_op_from_str (stream, mainop, value)
/* Subroutines for insn-output.c for Matsushita MN10200 series
- Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
+ Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
}
}
- /* Now see if we could load the value into a address register. */
+ /* Now see if we could load the value into an address register. */
if (zero_dreg == NULL_RTX
&& areg_count > 2
&& (!regs_ever_live[5] || !regs_ever_live[6]))
/* Subroutines used for code generation on ROMP.
- Copyright (C) 1990, 1991, 1992, 1993, 1997, 1998, 1999, 2000
+ Copyright (C) 1990, 1991, 1992, 1993, 1997, 1998, 1999, 2000, 2002
Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@nyu.edu)
The last 6 bits of the first byte initialize the offset value. In many
cases where procedures have small local storage, this is enough and, in
this case, the high-order size field is zero so the byte can (almost) be
- used as is (see below). Thus, the byte value of 0x0d is encodes a offset
+ used as is (see below). Thus, the byte value of 0x0d is encodes an offset
size of 13 words, or 52 bytes.
For procedures with a local space larger than 60 bytes, the 6 bits
}
/* Return the offset value of an argument having
- the given offset. Basically, we correct by going from a arg pointer to
+ the given offset. Basically, we correct by going from an arg pointer to
stack pointer value. */
int
/* Output routines for GCC for Hitachi Super-H.
- Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001
+ Copyright (C) 1993, 1994, 1995, 1997, 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
/* If this is a sequence, we must handle them all at once.
We could have for instance a call that sets the target register,
- and a insn in a delay slot that uses the register. In this case,
+ and an insn in a delay slot that uses the register. In this case,
we must return 0. */
else if (code == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
{
/* Xstormy16 target functions.
- Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
+ Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
This file is part of GNU CC.
registers can only be copied to memory and not to another class of
registers. In that case, secondary reload registers are not needed and
would not be helpful. Instead, a stack location must be used to perform the
- copy and the `movM' pattern should use memory as a intermediate storage.
+ copy and the `movM' pattern should use memory as an intermediate storage.
This case often occurs between floating-point and general registers. */
enum reg_class
}
/* Called after register allocation to add any instructions needed for
- the epilogue. Using a epilogue insn is favored compared to putting
+ the epilogue. Using an epilogue insn is favored compared to putting
all of the instructions in the TARGET_ASM_FUNCTION_PROLOGUE macro,
since it allows the scheduler to intermix instructions with the
saves of the caller saved registers. In some cases, it might be
fputc (')', file);
}
-/* Print an operand to a assembler instruction. */
+/* Print an operand to an assembler instruction. */
void
xstormy16_print_operand (file, x, code)
FILE * file;
/* Xstormy16 cpu description.
- Copyright (C) 1997, 1998, 1999, 2000, 2001
+ Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
Contributed by Red Hat, Inc.
registers can only be copied to memory and not to another class of
registers. In that case, secondary reload registers are not needed and
would not be helpful. Instead, a stack location must be used to perform the
- copy and the `movM' pattern should use memory as a intermediate storage.
+ copy and the `movM' pattern should use memory as an intermediate storage.
This case often occurs between floating-point and general registers. */
/* This chip has the interesting property that only the first eight
;; XSTORMY16 Machine description template
-;; Copyright (C) 1997, 1998, 1999, 2001 Free Software Foundation, Inc.
+;; Copyright (C) 1997, 1998, 1999, 2001, 2002 Free Software Foundation, Inc.
;; Contributed by Red Hat, Inc.
;; This file is part of GNU CC.
}")
;; Called after register allocation to add any instructions needed for
-;; the epilogue. Using a epilogue insn is favored compared to putting
+;; the epilogue. Using an epilogue insn is favored compared to putting
;; all of the instructions in the TARGET_ASM_FUNCTION_EPILOGUE macro,
;; since it allows the scheduler to intermix instructions with the
;; restires of the caller saved registers. In some cases, it might be
projects / gcc.git / commitdiff