arch-arm: Don't use TheISA in the ARM implementation.

We know what ISA we're using, so we can use ArmISA directly.

Change-Id: I7d207eea2581bae8be3e870883de88bf2879ef12
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39657
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc
index 6521b27377ea5e021de7473140d91a382da834d5..33253427644cb982c84e1b906699968930d67ac4 100644 (file)
--- a/src/arch/arm/tracers/tarmac_parser.cc
+++ b/src/arch/arm/tracers/tarmac_parser.cc
@@ -828,7 +828,7 @@ TarmacParserRecord::TarmacParserRecordEvent::process()
           case REG_Z:
             {
                 int8_t i = maxVectorLength;
-                const TheISA::VecRegContainer& vc = thread->readVecReg(
+                const ArmISA::VecRegContainer& vc = thread->readVecReg(
                     RegId(VecRegClass, it->index));
                 auto vv = vc.as<uint64_t>();
                 while (i > 0) {