st/glsl_to_nir: move nir_lower_io to drivers

This allows drivers more freedom in how exactly they want to lower I/O,
e.g. first lowering I/O to temporaries.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.c b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
index 636111b10360c9468f2feadc953f43e8c4f779c5..ec8834235c477e27c5452ff49ce314c61b1f2e5b 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.c
@@ -296,6 +296,9 @@ ir3_shader_create(struct ir3_compiler *compiler,
        if (cso->type == PIPE_SHADER_IR_NIR) {
                /* we take ownership of the reference: */
                nir = cso->ir.nir;
+
+               NIR_PASS_V(nir, nir_lower_io, nir_var_all, ir3_glsl_type_size,
+                          (nir_lower_io_options)0);
        } else {
                debug_assert(cso->type == PIPE_SHADER_IR_TGSI);
                if (fd_mesa_debug & FD_DBG_DISASM) {
@@ -342,6 +345,9 @@ ir3_shader_create_compute(struct ir3_compiler *compiler,
        if (cso->ir_type == PIPE_SHADER_IR_NIR) {
                /* we take ownership of the reference: */
                nir = (nir_shader *)cso->prog;
+
+               NIR_PASS_V(nir, nir_lower_io, nir_var_all, ir3_glsl_type_size,
+                          (nir_lower_io_options)0);
        } else {
                debug_assert(cso->ir_type == PIPE_SHADER_IR_TGSI);
                if (fd_mesa_debug & FD_DBG_DISASM) {

diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 3beac61f3136a44f6a86c0b528e4e04f6520914a..999c154b861aee7e5a693784d83a88105781da37 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2427,6 +2427,9 @@ vc4_shader_state_create(struct pipe_context *pctx,
                  * creation.
                  */
                 s = cso->ir.nir;
+
+                NIR_PASS_V(s, nir_lower_io, nir_var_all, type_size,
+                           (nir_lower_io_options)0);
         } else {
                 assert(cso->type == PIPE_SHADER_IR_TGSI);
 

diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index dd3d6faa753e0a9b893721f2cdf05737dc470b1f..7f5a9afda80223e7e6be386e18994d51bc9bf6bf 100644 (file)
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -377,8 +377,7 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir)
                                    &nir->uniforms, &nir->num_uniforms);
 
    NIR_PASS_V(nir, nir_lower_system_values);
-   NIR_PASS_V(nir, nir_lower_io, nir_var_all, type_size,
-              (nir_lower_io_options)0);
+
    if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
       NIR_PASS_V(nir, nir_lower_samplers_as_deref, shader_program);
    else