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radeonsi: fix incorrect index buffer max size for lowered 8-bit indices
author
Marek Olšák
<marek.olsak@amd.com>
Wed, 22 Oct 2014 21:22:16 +0000
(23:22 +0200)
committer
Marek Olšák
<marek.olsak@amd.com>
Tue, 28 Oct 2014 22:20:45 +0000
(23:20 +0100)
Cc: 10.2 10.3 mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c
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diff --git
a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 4f81dacadb506961560e9e996e743c042a4e4f2f..708e42aed26f10805d66b640574cd89a4aa1b3a1 100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/
src/gallium/drivers/radeonsi/si_state_draw.c
@@
-750,7
+750,7
@@
static void si_state_draw(struct si_context *sctx,
if (info->indexed) {
uint32_t max_size = (ib->buffer->width0 - ib->offset) /
-
sctx->index_buffer.
index_size;
+
ib->
index_size;
uint64_t va = r600_resource(ib->buffer)->gpu_address + ib->offset;
si_pm4_add_bo(pm4, (struct r600_resource *)ib->buffer, RADEON_USAGE_READ,