radv: Add early exit for cache flushes.

No sense checking each bit separately in the common case of none
being set.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index a10034e4f200476cdbc472c6619bfb679731347f..1011c2d33935ff4d6c28ce5f5ccf64605c54408b 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -1089,6 +1089,9 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer)
                                                  RADV_CMD_FLAG_VS_PARTIAL_FLUSH |
                                                  RADV_CMD_FLAG_VGT_FLUSH);
 
+       if (!cmd_buffer->state.flush_bits)
+               return;
+
        radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 128);
 
        uint32_t *ptr = NULL;
@@ -1104,8 +1107,7 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer)
                               cmd_buffer->state.flush_bits);
 
 
-       if (cmd_buffer->state.flush_bits)
-               radv_cmd_buffer_trace_emit(cmd_buffer);
+       radv_cmd_buffer_trace_emit(cmd_buffer);
        cmd_buffer->state.flush_bits = 0;
 }