i965: Fix packed depth/stencil textures to be Y-tiled as well.

Fixes shadowtex.c.  And an assert is added to catch this sooner next time.

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 4784254bc7da1b11ec92a56309d5ead14acd06ab..67c39e509c549a79a17cdfc49dc1061bd9b26842 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -244,6 +244,8 @@ static void emit_depthbuffer(struct brw_context *brw)
         return;
       }
 
+      assert(region->tiling != I915_TILING_X);
+
       BEGIN_BATCH(len, IGNORE_CLIPRECTS);
       OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
       OUT_BATCH(((region->pitch * region->cpp) - 1) |

diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 660d7e5350b0a26490be043f83313ace05e0547f..1ef2fe86d1fcfc6521966ed99df4ba43816c1d45 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -115,7 +115,8 @@ intel_miptree_create(struct intel_context *intel,
    if (intel->use_texture_tiling && compress_byte == 0 &&
        intel->intelScreen->kernel_exec_fencing) {
       if (IS_965(intel->intelScreen->deviceID) &&
-         internal_format == GL_DEPTH_COMPONENT)
+         (internal_format == GL_DEPTH_COMPONENT ||
+          internal_format == GL_DEPTH_STENCIL_EXT))
         tiling = I915_TILING_Y;
       else
         tiling = I915_TILING_X;