+2017-08-30 Pat Haugen <pthaugen@us.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_emit_prologue_move_from_cr): Rename from
+ rs6000_emit_move_from_cr and call renamed function.
+ (rs6000_emit_prologue): Call renamed functions.
+ * config/rs6000/rs6000.md (prologue_movesi_from_cr): Rename from
+ movesi_from_cr, remove volatile CRs.
+
2017-08-30 Jon Beniston <jon@beniston.com>
Richard Biener <rguenther@suse.de>
return insn;
}
-/* Emit code to store CR fields that need to be saved into REG. */
+/* Emit prologue code to store CR fields that need to be saved into REG. This
+ function should only be called when moving the non-volatile CRs to REG, it
+ is not a general purpose routine to move the entire set of CRs to REG.
+ Specifically, gen_prologue_movesi_from_cr() does not contain uses of the
+ volatile CRs. */
static void
-rs6000_emit_move_from_cr (rtx reg)
+rs6000_emit_prologue_move_from_cr (rtx reg)
{
/* Only the ELFv2 ABI allows storing only selected fields. */
if (DEFAULT_ABI == ABI_ELFv2 && TARGET_MFCRF)
as well, using logical operations to combine the values. */
}
- emit_insn (gen_movesi_from_cr (reg));
+ emit_insn (gen_prologue_movesi_from_cr (reg));
}
/* Return whether the split-stack arg pointer (r12) is used. */
{
cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno);
START_USE (cr_save_regno);
- rs6000_emit_move_from_cr (cr_save_rtx);
+ rs6000_emit_prologue_move_from_cr (cr_save_rtx);
}
/* Do any required saving of fpr's. If only one or two to save, do
{
START_USE (0);
cr_save_rtx = gen_rtx_REG (SImode, 0);
- rs6000_emit_move_from_cr (cr_save_rtx);
+ rs6000_emit_prologue_move_from_cr (cr_save_rtx);
}
/* Saving CR requires a two-instruction sequence: one instruction
/* ??? We might get better performance by using multiple mfocrf
instructions. */
crsave = gen_rtx_REG (SImode, 0);
- emit_insn (gen_movesi_from_cr (crsave));
+ emit_insn (gen_prologue_movesi_from_cr (crsave));
for (i = 0; i < 8; i++)
if (!call_used_regs[CR0_REGNO + i])
}"
[(set_attr "type" "mfcrf")])
-(define_insn "movesi_from_cr"
+;; Don't include the volatile CRs since their values are not used wrt CR save
+;; in the prologue and doing so prevents shrink-wrapping because we can't move the
+;; prologue past an insn (early exit test) that defines a register used in the
+;; prologue.
+(define_insn "prologue_movesi_from_cr"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (unspec:SI [(reg:CC CR0_REGNO) (reg:CC CR1_REGNO)
- (reg:CC CR2_REGNO) (reg:CC CR3_REGNO)
- (reg:CC CR4_REGNO) (reg:CC CR5_REGNO)
- (reg:CC CR6_REGNO) (reg:CC CR7_REGNO)]
+ (unspec:SI [(reg:CC CR2_REGNO) (reg:CC CR3_REGNO)
+ (reg:CC CR4_REGNO)]
UNSPEC_MOVESI_FROM_CR))]
""
"mfcr %0"