fix iverilog compatibility for new case expr tests

diff --git a/tests/simple/case_expr_extend.sv b/tests/simple/case_expr_extend.sv
index 61bd14df1368bca0939e1465c00b70f80b9775cb..d4ca2aa9b93cfec1b053ddbbf8148b6ac4aca22d 100644 (file)
--- a/tests/simple/case_expr_extend.sv
+++ b/tests/simple/case_expr_extend.sv
@@ -1,7 +1,7 @@
 module top(
     output logic [5:0] out
 );
-always_comb begin
+initial begin
     out = '0;
     case (1'b1 << 1)
         2'b10: out = '1;

diff --git a/tests/simple/case_expr_query.sv b/tests/simple/case_expr_query.sv
index 63a0a8b7aa71d59dd8dae09801a53918184d71b9..844dfb713bbe5e109aa84240324b40678ae6c722 100644 (file)
--- a/tests/simple/case_expr_query.sv
+++ b/tests/simple/case_expr_query.sv
@@ -1,7 +1,7 @@
 module top(
     output logic [5:0] out
 );
-always_comb begin
+initial begin
     out = '0;
     case ($bits (out)) 6:
     case ($size (out)) 6: