(movsicc,movhicc): Allow reload from memory.

From-SVN: r12682

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 96bdac51bd6fa0c19aa391890081f093d2e59414..3debb5446b9b73afbcadcb2e272843652d60981f 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6744,10 +6744,11 @@
 
 (define_expand "movsicc"
   [(match_dup 4)
-   (set (match_operand 0 "register_operand" "")
+   (parallel [(set (match_operand 0 "register_operand" "")
        (if_then_else:SI (match_operand 1 "comparison_operator" "")
                         (match_operand:SI 2 "general_operand" "")
-                        (match_operand:SI 3 "general_operand" "")))]
+                        (match_operand:SI 3 "general_operand" "")))
+   (clobber (match_scratch:SI 4 "=&r"))])]
   "TARGET_CMOVE"
   "
 {
@@ -6756,10 +6757,11 @@
 
 (define_expand "movhicc"
   [(match_dup 4)
-   (set (match_operand 0 "register_operand" "")
+   (parallel [(set (match_operand 0 "register_operand" "")
        (if_then_else:HI (match_operand 1 "comparison_operator" "")
                         (match_operand:HI 2 "general_operand" "")
-                        (match_operand:HI 3 "general_operand" "")))]
+                        (match_operand:HI 3 "general_operand" "")))
+   (clobber (match_scratch:SI 4 "=&r"))])]
   "TARGET_CMOVE"
   "
 {
@@ -6767,11 +6769,12 @@
 }")
 
 (define_insn "movsicc_1"
-  [(set (match_operand:SI 0 "register_operand" "=r,r,&r")
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,&r,rm")
        (if_then_else:SI (match_operator 1 "comparison_operator" 
                                [(cc0) (const_int 0)])
-                     (match_operand:SI 2 "nonimmediate_operand" "rm,0,rm")
-                     (match_operand:SI 3 "nonimmediate_operand" "0,rm,rm")))]
+                     (match_operand:SI 2 "general_operand" "rm,0,rm,g")
+                     (match_operand:SI 3 "general_operand" "0,rm,rm,g")))
+   (clobber (match_scratch:SI 4 "X,X,X,=&r"))]
   "TARGET_CMOVE"
   "*
 {
@@ -6794,33 +6797,41 @@
       output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
       output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
     }
-  RET;
-}")
-
-(define_insn ""
-  [(set (match_operand:SI 0 "register_operand" "r")
-       (if_then_else:SI (match_operator 1 "comparison_operator" 
-                               [(cc0) (const_int 0)])
-                     (match_operand:SI 2 "general_operand" "")
-                     (match_operand:SI 3 "general_operand" "")))]
-  "TARGET_CMOVE"
-  "*
-{
+  else if (which_alternative == 3)
+    {
       /* r <- cond ? arg1 : arg2 */
-      operands[4] = gen_label_rtx ();
+    operands[5] = gen_label_rtx ();
+    if (! rtx_equal_p (operands[0], operands[2]))
+       if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM)
+         {
+           output_asm_insn (AS2 (mov%L2,%2,%4), operands);
+           output_asm_insn (AS2 (mov%L2,%4,%0), operands);
+         }
+       else
       output_asm_insn (AS2 (mov%L0,%2,%0), operands);
-      output_asm_insn (\"j%C1 %l4\", operands);
+    if (! rtx_equal_p (operands[0], operands[3]))
+      {
+        output_asm_insn (\"j%C1 %l5\", operands);
+        if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM)
+          {
+            output_asm_insn (AS2 (mov%L2,%3,%4), operands);
+            output_asm_insn (AS2 (mov%L2,%4,%0), operands);
+          }
+        else
       output_asm_insn (AS2 (mov%L0,%3,%0), operands);
-      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
+        ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[5]));
+      }
+    }  
   RET;
 }")
 
 (define_insn "movhicc_1"
-  [(set (match_operand:HI 0 "register_operand" "=r,r,&r")
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,&r,rm")
        (if_then_else:HI (match_operator 1 "comparison_operator" 
                                [(cc0) (const_int 0)])
-                     (match_operand:HI 2 "nonimmediate_operand" "rm,0,rm")
-                     (match_operand:HI 3 "nonimmediate_operand" "0,rm,rm")))]
+                     (match_operand:HI 2 "general_operand" "rm,0,rm,g")
+                     (match_operand:HI 3 "general_operand" "0,rm,rm,g")))
+   (clobber (match_scratch:SI 4 "X,X,X,=&r"))]
   "TARGET_CMOVE"
   "*
 {
@@ -6843,33 +6854,40 @@
       output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
       output_asm_insn (AS2 (cmov%c1,%3,%0), operands);
     }
-  RET;
-}")
-
-(define_insn ""
-  [(set (match_operand:HI 0 "register_operand" "r")
-       (if_then_else:HI (match_operator 1 "comparison_operator" 
-                               [(cc0) (const_int 0)])
-                     (match_operand:HI 2 "general_operand" "")
-                     (match_operand:HI 3 "general_operand" "")))]
-  "TARGET_CMOVE"
-  "*
-{
+  else if (which_alternative == 3)
+    {
       /* r <- cond ? arg1 : arg2 */
-      operands[4] = gen_label_rtx ();
+    operands[5] = gen_label_rtx ();
+    if (! rtx_equal_p (operands[0], operands[2]))
+       if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM)
+         {
+           output_asm_insn (AS2 (mov%L2,%2,%4), operands);
+           output_asm_insn (AS2 (mov%L2,%4,%0), operands);
+         }
+       else
       output_asm_insn (AS2 (mov%L0,%2,%0), operands);
-      output_asm_insn (\"j%C1 %l4\", operands);
+    if (! rtx_equal_p (operands[0], operands[3]))
+      {
+        output_asm_insn (\"j%C1 %l5\", operands);
+        if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[3]) == MEM)
+          {
+            output_asm_insn (AS2 (mov%L2,%3,%4), operands);
+            output_asm_insn (AS2 (mov%L2,%4,%0), operands);
+          }
+        else
       output_asm_insn (AS2 (mov%L0,%3,%0), operands);
-      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
+        ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[5]));
+      }
+    }  
   RET;
 }")
 
 (define_expand "movsfcc"
   [(match_dup 4)
-   (set (match_operand 0 "register_operand" "")
+   (set (match_operand 0 "general_operand" "")
        (if_then_else:SF (match_operand 1 "comparison_operator" "")
-                        (match_operand:SF 2 "register_operand" "")
-                        (match_operand:SF 3 "register_operand" "")))]
+                        (match_operand:SF 2 "general_operand" "")
+                        (match_operand:SF 3 "general_operand" "")))]
   "TARGET_CMOVE"
   "
 {
@@ -6878,10 +6896,10 @@
 
 (define_expand "movdfcc"
   [(match_dup 4)
-   (set (match_operand 0 "register_operand" "")
+   (set (match_operand 0 "register_operand" "t")
        (if_then_else:DF (match_operand 1 "comparison_operator" "")
-                        (match_operand:DF 2 "register_operand" "")
-                        (match_operand:DF 3 "register_operand" "")))]
+                        (match_operand:DF 2 "register_operand" "f")
+                        (match_operand:DF 3 "register_operand" "f")))]
   "TARGET_CMOVE"
   "
 {
@@ -6890,10 +6908,10 @@
 
 (define_expand "movxfcc"
   [(match_dup 4)
-   (set (match_operand 0 "register_operand" "")
+   (set (match_operand 0 "register_operand" "t")
        (if_then_else:XF (match_operand 1 "comparison_operator" "")
-                        (match_operand:XF 2 "register_operand" "")
-                        (match_operand:XF 3 "register_operand" "")))]
+                        (match_operand:XF 2 "register_operand" "f")
+                        (match_operand:XF 3 "register_operand" "f")))]
   "TARGET_CMOVE"
   "
 {
@@ -6901,11 +6919,11 @@
 }")
 
 (define_insn "movsfcc_1"
-  [(set (match_operand:SF 0 "register_operand" "=t,t")
+  [(set (match_operand:SF 0 "general_operand" "=t,=t,f,fFm")
        (if_then_else:SF (match_operator 1 "comparison_operator" 
                                [(cc0) (const_int 0)])
-                     (match_operand:SF 2 "register_operand" "0,f")
-                     (match_operand:SF 3 "register_operand" "f,0")))]
+                     (match_operand:SF 2 "general_operand" "0,f,f,fFm")
+                     (match_operand:SF 3 "general_operand" "f,0,f,fFm")))]
   "TARGET_CMOVE"
   "*
 {
@@ -6919,6 +6937,41 @@
       /* r <- cond ? r : arg */
       output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
     }
+  else if (which_alternative == 2)
+    {
+      /* r <- cond ? r : arg */
+      output_asm_insn (AS2 (fcmov%F1,%2,%0), operands);
+      output_asm_insn (AS2 (fcmov%f1,%3,%0), operands);
+    }
+  else if (which_alternative == 3)
+    {
+      rtx xops[2];
+
+      /* r <- cond ? arg1 : arg2 */
+      operands[4] = gen_label_rtx ();
+
+      if (STACK_REG_P (operands[2]) || GET_CODE (operands[2]) == MEM)
+       output_asm_insn (AS1 (fld,%y2), operands);
+      else
+        {
+          xops[0] = operands[0];
+          xops[1] = operands[2];
+         /* SET_SRC (PATTERN (insn)) = XEXP (SET_SRC (PATTERN (insn)), 1);*/
+         output_asm_insn (output_move_const_single (xops), xops);
+        }
+      output_asm_insn (\"j%C1 %l4\", operands);
+      if (STACK_REG_P (operands[3]) || GET_CODE (operands[0]) == MEM)
+         output_asm_insn (AS1 (fld,%y3), operands);
+      else
+       {
+         xops[1] = operands[3];
+         SET_SRC (PATTERN (insn)) = XEXP (SET_SRC (PATTERN (insn)), 2);
+         output_asm_insn (output_move_const_single (xops), xops);
+         /* output_move_memory (xops, insn, GET_MODE_SIZE (DFmode), 2, 4);*/
+         /* output_asm_insn (AS1 (fld%z0,%y3), operands);*/
+       }
+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
+}
   RET;
 }")