/* check if we're deleting the currently bound context */
if (&r300->radeon == current) {
radeonFlush(r300->radeon.glCtx);
- _mesa_make_current2(NULL, NULL, NULL);
+ _mesa_make_current(NULL, NULL, NULL);
}
/* Free r300 context resources */
unk42B4=r300->hw.unk42B4.cmd[1];
r300->hw.unk42B4.cmd[1]=0;
- if (mask & DD_FRONT_LEFT_BIT) {
- flags |= DD_FRONT_LEFT_BIT;
- mask &= ~DD_FRONT_LEFT_BIT;
+ if (mask & BUFFER_BIT_FRONT_LEFT) {
+ flags |= BUFFER_BIT_FRONT_LEFT;
+ mask &= ~BUFFER_BIT_FRONT_LEFT;
}
- if (mask & DD_BACK_LEFT_BIT) {
- flags |= DD_BACK_LEFT_BIT;
- mask &= ~DD_BACK_LEFT_BIT;
+ if (mask & BUFFER_BIT_BACK_LEFT) {
+ flags |= BUFFER_BIT_BACK_LEFT;
+ mask &= ~BUFFER_BIT_BACK_LEFT;
}
- if (mask & DD_DEPTH_BIT) {
+ if (mask & BUFFER_BIT_DEPTH) {
bits |= CLEARBUFFER_DEPTH;
- mask &= ~DD_DEPTH_BIT;
+ mask &= ~BUFFER_BIT_DEPTH;
}
- if ( (mask & DD_STENCIL_BIT) && r300->state.stencil.hw_stencil) {
+ if ( (mask & BUFFER_BIT_STENCIL) && r300->state.stencil.hw_stencil) {
bits |= CLEARBUFFER_STENCIL;
- mask &= ~DD_STENCIL_BIT;
+ mask &= ~BUFFER_BIT_STENCIL;
}
if (mask) {
swapped = r300->radeon.doPageFlip && (r300->radeon.sarea->pfCurrentPage == 1);
- if (flags & DD_FRONT_LEFT_BIT) {
+ if (flags & BUFFER_BIT_FRONT_LEFT) {
r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, swapped);
bits = 0;
}
- if (flags & DD_BACK_LEFT_BIT) {
+ if (flags & BUFFER_BIT_BACK_LEFT) {
r300ClearBuffer(r300, bits | CLEARBUFFER_COLOR, swapped ^ 1);
bits = 0;
}
#include "context.h"
#include "state.h"
#include "matrix.h"
+#include "framebuffer.h"
#include "drivers/common/driverfuncs.h"
#include "swrast/swrast.h"
static void radeonInitDriverFuncs(struct dd_function_table *functions)
{
functions->GetBufferSize = radeonGetBufferSize;
- functions->ResizeBuffers = _swrast_alloc_buffers;
+ functions->ResizeBuffers = _mesa_resize_framebuffer;
functions->GetString = radeonGetString;
}
#endif
}
- _mesa_make_current2(radeon->glCtx,
+ _mesa_make_current(radeon->glCtx,
(GLframebuffer *) driDrawPriv->
driverPrivate,
(GLframebuffer *) driReadPriv->
} else {
if (RADEON_DEBUG & DEBUG_DRI)
fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
- _mesa_make_current(0, 0);
+ _mesa_make_current(0, 0, 0);
}
if (RADEON_DEBUG & DEBUG_DRI)
radeon->doPageFlip = radeon->sarea->pfState;
- use_back = (radeon->glCtx->Color._DrawDestMask[0] == DD_BACK_LEFT_BIT);
+ use_back = (radeon->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT);
use_back ^= (radeon->sarea->pfCurrentPage == 1);
if (use_back) {
r200->hw.ctx.cmd[CTX_RB3D_COLORPITCH] =
r200->radeon.state.color.drawPitch;
- if (r200->radeon.glCtx->Color._DrawDestMask[0] == DD_BACK_LEFT_BIT)
+ if (r200->radeon.glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT)
radeonSetCliprects(&r200->radeon, GL_BACK_LEFT);
else
radeonSetCliprects(&r200->radeon, GL_FRONT_LEFT);
if (radeon->lastStamp != dPriv->lastStamp) {
radeonUpdatePageFlipping(radeon);
- if (radeon->glCtx->Color._DrawDestMask[0] == DD_BACK_LEFT_BIT)
+ if (radeon->glCtx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_BACK_LEFT)
radeonSetCliprects(radeon, GL_BACK_LEFT);
else
radeonSetCliprects(radeon, GL_FRONT_LEFT);
#include "glheader.h"
#include "imports.h"
#include "context.h"
+#include "mtypes.h"
+#include "framebuffer.h"
+#include "renderbuffer.h"
#define STANDALONE_MMIO
#include "radeon_screen.h"
#include "r200_ioctl.h"
#include "radeon_macros.h"
#include "radeon_reg.h"
+#include "radeon_span.h"
#include "utils.h"
#include "vblank.h"
#include "GL/internal/dri_interface.h"
+#include "drirenderbuffer.h"
/* R200 configuration
*/
__DRIdrawablePrivate * driDrawPriv,
const __GLcontextModes * mesaVis, GLboolean isPixmap)
{
+ radeonScreenPtr screen = (radeonScreenPtr)driScrnPriv->private;
+
if (isPixmap) {
return GL_FALSE; /* not implemented */
} else {
const GLboolean swAccum = mesaVis->accumRedBits > 0;
const GLboolean swStencil = mesaVis->stencilBits > 0 &&
mesaVis->depthBits != 24;
+#if 0
driDrawPriv->driverPrivate = (void *)
_mesa_create_framebuffer(mesaVis,
swDepth,
swStencil, swAccum, swAlpha);
+#else
+ struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis);
+ {
+ driRenderbuffer *frontRb
+ = driNewRenderbuffer(GL_RGBA, screen->cpp,
+ screen->frontOffset, screen->frontPitch);
+ radeonSetSpanFunctions(frontRb, mesaVis);
+ _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base);
+ }
+ if (mesaVis->doubleBufferMode) {
+ driRenderbuffer *backRb
+ = driNewRenderbuffer(GL_RGBA, screen->cpp,
+ screen->backOffset, screen->backPitch);
+ radeonSetSpanFunctions(backRb, mesaVis);
+ _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base);
+ }
+ if (mesaVis->depthBits == 16) {
+ driRenderbuffer *depthRb
+ = driNewRenderbuffer(GL_DEPTH_COMPONENT16, screen->cpp,
+ screen->depthOffset, screen->depthPitch);
+ radeonSetSpanFunctions(depthRb, mesaVis);
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
+ }
+ else if (mesaVis->depthBits == 24) {
+ driRenderbuffer *depthRb
+ = driNewRenderbuffer(GL_DEPTH_COMPONENT24, screen->cpp,
+ screen->depthOffset, screen->depthPitch);
+ radeonSetSpanFunctions(depthRb, mesaVis);
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
+ }
+
+ if (mesaVis->stencilBits > 0 && !swStencil) {
+ driRenderbuffer *stencilRb
+ = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT, screen->cpp,
+ screen->depthOffset, screen->depthPitch);
+ radeonSetSpanFunctions(stencilRb, mesaVis);
+ _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base);
+ }
+
+ _mesa_add_soft_renderbuffers(fb,
+ GL_FALSE, /* color */
+ swDepth,
+ swStencil,
+ swAccum,
+ swAlpha,
+ GL_FALSE /* aux */);
+ driDrawPriv->driverPrivate = (void *) fb;
+#endif
return (driDrawPriv->driverPrivate != NULL);
}
}
int buffer;
switch (bufferBit) {
- case DD_FRONT_LEFT_BIT:
+ case BUFFER_BIT_FRONT_LEFT:
buffer = 0;
break;
- case DD_BACK_LEFT_BIT:
+ case BUFFER_BIT_BACK_LEFT:
buffer = 1;
break;
switch (radeon->radeonScreen->cpp) {
case 2:
+#if 0
swdd->WriteRGBASpan = radeonWriteRGBASpan_RGB565;
swdd->WriteRGBSpan = radeonWriteRGBSpan_RGB565;
swdd->WriteMonoRGBASpan = radeonWriteMonoRGBASpan_RGB565;
swdd->WriteMonoRGBAPixels = radeonWriteMonoRGBAPixels_RGB565;
swdd->ReadRGBASpan = radeonReadRGBASpan_RGB565;
swdd->ReadRGBAPixels = radeonReadRGBAPixels_RGB565;
+#endif
break;
case 4:
+#if 0
swdd->WriteRGBASpan = radeonWriteRGBASpan_ARGB8888;
swdd->WriteRGBSpan = radeonWriteRGBSpan_ARGB8888;
swdd->WriteMonoRGBASpan = radeonWriteMonoRGBASpan_ARGB8888;
swdd->WriteMonoRGBAPixels = radeonWriteMonoRGBAPixels_ARGB8888;
swdd->ReadRGBASpan = radeonReadRGBASpan_ARGB8888;
swdd->ReadRGBAPixels = radeonReadRGBAPixels_ARGB8888;
+#endif
break;
default:
{
switch (radeon->glCtx->Visual.depthBits) {
case 16:
+#if 0
swdd->ReadDepthSpan = radeonReadDepthSpan_16_LINEAR;
swdd->WriteDepthSpan = radeonWriteDepthSpan_16_LINEAR;
swdd->WriteMonoDepthSpan = radeonWriteMonoDepthSpan_16_LINEAR;
swdd->ReadDepthPixels = radeonReadDepthPixels_16_LINEAR;
swdd->WriteDepthPixels = radeonWriteDepthPixels_16_LINEAR;
+#endif
break;
case 24:
+#if 0
swdd->ReadDepthSpan = radeonReadDepthSpan_24_8_LINEAR;
swdd->WriteDepthSpan = radeonWriteDepthSpan_24_8_LINEAR;
swdd->WriteMonoDepthSpan = radeonWriteMonoDepthSpan_24_8_LINEAR;
swdd->WriteStencilSpan = radeonWriteStencilSpan_24_8_LINEAR;
swdd->ReadStencilPixels = radeonReadStencilPixels_24_8_LINEAR;
swdd->WriteStencilPixels = radeonWriteStencilPixels_24_8_LINEAR;
+#endif
break;
default:
{
switch (radeon->glCtx->Visual.depthBits) {
case 16:
+#if 0
swdd->ReadDepthSpan = radeonReadDepthSpan_16_TILE;
swdd->WriteDepthSpan = radeonWriteDepthSpan_16_TILE;
swdd->WriteMonoDepthSpan = radeonWriteMonoDepthSpan_16_TILE;
swdd->ReadDepthPixels = radeonReadDepthPixels_16_TILE;
swdd->WriteDepthPixels = radeonWriteDepthPixels_16_TILE;
+#endif
break;
case 24:
+#if 0
swdd->ReadDepthSpan = radeonReadDepthSpan_24_8_TILE;
swdd->WriteDepthSpan = radeonWriteDepthSpan_24_8_TILE;
swdd->WriteMonoDepthSpan = radeonWriteMonoDepthSpan_24_8_TILE;
swdd->WriteStencilSpan = radeonWriteStencilSpan_24_8_TILE;
swdd->ReadStencilPixels = radeonReadStencilPixels_24_8_TILE;
swdd->WriteStencilPixels = radeonWriteStencilPixels_24_8_TILE;
+#endif
break;
default:
swdd->SpanRenderStart = radeonSpanRenderStart;
swdd->SpanRenderFinish = radeonSpanRenderFinish;
}
+
+/**
+ * Plug in the Get/Put routines for the given driRenderbuffer.
+ */
+void radeonSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis)
+{
+ if (drb->Base.InternalFormat == GL_RGBA) {
+ if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) {
+ drb->Base.GetRow = radeonReadRGBASpan_RGB565;
+ drb->Base.GetValues = radeonReadRGBAPixels_RGB565;
+ drb->Base.PutRow = radeonWriteRGBASpan_RGB565;
+ drb->Base.PutRowRGB = radeonWriteRGBSpan_RGB565;
+ drb->Base.PutMonoRow = radeonWriteMonoRGBASpan_RGB565;
+ drb->Base.PutValues = radeonWriteRGBAPixels_RGB565;
+ drb->Base.PutMonoValues = radeonWriteMonoRGBAPixels_RGB565;
+ }
+ else {
+ drb->Base.GetRow = radeonReadRGBASpan_ARGB8888;
+ drb->Base.GetValues = radeonReadRGBAPixels_ARGB8888;
+ drb->Base.PutRow = radeonWriteRGBASpan_ARGB8888;
+ drb->Base.PutRowRGB = radeonWriteRGBSpan_ARGB8888;
+ drb->Base.PutMonoRow = radeonWriteMonoRGBASpan_ARGB8888;
+ drb->Base.PutValues = radeonWriteRGBAPixels_ARGB8888;
+ drb->Base.PutMonoValues = radeonWriteMonoRGBAPixels_ARGB8888;
+ }
+ }
+ else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
+ drb->Base.GetRow = radeonReadDepthSpan_16_LINEAR;
+ drb->Base.GetValues = radeonReadDepthPixels_16_LINEAR;
+ drb->Base.PutRow = radeonWriteDepthSpan_16_LINEAR;
+ drb->Base.PutMonoRow = radeonWriteMonoDepthSpan_16_LINEAR;
+ drb->Base.PutValues = radeonWriteDepthPixels_16_LINEAR;
+ drb->Base.PutMonoValues = NULL;
+ }
+ else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
+ drb->Base.GetRow = radeonReadDepthSpan_24_8_LINEAR;
+ drb->Base.GetValues = radeonReadDepthPixels_24_8_LINEAR;
+ drb->Base.PutRow = radeonWriteDepthSpan_24_8_LINEAR;
+ drb->Base.PutMonoRow = radeonWriteMonoDepthSpan_24_8_LINEAR;
+ drb->Base.PutValues = radeonWriteDepthPixels_24_8_LINEAR;
+ drb->Base.PutMonoValues = NULL;
+ }
+ else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
+ drb->Base.GetRow = radeonReadStencilSpan_24_8_LINEAR;
+ drb->Base.GetValues = radeonReadStencilPixels_24_8_LINEAR;
+ drb->Base.PutRow = radeonWriteStencilSpan_24_8_LINEAR;
+ drb->Base.PutMonoRow = radeonWriteMonoStencilSpan_24_8_LINEAR;
+ drb->Base.PutValues = radeonWriteStencilPixels_24_8_LINEAR;
+ drb->Base.PutMonoValues = NULL;
+ }
+}
+
#ifdef GLX_DIRECT_RENDERING
+#include "drirenderbuffer.h"
+
extern void radeonInitSpanFuncs(GLcontext * ctx);
+extern void radeonSetSpanFunctions(driRenderbuffer *rb, const GLvisual *vis);
#endif
#endif