X86: Mask the PIC at startup to avoid a glitch which causes an NMI.

diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh
index dfb56646a9b41283ff1e1624fc4e127bc348f48a..a9c5baa8c80df95ec2b19cfece06f7a9b58aa8c0 100644 (file)
--- a/src/dev/x86/i8259.hh
+++ b/src/dev/x86/i8259.hh
@@ -39,8 +39,6 @@
 namespace X86ISA
 {
 
-class I82094AA;
-
 class I8259 : public BasicPioDevice, public IntDev
 {
   protected:
@@ -94,6 +92,18 @@ class I8259 : public BasicPioDevice, public IntDev
     Tick read(PacketPtr pkt);
     Tick write(PacketPtr pkt);
 
+    void
+    maskAll()
+    {
+        IMR = 0xFF;
+    }
+
+    void
+    unmaskAll()
+    {
+        IMR = 0x00;
+    }
+
     void signalInterrupt(int line);
     void raiseInterruptPin(int number);
     void lowerInterruptPin(int number);

diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index d1ab4af7f609ef0fe11d17ad42072330407d285b..7dc1d87115db4a9cccb1bd4eb2bc393538b6629e 100644 (file)
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -107,6 +107,13 @@ Pc::init()
     entry.vector = 0x30;
     ioApic.writeReg(0x30, entry.bottomDW);
     ioApic.writeReg(0x31, entry.topDW);
+
+    /*
+     * Mask the PICs. I'm presuming the BIOS/bootloader would have cleared
+     * these out and masked them before passing control to the OS.
+     */
+    southBridge->pic1->maskAll();
+    southBridge->pic2->maskAll();
 }
 
 Tick