A minor hack to get branch prediction to behave like before on Alpha.

--HG--
extra : convert_revision : 1eaabd13c72aa42c512a04d162a87491818bc621

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 90d3868a5226bfe18ae09710787b70622c554bb9..b80fc72e1287b9b4ce11386890025022562a17b1 100644 (file)
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1150,6 +1150,10 @@ DefaultFetch<Impl>::fetch(bool &status_change)
                                      instruction->staticInst,
                                      instruction->readPC());
 
+            ///FIXME This needs to be more robust in dealing with delay slots
+#if !ISA_HAS_DELAY_SLOT
+            predicted_branch |=
+#endif
             lookupAndUpdateNextPC(instruction, next_PC, next_NPC);
             predicted_branch |= (next_PC != fetch_NPC);