x86-64: don't hide an empty but meaningless REX prefix

Unlike for non-zero values passed to USED_REX(), where rex_used gets
updated only when the respective bit was actually set in the encoding,
zero getting passed in is not further guarded, yet such a (potentially
"empty") REX prefix takes effect only when there are registers numbered
4 and up.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ba55ed9c8fa20c4ce2049cf18c1d140ed82e77ff..557e75fef4847b6fa5e4ddd674c9c1c14f9f62d2 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for
+       ModR/M-encoded byte register cases.
+       * testsuite/gas/i386/x86-64-pseudos.d,
+       testsuite/gas/i386/x86-64-reg-intel.d,
+       testsuite/gas/i386/x86-64-reg.d: Adjust expectations.
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
        * testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for

diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d
index 26944b94cbeb2e79bd28da7a02986bdffe4e30fc..7e17b14f5b11fefef8e73c5e03f614c78265c65a 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -303,6 +303,9 @@ Disassembly of section .text:
  +[a-f0-9]+:   88 c4                   mov    %al,%ah
  +[a-f0-9]+:   40 d3 e0                rex shl %cl,%eax
  +[a-f0-9]+:   40 a0 01 00 00 00 00 00 00 00   rex movabs 0x1,%al
+ +[a-f0-9]+:   40 38 ca                rex cmp %cl,%dl
+ +[a-f0-9]+:   40 b3 01                rex mov \$(0x)?1,%bl
+ +[a-f0-9]+:   f2 40 0f 38 f0 c1       rex crc32b? %cl,%eax
  +[a-f0-9]+:   40 89 c3                rex mov %eax,%ebx
  +[a-f0-9]+:   41 89 c6                mov    %eax,%r14d
  +[a-f0-9]+:   41 89 00                mov    %eax,\(%r8\)

diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s
index 052907564c7bb7ea1420ba177ad93a0015ace756..1bd88181212856f25fe47495cf26aa898802309d 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -307,6 +307,9 @@ _start:
        {rex} mov %al,%ah
        {rex} shl %cl, %eax
        {rex} movabs 1, %al
+       {rex} cmp %cl, %dl
+       {rex} mov $1, %bl
+       {rex} crc32 %cl, %eax
        {rex} movl %eax,%ebx
        {rex} movl %eax,%r14d
        {rex} movl %eax,(%r8)

diff --git a/gas/testsuite/gas/i386/x86-64-reg-intel.d b/gas/testsuite/gas/i386/x86-64-reg-intel.d
index 00120b7d2674bb7d7e785081142995e2193c761c..f6974c8672bcd133aca48ca9556027767ffa0106 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-reg-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-reg-intel.d
@@ -26,10 +26,10 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    0f 73 f6 02             psllq  mm6,0x2
 [      ]*[a-f0-9]+:    66 41 0f 73 f2 02       psllq  xmm10,0x2
 [      ]*[a-f0-9]+:    66 41 0f 73 fa 02       pslldq xmm10,0x2
-[      ]*[a-f0-9]+:    40 80 c0 01[    ]+add    al,0x1
-[      ]*[a-f0-9]+:    40 80 c1 01[    ]+add    cl,0x1
-[      ]*[a-f0-9]+:    40 80 c2 01[    ]+add    dl,0x1
-[      ]*[a-f0-9]+:    40 80 c3 01[    ]+add    bl,0x1
+[      ]*[a-f0-9]+:    40 80 c0 01[    ]+rex add al,0x1
+[      ]*[a-f0-9]+:    40 80 c1 01[    ]+rex add cl,0x1
+[      ]*[a-f0-9]+:    40 80 c2 01[    ]+rex add dl,0x1
+[      ]*[a-f0-9]+:    40 80 c3 01[    ]+rex add bl,0x1
 [      ]*[a-f0-9]+:    40 80 c4 01[    ]+add    spl,0x1
 [      ]*[a-f0-9]+:    40 80 c5 01[    ]+add    bpl,0x1
 [      ]*[a-f0-9]+:    40 80 c6 01[    ]+add    sil,0x1

diff --git a/gas/testsuite/gas/i386/x86-64-reg.d b/gas/testsuite/gas/i386/x86-64-reg.d
index 292a827cd7b73d4b6ac01150d3a4e0bccbc82b78..ae9c0545a34241f61305e7657ce3e58d0edaafd5 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-reg.d
+++ b/gas/testsuite/gas/i386/x86-64-reg.d
@@ -25,10 +25,10 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    0f 73 f6 02             psllq  \$0x2,%mm6
 [      ]*[a-f0-9]+:    66 41 0f 73 f2 02       psllq  \$0x2,%xmm10
 [      ]*[a-f0-9]+:    66 41 0f 73 fa 02       pslldq \$0x2,%xmm10
-[      ]*[a-f0-9]+:    40 80 c0 01[    ]+add    \$0x1,%al
-[      ]*[a-f0-9]+:    40 80 c1 01[    ]+add    \$0x1,%cl
-[      ]*[a-f0-9]+:    40 80 c2 01[    ]+add    \$0x1,%dl
-[      ]*[a-f0-9]+:    40 80 c3 01[    ]+add    \$0x1,%bl
+[      ]*[a-f0-9]+:    40 80 c0 01[    ]+rex add \$0x1,%al
+[      ]*[a-f0-9]+:    40 80 c1 01[    ]+rex add \$0x1,%cl
+[      ]*[a-f0-9]+:    40 80 c2 01[    ]+rex add \$0x1,%dl
+[      ]*[a-f0-9]+:    40 80 c3 01[    ]+rex add \$0x1,%bl
 [      ]*[a-f0-9]+:    40 80 c4 01[    ]+add    \$0x1,%spl
 [      ]*[a-f0-9]+:    40 80 c5 01[    ]+add    \$0x1,%bpl
 [      ]*[a-f0-9]+:    40 80 c6 01[    ]+add    \$0x1,%sil

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 26b56bafd0a30fe6e9d3a7ee015b7aa1a31fdd86..4ac10ce186dd02f08a79c4c7435f33d5b3cbdf88 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
+       Conditionalize invocations of "USED_REX (0)".
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
        * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index b635a047c55172ee9405bdacb9f69ba3a37e1a18..4940c8a93d7d96150beb9cde8cd255707fc55807 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -14398,7 +14398,8 @@ OP_E_register (int bytemode, int sizeflag)
     {
     case b_mode:
     case b_swap_mode:
-      USED_REX (0);
+      if (reg & 4)
+       USED_REX (0);
       if (rex)
        names = names8rex;
       else
@@ -15027,7 +15028,8 @@ OP_G (int bytemode, int sizeflag)
   switch (bytemode)
     {
     case b_mode:
-      USED_REX (0);
+      if (modrm.reg & 4)
+       USED_REX (0);
       if (rex)
        oappend (names8rex[modrm.reg + add]);
       else
@@ -15218,9 +15220,10 @@ OP_REG (int code, int sizeflag)
     case sp_reg: case bp_reg: case si_reg: case di_reg:
       s = names16[code - ax_reg + add];
       break;
-    case al_reg: case ah_reg: case cl_reg: case ch_reg:
-    case dl_reg: case dh_reg: case bl_reg: case bh_reg:
+    case ah_reg: case ch_reg: case dh_reg: case bh_reg:
       USED_REX (0);
+      /* Fall through.  */
+    case al_reg: case cl_reg: case dl_reg: case bl_reg:
       if (rex)
        s = names8rex[code - al_reg + add];
       else
@@ -16416,7 +16419,8 @@ CRC32_Fixup (int bytemode, int sizeflag)
       add = (rex & REX_B) ? 8 : 0;
       if (bytemode == b_mode)
        {
-         USED_REX (0);
+         if (modrm.rm & 4)
+           USED_REX (0);
          if (rex)
            oappend (names8rex[modrm.rm + add]);
          else