freedreno: Clean up tests around ORing in the reloc flags.
authorEric Anholt <eric@anholt.net>
Thu, 7 May 2020 23:34:35 +0000 (16:34 -0700)
committerEric Anholt <eric@anholt.net>
Fri, 8 May 2020 19:35:39 +0000 (12:35 -0700)
gcc was surprisingly not seeing through this to just do an AND and an OR.
Improves drawoverhead's few uniforms / 1 change throughput 1.64141% +/-
0.188152% (n=60).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4957>

src/freedreno/drm/msm_ringbuffer_sp.c

index d8915707c7959f174a78bb867cbc28810256baaa..ecb102f2535dacbf74f79133a2a7879583f43d12 100644 (file)
@@ -152,12 +152,11 @@ append_bo(struct msm_submit_sp *submit, struct fd_bo *bo, uint32_t flags)
                msm_bo->idx = idx;
        }
 
-       if (flags & FD_RELOC_READ)
-               submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_READ;
-       if (flags & FD_RELOC_WRITE)
-               submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_WRITE;
-       if (flags & FD_RELOC_DUMP)
-               submit->submit_bos[idx].flags |= MSM_SUBMIT_BO_DUMP;
+       STATIC_ASSERT(FD_RELOC_READ == MSM_SUBMIT_BO_READ);
+       STATIC_ASSERT(FD_RELOC_WRITE == MSM_SUBMIT_BO_WRITE);
+       STATIC_ASSERT(FD_RELOC_DUMP == MSM_SUBMIT_BO_DUMP);
+       submit->submit_bos[idx].flags |=
+               flags & (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE | MSM_SUBMIT_BO_DUMP);
 
        return idx;
 }