gdb/

	* regformats/reg-tilegx.dat (name): Change abi name to "tilegx".
	* regformats/reg-tilegx32.dat: New.

  gdbserver/

	* Makefile.in (clean): Remove reg-tilegx.c, reg-tilegx32.c.
	(reg-tilegx32.c): New rule.
	* configure.srv (tilegx-*-linux*): Add reg-tilegx32.o to srv_regobj.
	* linux-tile-low.c (tile_arch_setup): New function.  Invoke
	different register info initializer according to elf class.
	(init_registers_tilgx32): New function.  The tilegx32 register info
	initializer.
	(tile_fill_gregset): Use "uint_reg_t" to represent register size.
	(tile_store_gregset): Likewise.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 3573b12dd75fa01bceb4495d4f3cba3bac6bc7b8..7c9c91723505daa5112b8dfac6a430437e733ca0 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2013-02-27  Jiong Wang  <jiwang@tilera.com>
+
+       * regformats/reg-tilegx.dat (name): Change abi name to "tilegx".
+       * regformats/reg-tilegx32.dat: New.
+
 2013-02-27  Jiong Wang  <jiwang@tilera.com>
 
        * configure.tgt (tilegx-*-linux*): Enable gdbserver.

diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 14bbe16b84565eeb0e8a5e7d6e40c85775c5f469..8d3acbabe5bf10df4764602f830348b7ea7295c4 100644 (file)
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,15 @@
+2013-02-27  Jiong Wang  <jiwang@tilera.com>
+
+       * Makefile.in (clean): Remove reg-tilegx.c, reg-tilegx32.c.
+       (reg-tilegx32.c): New rule.
+       * configure.srv (tilegx-*-linux*): Add reg-tilegx32.o to srv_regobj.
+       * linux-tile-low.c (tile_arch_setup): New function.  Invoke
+       different register info initializer according to elf class.
+       (init_registers_tilgx32): New function.  The tilegx32 register info
+       initializer.
+       (tile_fill_gregset): Use "uint_reg_t" to represent register size.
+       (tile_store_gregset): Likewise.
+
 2013-02-27  Yao Qi  <yao@codesourcery.com>
 
        * server.c (process_point_options): Print debug message when

diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index dffe8aeb4999008108a596b9fcde0339a9f7d920..ee2c400f0b038d067d8c73bdfe367984324e0c9f 100644 (file)
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -320,6 +320,7 @@ clean:
        rm -f reg-arm.c reg-bfin.c i386.c reg-ia64.c reg-m32r.c reg-m68k.c
        rm -f reg-sh.c reg-sparc.c reg-spu.c amd64.c i386-linux.c
        rm -f reg-cris.c reg-crisv32.c amd64-linux.c reg-xtensa.c
+       rm -f reg-tilegx.c reg-tilegx32.c
        rm -f arm-with-iwmmxt.c
        rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c
        rm -f mips-linux.c mips64-linux.c
@@ -694,6 +695,8 @@ reg-xtensa.c : $(srcdir)/../regformats/reg-xtensa.dat $(regdat_sh)
        $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-xtensa.dat reg-xtensa.c
 reg-tilegx.c : $(srcdir)/../regformats/reg-tilegx.dat $(regdat_sh)
        $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-tilegx.dat reg-tilegx.c
+reg-tilegx32.c : $(srcdir)/../regformats/reg-tilegx32.dat $(regdat_sh)
+       $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-tilegx32.dat reg-tilegx32.c
 
 #
 # Dependency tracking.  Most of this is conditional on GNU Make being

diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 93c499c54b2fbb96c370ac14bf11e16a9ecdcb48..b9a99d0f1fe613cab77aa757444dd2a3eaf9ab46 100644 (file)
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -333,6 +333,7 @@ case "${target}" in
                        srv_linux_regsets=yes
                        ;;
   tilegx-*-linux*)     srv_regobj=reg-tilegx.o
+                       srv_regobj="${srv_regobj} reg-tilegx32.o"
                        srv_tgtobj="linux-low.o linux-tile-low.o linux-osdata.o linux-procfs.o"
                        srv_tgtobj="${srv_tgtobj} linux-ptrace.o"
                        srv_linux_regsets=yes

diff --git a/gdb/gdbserver/linux-tile-low.c b/gdb/gdbserver/linux-tile-low.c
index c73bdf229b7e545a6369cc3c84922cab843504ec..f2426750981465fe91d92733c05faa44aae131c6 100644 (file)
--- a/gdb/gdbserver/linux-tile-low.c
+++ b/gdb/gdbserver/linux-tile-low.c
@@ -20,10 +20,13 @@
 #include "server.h"
 #include "linux-low.h"
 
+#include <arch/abi.h>
 #include <sys/ptrace.h>
 
-/* Defined in auto-generated file reg-tile.c.  */
-void init_registers_tile (void);
+/* Defined in auto-generated file reg-tilegx.c.  */
+void init_registers_tilegx (void);
+/* Defined in auto-generated file reg-tilegx32.c.  */
+void init_registers_tilegx32 (void);
 
 #define tile_num_regs 65
 
@@ -103,7 +106,7 @@ tile_fill_gregset (struct regcache *regcache, void *buf)
 
   for (i = 0; i < tile_num_regs; i++)
     if (tile_regmap[i] != -1)
-      collect_register (regcache, i, ((unsigned int *) buf) + tile_regmap[i]);
+      collect_register (regcache, i, ((uint_reg_t *) buf) + tile_regmap[i]);
 }
 
 static void
@@ -113,7 +116,7 @@ tile_store_gregset (struct regcache *regcache, const void *buf)
 
   for (i = 0; i < tile_num_regs; i++)
     if (tile_regmap[i] != -1)
-      supply_register (regcache, i, ((unsigned long *) buf) + tile_regmap[i]);
+      supply_register (regcache, i, ((uint_reg_t *) buf) + tile_regmap[i]);
 }
 
 struct regset_info target_regsets[] =
@@ -123,9 +126,27 @@ struct regset_info target_regsets[] =
   { 0, 0, 0, -1, -1, NULL, NULL }
 };
 
+static void
+tile_arch_setup (void)
+{
+  int pid = pid_of (get_thread_lwp (current_inferior));
+  unsigned int machine;
+  int is_elf64 = linux_pid_exe_is_elf_64_file (pid, &machine);
+
+  if (sizeof (void *) == 4)
+    if (is_elf64 > 0)
+      error (_("Can't debug 64-bit process with 32-bit GDBserver"));
+
+  if (!is_elf64)
+    init_registers_tilegx32();
+  else
+    init_registers_tilegx();
+}
+
+
 struct linux_target_ops the_low_target =
 {
-  init_registers_tile,
+  tile_arch_setup,
   tile_num_regs,
   tile_regmap,
   NULL,

diff --git a/gdb/regformats/reg-tilegx.dat b/gdb/regformats/reg-tilegx.dat
index fc971f9996eac318bef5e01877ae9613feee5be6..588252f384e7d8f391bec381a45314596acee342 100644 (file)
--- a/gdb/regformats/reg-tilegx.dat
+++ b/gdb/regformats/reg-tilegx.dat
@@ -1,4 +1,4 @@
-name:tile
+name:tilegx
 expedite:sp,lr,pc
 64:r0
 64:r1