-2017-05-03 Richard Sandiford <richard.sandiford@arm.com>
-
-Wrap tree-data-ref.h macro arguments
-
2017-04-19 Thomas Koenig <tkoenig@gcc.gnu.org>
Tobias Burnus <tobias.burnus@physik.fu-berlin.de>
return (mips_classify_address (&addr, x, mode, false)
&& addr.type == ADDRESS_REG
- && addr.reg == stack_pointer_rtx);
+ && rtx_equal_p (addr.reg, stack_pointer_rtx));
}
/* Return true if ADDR matches the pattern for the LWXS load scaled indexed
{
unsigned int alignment;
- alignment = type ? TYPE_ALIGN (type) : GET_MODE_ALIGNMENT (mode);
+ alignment = type && mode == BLKmode
+ ? TYPE_ALIGN (TYPE_MAIN_VARIANT (type))
+ : GET_MODE_ALIGNMENT (mode);
if (alignment < PARM_BOUNDARY)
alignment = PARM_BOUNDARY;
if (alignment > STACK_BOUNDARY)
if (memory_operand (op1, mode))
{
- if (TARGET_MIPS16) {
- struct mips_address_info addr;
- if (!mips_classify_address (&addr, op1, mode, false))
- return false;
- }
return and_load_operand (op2, mode);
}
else
switch (which_alternative)
{
case 0:
+ fprintf (stderr, "-----\n");
+ fprintf (stderr, "%d %d %d\n", satisfies_constraint_W (operands[1]), memory_operand (operands[1], SImode), stack_operand (operands[1], SImode));
+ debug_rtx (operands[1]);
+ /*
operands[1] = gen_lowpart (QImode, operands[1]);
+ */
return "lbu\t%0,%1";
case 1:
operands[1] = gen_lowpart (HImode, operands[1]);
/* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED
and other ppc floating point varients. However, we need to also eliminate
Darwin, since it doesn't like -mcpu=power6. */
-/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
/* { dg-options "-O2 -ffast-math -mcpu=power6 -mno-vsx -mno-altivec" } */
/* { dg-final { scan-assembler-times "fsqrt" 3 } } */