abc9_ops: -prep_delays to not insert delay box if input connection is const

diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc
index bc20d4731ccac41ea1b0f16178133631d3600b45..d7280e3fda27bf5fa4fd5c1ab1bf8344891dc116 100644 (file)
--- a/passes/techmap/abc9_ops.cc
+++ b/passes/techmap/abc9_ops.cc
@@ -804,6 +804,8 @@ void prep_delays(RTLIL::Design *design, bool dff_mode)
                                                log_id(conn.first), log_id(cell->name), log_id(cell->type), log_id(module->name));
                        if (!port_wire->port_input)
                                continue;
+                       if (conn.second.is_fully_const())
+                               continue;
 
                        SigSpec O = module->addWire(NEW_ID, GetSize(conn.second));
                        for (int i = 0; i < GetSize(conn.second); i++) {