radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT

The Vulkan specification says:

   "... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
    PIPE_BIT in the source stage mask will effectively not wait for
    any prior commands to complete."

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 2d59e4756391d728c6687a3e17c1d2c129c5ea16..ac76d8870600c881b944b54d26edb600eec565cc 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1849,8 +1849,7 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
                              VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT |
                              VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)) {
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
-       } else if (src_stage_mask & (VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT |
-                                    VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT |
+       } else if (src_stage_mask & (VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT |
                                     VK_PIPELINE_STAGE_VERTEX_INPUT_BIT |
                                     VK_PIPELINE_STAGE_VERTEX_SHADER_BIT)) {
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;