+2019-10-31 Mihail Ionescu <mihail.ionescu@arm.com>
+
+ * config/tc-arm.c (selected_ctx_ext_table) New static variable.
+ (arm_parse_arch): Set context sensitive extension table based on the
+ chosen base architecture.
+ (s_arm_arch_extension): Change to lookup extensions in the new context
+ sensitive tables.
+ * gas/testsuite/gas/arm/mve-ext.s: New.
+ * gas/testsuite/gas/arm/mve-ext.d: New.
+ * gas/testsuite/gas/arm/mvefp-ext.s: New.
+ * gas/testsuite/gas/arm/mvefp-ext.d: New.
+
2019-10-30 Delia Burduv <Delia.Burduv@arm.com>
* config/tc-aarch64.c (parse_address_main): Accept the omission of
/* Feature bits selected by the last .object_arch directive. */
static arm_feature_set selected_object_arch = ARM_ARCH_NONE;
/* Must be long enough to hold any of the names in arm_cpus. */
+static const struct arm_ext_table * selected_ctx_ext_table = NULL;
static char selected_cpu_name[20];
extern FLONUM_TYPE generic_floating_point_number;
march_ext_opt = XNEW (arm_feature_set);
*march_ext_opt = arm_arch_none;
march_fpu_opt = &opt->default_fpu;
+ selected_ctx_ext_table = opt->ext_table;
strcpy (selected_cpu_name, opt->name);
if (ext != NULL)
name += 2;
}
+ /* Check the context specific extension table */
+ if (selected_ctx_ext_table)
+ {
+ const struct arm_ext_table * ext_opt;
+ for (ext_opt = selected_ctx_ext_table; ext_opt->name != NULL; ext_opt++)
+ {
+ if (streq (ext_opt->name, name))
+ {
+ if (adding_value)
+ {
+ if (ARM_FEATURE_ZERO (ext_opt->merge))
+ /* TODO: Option not supported. When we remove the
+ legacy table this case should error out. */
+ continue;
+ ARM_MERGE_FEATURE_SETS (selected_ext, selected_ext,
+ ext_opt->merge);
+ }
+ else
+ ARM_CLEAR_FEATURE (selected_ext, selected_ext, ext_opt->clear);
+
+ ARM_MERGE_FEATURE_SETS (selected_cpu, selected_arch, selected_ext);
+ ARM_MERGE_FEATURE_SETS (cpu_variant, selected_cpu, selected_fpu);
+ *input_line_pointer = saved_char;
+ demand_empty_rest_of_line ();
+ return;
+ }
+ }
+ }
+
for (opt = arm_extensions; opt->name != NULL; opt++)
if (streq (opt->name, name))
{
--- /dev/null
+# name: MVE context sensitive .arch_extension
+# as: -march=armv8.1-m.main
+# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> ea52 136f asrl r2, r3, #5
--- /dev/null
+# name: MVE fp context sensitive .arch_extension
+# as: -march=armv8.1-m.main
+# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+[^>]*> eea1 0fc0 vshlc q0, r0, #1